Re: [RFC 0/7] crypto: caam - add Queue Interface (QI) support

On Thu, 2017-03-16 at 14:13 +, Horia Geantă wrote: > On 3/16/2017 10:43 AM, Herbert Xu wrote: > > > > On Fri, Mar 03, 2017 at 04:52:06PM +0200, Horia Geantă wrote: > > > > > > The patchset adds support for CAAM Queue Interface (QI), the additional > > > interface (besides job ring) available

Re: [RFC 4/7] soc/qman: add helper functions needed by caam/qi driver

On Fri, 2017-03-03 at 16:52 +0200, Horia Geantă wrote: > Add helper functions, macros, #defines for accessing / enabling > qman functionality from caam/qi driver, such that this driver > is not aware of the need for data conversion to big endian. Why?  I complained about that (probably

Re: [PATCH v2 4/8] powerpc: add io{read,write}64 accessors

On 05/09/2016 03:20 AM, Horia Ioan Geanta Neag wrote: > On 5/5/2016 6:37 PM, Horia Geantă wrote: >> This will allow device drivers to consistently use io{read,write}XX >> also for 64-bit accesses. >> >> Signed-off-by: Horia Geantă > > It would be great if PPC maintainers

Re: [RFC][PATCH 2/2] crypto: caam - handle core endianness != caam endianness

On Wed, 2015-09-02 at 01:25 -0500, Porosanu Alexandru-B06830 wrote: > Hi Scott, > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: 1 septembrie 2015 03:50 > > To: Geanta Neag Horia Ioan-B05471 > > Cc: Herbert Xu; Catalin Marinas; Will Deacon; linux-crypto@vger.kernel.org; > >

Re: [RFC][PATCH 2/2] crypto: caam - handle core endianness != caam endianness

On Fri, 2015-08-28 at 14:50 +0300, Horia Geantă wrote: > > -#ifdef __BIG_ENDIAN > -#define wr_reg32(reg, data) out_be32(reg, data) > -#define rd_reg32(reg) in_be32(reg) > +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_LE > +#define caam16_to_cpu(value) le16_to_cpu(value) > +#define cpu_to_caam16(value)

[RFC PATCH 03/17] crypto: caam: Blacklist CAAM when kexec is enabled

This driver hangs the kernel on boot when loaded via kexec. To make this driver kexec-safe, add a suspend or freeze hook, and when probing, don't make any assumptions about the existing hardware state (e.g. don't request_irq before quiescing the device). Signed-off-by: Scott Wood scottw

Re: [PATCH 2/2] talitos: Freescale integrated security engine (SEC) driver

Kim Phillips wrote: On Fri, 30 May 2008 22:09:04 +0400 Evgeniy Polyakov [EMAIL PROTECTED] wrote: Don't you want to protect against simultaneous access to register space from different CPUs? Or it is single processor board only? Doesn't linux mask the IRQ line for the interrupt currently being

Re: [PATCH 2/2] talitos: Freescale integrated security engine (SEC) driver

Kim Phillips wrote: On Fri, 30 May 2008 14:41:17 -0500 Scott Wood [EMAIL PROTECTED] wrote: Kim Phillips wrote: On Fri, 30 May 2008 22:09:04 +0400 Evgeniy Polyakov [EMAIL PROTECTED] wrote: Don't you want to protect against simultaneous access to register space from different CPUs

Re: [PATCH 2/2] talitos: Freescale integrated security engine (SEC) driver

Kim Phillips wrote: On Fri, 30 May 2008 15:19:43 -0500 Scott Wood [EMAIL PROTECTED] wrote: Kim Phillips wrote: On Fri, 30 May 2008 14:41:17 -0500 Scott Wood [EMAIL PROTECTED] wrote: Kim Phillips wrote: On Fri, 30 May 2008 22:09:04 +0400 Evgeniy Polyakov [EMAIL PROTECTED] wrote: Don't you