On Wed, Sep 09, 2015 at 02:27:07PM +0200, LABBE Corentin wrote:
> The sun4i_ss_opti_poll function cipher data until the output miter have
> a length of 0.
> If the crypto API client, give more SGs than necessary this could result
> in an infinite loop.
> Fix it by checking for remaining bytes,
While the destination buffer 'iv' is MAX_IVLEN size,
the source 'template[i].iv' could be smaller, thus
memcpy may read read invalid memory.
Use crypto_skcipher_ivsize() to get real ivsize
and pass it to memcpy.
Signed-off-by: Andrey Ryabinin
---
crypto/testmgr.c | 5
Hello
This patch series try to remove some duplicate code of some SG helpers
functions.
The first three patch replace custom functions by already in-tree helper
functions.
The fourth add a new functions "sg_nents_for_len2" who is the same as
sg_nents_for_len with an additionnal arguments.
Signed-off-by: LABBE Corentin
---
drivers/crypto/talitos.c | 34 --
1 file changed, 8 insertions(+), 26 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 3b20a1b..aca6a6a 100644
---
The get_sg_count function of amcc is the same as sg_nents_for_len from
lib/scatterlist.c
Signed-off-by: LABBE Corentin
---
drivers/crypto/amcc/crypto4xx_core.c | 22 +-
1 file changed, 1 insertion(+), 21 deletions(-)
diff --git
The sg_count function in bfin_crc.c is the same function as sg_nents.
Remove the duplicate code and use sg_nents() instead.
Signed-off-by: LABBE Corentin
---
drivers/crypto/bfin_crc.c | 25 +++--
1 file changed, 3 insertions(+), 22 deletions(-)
Some driver use a modified version of sg_nents_for_len with an
additional parameter bool *chained for knowing if the scatterlist is
chained or not.
So, for removing duplicate code, add sg_nents_for_len2 in
lib/scatterlist.c
Signed-off-by: LABBE Corentin
---
Signed-off-by: LABBE Corentin
---
drivers/crypto/qce/ablkcipher.c | 4 ++--
drivers/crypto/qce/dma.c| 19 ---
drivers/crypto/qce/dma.h| 1 -
drivers/crypto/qce/sha.c| 2 +-
4 files changed, 3 insertions(+), 23 deletions(-)
Signed-off-by: LABBE Corentin
---
drivers/crypto/sahara.c | 30 +++---
1 file changed, 3 insertions(+), 27 deletions(-)
diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.c
index 820dc3a..cea2411 100644
--- a/drivers/crypto/sahara.c
Signed-off-by: LABBE Corentin
---
drivers/crypto/caam/caamhash.c | 14 --
drivers/crypto/caam/sg_sw_sec4.h | 20 +---
2 files changed, 9 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c
From: John Griffin
In some cases we don't want iommu to be enabled but still we want enable VFs.
Signed-off-by: John Griffin
Signed-off-by: Tadeusz Struk
---
drivers/crypto/qat/qat_common/adf_sriov.c |5 ++---
1
On Fri, Sep 11, 2015 at 10:47:07AM +1000, Michael Ellerman wrote:
>
> Is that targeted for 4.3 ?
Yes I'm only accepting 4.3 patches for the time being.
Cheers,
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key:
This patch includes the Intel SHA Extensions optimized implementation
of SHA-256 update function. This function has been tested on Broxton
platform and measured a speed up of 3.6x over the SSSE3 implementiation
for 4K blocks.
Originally-by: Chandramouli Narayanan
This patch includes the Intel SHA Extensions optimized implementation
of SHA-1 update function. This function has been tested on Broxton
platform and measured a speed up of 3.6x over the SSSE3 implementiation
for 4K blocks.
Originally-by: Chandramouli Narayanan
This patch provides the configuration and build support to
include and build the optimized SHA1 and SHA256 update transforms
for the kernel's crypto library.
Originally-by: Chandramouli Narayanan
Signed-off-by: Tim Chen
---
arch/x86/Makefile
This patch adds the glue code to detect and utilize the Intel SHA
extensions optimized SHA1 and SHA256 update transforms when available.
This code has been tested on Broxton for functionality.
Originally-by: Chandramouli Narayanan
Signed-off-by: Tim Chen
On Fri, 2015-09-11 at 00:52 +0200, Stephan Mueller wrote:
> Am Donnerstag, 10. September 2015, 15:27:20 schrieb Tim Chen:
>
> Hi Tim,
>
> >This patch adds the glue code to detect and utilize the Intel SHA
> >extensions optimized SHA1 and SHA256 update transforms when available.
> >
> >This code
Am Donnerstag, 10. September 2015, 15:27:20 schrieb Tim Chen:
Hi Tim,
>This patch adds the glue code to detect and utilize the Intel SHA
>extensions optimized SHA1 and SHA256 update transforms when available.
>
>This code has been tested on Broxton for functionality.
A general comment on this
From: Tim Chen
Date: Thu, 10 Sep 2015 15:26:52 -0700
>
> The new x86 SHA extensions provide new hardware accelerated instructions
> for computing SHA1 and SHA256 hashes. This patch series provide the
> assembly routines for SHA1 and SHA256 computation using these new
On Thu, 2015-09-10 at 17:26 +0800, Herbert Xu wrote:
> On Wed, Sep 09, 2015 at 06:22:35PM +1000, Michael Ellerman wrote:
> > This code uses FP (floating point), Altivec and VSX (Vector-Scalar
> > Extension). It can just depend on CONFIG_VSX though, because that
> > already depends on FP and
The new x86 SHA extensions provide new hardware accelerated instructions
for computing SHA1 and SHA256 hashes. This patch series provide the
assembly routines for SHA1 and SHA256 computation using these new
instructions to the kernel crypto library. For 4K data blocks, we've
seen up to 3.6x
Use resource managed function devm_hwrng_register instead of
hwrng_register to make the error-path simpler. Also, remove
octeon_rng_remove as it is now redundant.
Signed-off-by: Vaishali Thakkar
---
drivers/char/hw_random/octeon-rng.c | 12 +---
1 file changed, 1
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