On 7/19/2014 1:13 AM, Kim Phillips wrote:
On Fri, 18 Jul 2014 19:37:17 +0300
Horia Geanta wrote:
This patch set adds Run Time Assembler (RTA) SEC descriptor library.
The main reason of replacing incumbent "inline append" is
to have a single code base both for user space and kernel space.
th
On 7/19/2014 2:04 AM, Kim Phillips wrote:
On Fri, 11 Jul 2014 15:34:45 +0300
Horia Geanta wrote:
Hi Horia,
Enabling DMA-API debugging reveals quite a lot of problems in CAAM module.
Patches below fix them - tested on P3041DS QorIQ platform. Please apply.
In an attempt to try and test these
On 7/19/2014 4:23 AM, Kim Phillips wrote:
On Sat, 19 Jul 2014 02:51:30 +0300
Horia Geantă wrote:
On 7/19/2014 1:13 AM, Kim Phillips wrote:
On Fri, 18 Jul 2014 19:37:17 +0300
Horia Geanta wrote:
This patch set adds Run Time Assembler (RTA) SEC descriptor library.
The main reason of
On 7/23/2014 1:37 AM, Kim Phillips wrote:
> On Fri, 11 Jul 2014 15:34:46 +0300
> Horia Geanta wrote:
>
>> +++ b/crypto/testmgr.c
>> @@ -198,13 +198,20 @@ static int __test_hash(struct crypto_ahash *tfm,
>> struct hash_testvec *template,
>> const char *algo = crypto_tfm_alg_driver_name(crypt
On 7/28/2014 1:11 PM, Cristian Stoica wrote:
> This patch inverts two if conditions and allows removal of one
> tab-stop in their code-blocks. Only white-space clean-up follows.
>
> Signed-off-by: Cristian Stoica
> ---
> crypto/testmgr.c | 498
> +++--
On 8/8/2014 2:27 PM, Cristian Stoica wrote:
> This patch inverts two if conditions to remove code blocks
> indentation. Several white space clean-ups follow.
>
> Signed-off-by: Cristian Stoica
> ---
> crypto/testmgr.c | 283
> ++-
> 1 file cha
On 8/16/2014 2:16 PM, Kim Phillips wrote:
> On Thu, 14 Aug 2014 15:54:22 +0300
> Horia Geanta wrote:
>
>> This patch set adds Run Time Assembler (RTA) SEC descriptor library.
>> RTA is a replacement for incumbent "inline append".
>>
>> The library is intended to be a single code base for SEC desc
On 2/20/2015 6:21 PM, Martin Hicks wrote:
> I was running into situations where the hardware FIFO was filling up, and
> the code was returning EAGAIN to dm-crypt and just dropping the submitted
> crypto request.
>
> This adds support in talitos for a software backlog queue. When requests
> can't
On 2/20/2015 6:21 PM, Martin Hicks wrote:
> This is properly defined in the md5 header file.
> ---
Signed-off-by tag is missing.
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On 2/20/2015 7:00 PM, Martin Hicks wrote:
> The newer talitos hardware has support for AES in XTS mode.
>
> Signed-off-by: Martin Hicks
> ---
checkpatch complains about formatting, please check.
> drivers/crypto/talitos.c | 33 +
> drivers/crypto/talitos.h |
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> This commit is to avoid the below warnings:
>
> drivers/crypto/caam/sg_sw_sec4.h:88:12: warning:
> 'dma_map_sg_chained' defined but not used [-Wunused-function]
> static int dma_map_sg_chained(struct device *dev, s
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> This can make sure we get a clean memory, else system would report
> the below warning:
I'd avoid using kzalloc, it's an overhead on the hot path. kmalloc can
be used with a bit of attention to detail, i.e. what par
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> Fix rng_unmap_ctx's DMA_UNMAP size problem for caam_rng, else system would
> report the below calltrace during kexec boot:
>
> caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different
> size [de
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> Add two missed dma_mapping_error() after dma_map_single().
>
> Signed-off-by: Yanjiang Jin
> ---
> drivers/crypto/caam/caamhash.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/crypto/ca
On 2/20/2015 7:00 PM, Martin Hicks wrote:
> This adds the AES-XTS mode, supported by the Freescale SEC 3.3.2.
>
> One of the nice things about this hardware is that it knows how to deal
> with encrypt/decrypt requests that are larger than sector size, but that
> also requires that that the sector
On 3/3/2015 8:50 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> Hi,
>
> This patch series fix some CAAM compile and runtime warnings.
> The patches 0001 and 0002 are same as V1.
>
> I have tested this on fsl-p5020ds board using upstream 4.0.0-rc1+ with the
> below configs:
>
On 3/3/2015 12:09 AM, Martin Hicks wrote:
>
> On Mon, Mar 02, 2015 at 03:37:28PM +0100, Milan Broz wrote:
>>
>> If crypto API allows to encrypt more sectors in one run
>> (handling IV internally) dmcrypt can be modified of course.
>>
>> But do not forget we can use another IV (not only sequential
On 3/4/2015 2:23 AM, Kim Phillips wrote:
> On Tue, 3 Mar 2015 08:21:37 -0500
> Martin Hicks wrote:
>
>> @@ -1170,6 +1237,8 @@ static struct talitos_edesc
>> *talitos_edesc_alloc(struct device *dev,
>> edesc->dma_len,
>>
On 3/7/2015 3:16 AM, Kim Phillips wrote:
> On Fri, 6 Mar 2015 11:49:43 -0500
> Martin Hicks wrote:
>
>> On Thu, Mar 5, 2015 at 7:16 PM, Kim Phillips
>> wrote:
>>> On Fri, 20 Feb 2015 12:00:10 -0500
>>> Martin Hicks wrote:
>>>
The newer talitos hardware has support for AES in XTS mode.
>>>
On 3/3/2015 7:44 PM, Martin Hicks wrote:
> On Tue, Mar 3, 2015 at 10:44 AM, Horia Geantă
> wrote:
>> On 3/3/2015 12:09 AM, Martin Hicks wrote:
>>>
>>> On Mon, Mar 02, 2015 at 03:37:28PM +0100, Milan Broz wrote:
>>>>
>>>> If crypto API allow
On 3/6/2015 6:48 AM, Herbert Xu wrote:
> On Thu, Mar 05, 2015 at 11:35:23AM +0200, Horia Geantă wrote:
>>
>>> Only potential problem is getting the crypto API to set the GFP_DMA
>>> flag in the allocation request, but presumably a
>>> CRYPTO_TFM_REQ_DMA
On 3/9/2015 5:08 PM, Martin Hicks wrote:
> On Mon, Mar 9, 2015 at 6:16 AM, Horia Geantă
> wrote:
>> On 3/3/2015 7:44 PM, Martin Hicks wrote:
>>> On Tue, Mar 3, 2015 at 10:44 AM, Horia Geantă
>>> wrote:
>>>>
>>>> For talitos, there are two
On 3/13/2015 7:14 PM, Horia Geanta wrote:
> The CRYPTO_TFM_REQ_DMA flag can be used by backend implementations to
> indicate to crypto API the need to allocate GFP_DMA memory
> for private contexts of the crypto requests.
>
> Signed-off-by: Horia Geanta
> ---
ahash_request_alloc() update is miss
On 3/13/2015 9:46 PM, David Miller wrote:
> From: Horia Geanta
> Date: Fri, 13 Mar 2015 19:15:22 +0200
>
>> Some crypto backends might require the requests' private contexts
>> to be allocated in DMA-able memory.
>>
>> Signed-off-by: Horia Geanta
>
> No way.
>
> Upper layers should be absolute
On 3/13/2015 8:37 PM, Tom Lendacky wrote:
> On 03/13/2015 12:16 PM, Horia Geanta wrote:
>> I was running into situations where the hardware FIFO was filling up, and
>> the code was returning EAGAIN to dm-crypt and just dropping the submitted
>> crypto request.
>>
>> This adds support in talitos for
On 3/4/2015 2:23 AM, Kim Phillips wrote:
> Only potential problem is getting the crypto API to set the GFP_DMA
> flag in the allocation request, but presumably a
> CRYPTO_TFM_REQ_DMA crt_flag can be made to handle that.
Seems there are quite a few places that do not use the
{aead,ablkcipher_ahash}
On 3/13/2015 4:08 PM, Martin Hicks wrote:
> Hi Horia,
>
> On Wed, Mar 11, 2015 at 11:48 AM, Horia Geantă
> wrote:
>>
>> While here: note that xts-talitos supports only two key lengths - 256
>> and 512 bits. There are tcrypt speed tests that check also for 384-bit
On 3/17/2015 2:19 AM, Kim Phillips wrote:
> On Mon, 16 Mar 2015 12:02:51 +0200
> Horia Geantă wrote:
>
>> On 3/4/2015 2:23 AM, Kim Phillips wrote:
>>> Only potential problem is getting the crypto API to set the GFP_DMA
>>> flag in the allocation request, but pr
On 3/18/2015 12:03 AM, Kim Phillips wrote:
> On Tue, 17 Mar 2015 19:58:55 +0200
> Horia Geantă wrote:
>
>> On 3/17/2015 2:19 AM, Kim Phillips wrote:
>>> On Mon, 16 Mar 2015 12:02:51 +0200
>>> Horia Geantă wrote:
>>>
>>>> On 3/4/2015 2:23 A
On 4/23/2015 6:26 AM, Herbert Xu wrote:
> Hi:
>
> It looks like our IPsec implementations of CCM and GCM are buggy
This applies also to GMAC (rfc4543), right?
> in that they don't include the IV in the authentication calculation.
>
> This definitely breaks interoperability with anyone who implemen
drivers/crypto/caam/jr.c:492:23:got struct caam_job_ring *
drivers/crypto/caam/caampkc.c:398:35: warning: Using plain integer as NULL
pointer
drivers/crypto/caam/caampkc.c:444:35: warning: Using plain integer as NULL
pointer
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caampkc.c | 4
nsfer of IV to C2
by starting the "cryptlen" transfer first and then starting to
store data from OFIFO to the output buffer.
Fixes: 1acebad3d8db8 ("crypto: caam - faster aead implementation")
Cc: # 3.2+
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
drivers/
n from the above that this patch needs to be reverted
due to the performance regression, and that there _is_ most definitely
a deterimental effect of switching from tasklets to threaded IRQs.
[/quote]
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/intern.h | 1 +
d
N pkha modular arithmetic source mask
5. rename LDST_SRCDST_WORD_CLASS1_ICV_SZ to
LDST_SRCDST_WORD_CLASS1_IV_SZ (it refers to IV, not ICV).
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/crypt
alkcipher_edesc_alloc() and ablkcipher_giv_edesc_alloc() don't
free / unmap resources on error path:
- dmap_map_sg() could fail, thus make sure the return value is checked
- unmap DMA mappings in case of error
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c
Commit 4464a7d4f53d756101291da26563f37f7fce40f3
("crypto: caam - remove error propagation handling")
removed error propagation handling only from caamalg.
Do this in all other places: caamhash, caamrng.
Update descriptors' lengths appropriately.
Signed-off-by: Horia Geantă
---
This is a batch of fixes and clean-up for caam driver.
Only the fix for the givencrypt shared descriptors is high-impact
and thus sent to -stable.
Thanks,
Horia
Alex Porosanu (1):
crypto: caam - fix AEAD givenc descriptors
Horia Geantă (13):
crypto: caam - completely remove error
sec4_sg_entry structure is used only by helper functions in sg_sw_sec4.h.
Since SEC HW S/G entries are to be manipulated only indirectly, via these
functions, move sec4_sg_entry to the corresponding header.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc.h | 6 --
drivers
REG3 no longer needs to be updated, since it's not used after that.
This shared descriptor command is a leftover of the conversion to
AEAD interface.
Fixes: 479bcc7c5b9e1 "crypto: caam - Convert authenc to new AEAD interface"
Signed-off-by: Horia Geantă
---
drivers/crypto/caa
Fix the following smatch warnings:
drivers/crypto/caam/caamalg.c:2350 aead_edesc_alloc() warn: we tested
'src_nents' before and it was 'true'
drivers/crypto/caam/caamrng.c:351 caam_rng_init() error: no modifiers for
allocation.
Signed-off-by: Horia Geantă
---
drivers/c
Fixes: 5ecf8ef9103cb "crypto: caam - fix sg dump"
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index bc433edd34c4..cb
-replace offsetof with container_of
-remove unused "assoc_nents", "iv_dma" from aead_edesc
and fix comments
-remove unused CAAM_MAX_IV_LENGTH #define
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 16
drivers/crypto/caam/caamhash.c | 12 +
Shared descriptors used by ahash_final() and ahash_finup()
are identical, thus get rid of one of them (sh_desc_finup).
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamhash.c | 26 +-
1 file changed, 1 insertion(+), 25 deletions(-)
diff --git a/drivers/crypto
ERRID is a 4-bit field.
Since err_id values are in [0..15] and err_id_list array size is 16,
the condition "err_id < ARRAY_SIZE(err_id_list)" is always true.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/error.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
The pointer to the descriptor buffer is not touched,
it always points to start of the descriptor buffer.
Thus, make it const.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc_constr.h | 72 +--
1 file changed, 38 insertions(+), 34 deletions(-)
diff
Move ahash shared descriptor generation into a single function.
Currently there is no plan to support ahash on any other interface
besides the Job Ring, thus for now the functionality is not exported.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamhash.c | 130
, compute only once per tfm the remaining
available bytes and decide whether key inlining is possible
based on this.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 130 ++
drivers/crypto/caam/desc_constr.h | 39
2 files changed
A few descriptor commands are generated using generic
inline append "append_cmd" function.
Rewrite them using specific inline append functions.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 20 ++--
drivers/crypto/caam/caamhash.c | 8
2 fil
In preparation for the caam/qi (Queue Interface) driver, the generation
of the shared descriptors is abstracted and exported.
This way the existing caam/jr (Job Ring) and caam/qi drivers will have
a common base of descriptors.
Thanks,
Horia
Horia Geantă (10):
crypto: caam - move
append_key_aead() is used in only one place, thus inline it.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 30 --
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index
Add myself and Dan as maintainers of the caam crypto driver.
Cc: Dan Douglass
Signed-off-by: Horia Geantă
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1cd38a7e0064..e28aab4d525a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4972,6
In preparation of factoring out the shared descriptors,
struct alginfo is introduced to group the algorithm related
parameters.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 394 +-
drivers/crypto/caam/caamhash.c| 48 +++--
drivers
Information carried by alg_op can be deduced from adata->algtype
plus some fixed flags.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 64 ++
drivers/crypto/caam/caamhash.c | 20 -
drivers/crypto/caam/key_gen.c |
Move split key length and padded length computation from caamalg.c
and caamhash.c to key_gen.c.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 24 +++--
drivers/crypto/caam/caamhash.c | 24 ++---
drivers/crypto/caam/key_gen.c | 47
Remove dependency on CRYPTO_DEV_FSL_CAAM where superfluous:
depends on CRYPTO_DEV_FSL_CAAM && CRYPTO_DEV_FSL_CAAM_JR
is equivalent to
depends on CRYPTO_DEV_FSL_CAAM_JR
since CRYPTO_DEV_FSL_CAAM_JR depends on CRYPTO_DEV_FSL_CAAM.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kco
("crypto: caam - refactor encryption descriptors
generation")
Reported-by: kbuild test robot
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg_desc.c | 64 +-
1 file changed, 35 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/caam/c
Start with a clean slate before dealing with bit 16 (pointer size)
of Master Configuration Register.
This fixes the case of AArch64 boot loader + AArch32 kernel, when
the boot loader might set MCFGR[PS] and kernel would fail to clear it.
Cc:
Reported-by: Alison Wang
Signed-off-by: Horia Geantă
Fix the "DMA-API: device driver maps memory from stack" warning
generated when crypto accelerators map the IV.
Signed-off-by: Horia Geantă
---
crypto/testmgr.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/crypto/testmgr.c b/crypto/testmgr.c
index 50
bus,
however when I did that for testing purposes, I could notice quite a few
problems in caam driver.
Thanks,
Horia
Horia Geantă (11):
crypto: caam - don't include unneeded headers
crypto: caam - check return code of dma_set_mask_and_coherent()
crypto: caam - fix
dma_map_sg() might coalesce S/G entries, so use the number of S/G
entries returned by it instead of what sg_nents_for_len() initially
returns.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 133 ++
1 file changed, 71 insertions(+), 62
contiguous)
Fix this by setting dst S/G nents equal to src S/G nents, instead of
leaving it set to init value (0).
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/c
Shared descriptors for hash algorithms are small enough
for (split) keys to be inlined in all cases.
Since driver already does this, all what's left is to remove
unused ctx->key_dma.
Fixes: 045e36780f115 ("crypto: caam - ahash hmac support")
Signed-off-by: Horia Geantă
---
d
sg_count() internally calls sg_nents_for_len(), which could fail
in case the required number of bytes is larger than the total
bytes in the S/G.
Thus, add checks to validate the input.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 44
export or in most ahash_fin* callbacks (due to current back-to-back
implementation of buf_dma unmapping/mapping)
Fix these by:
-calling dma_mapping_error() on buf_dma right after the mapping and providing
an error code if needed
-unmapping buf_dma during the "job done" (ahash_done_*) call
_exit() callbacks and sync_for_device in the setkey()
tfm callback.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 275 +++--
drivers/crypto/caam/caamhash.c | 79 +---
2 files changed, 102 insertions(+), 252 deletions(-)
diff --git a/dr
intern.h, jr.h are not needed in error.c
error.h is not needed in ctrl.c
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/ctrl.c | 1 -
drivers/crypto/caam/error.c | 2 --
2 files changed, 3 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index
Setting the dma mask could fail, thus make sure it succeeds
before going further.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/ctrl.c | 15 ++-
drivers/crypto/caam/jr.c | 19 ++-
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto
to: caam - ensure that we clean up after an error")
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamhash.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 2ad83a8dc0fe..6c6c005f417b 100644
---
in a visible way. req->src is no longer
(un)mapped, pointer address is set to 0 in SEQ IN PTR command.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c| 189 ++-
drivers/crypto/caam/sg_sw_sec4.h | 11 ---
2 files changed, 88 inserti
caamhash uses double buffering for holding previous/current
and next chunks (data smaller than block size) to be hashed.
Add (inline) functions to abstract this mechanism.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamhash.c | 77 ++
1 file
From: Tudor Ambarus
If one of the JRs failed at init, the next JR used
the failed JR's IO space. The patch fixes this bug.
Signed-off-by: Tudor Ambarus
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/ctrl.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
ff-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Makefile | 4 +
drivers/crypto/caam/ctrl.c | 58 ++--
drivers/crypto/caam/intern.h | 24 ++
drivers/crypto/caam/qi.c | 805 +++
drivers/crypto/caam/qi.h | 201 +++
5
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc_constr.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/crypto/caam/desc_constr.h
b/drivers/crypto/caam/desc_constr.h
index b9c8d98ef826..d8e83ca104e0 100644
--- a/drivers/crypto/caam/desc_constr.h
+++ b/drivers/crypto
time to settle down without
interfering with existing caam/jr driver.
Accordingly, for now all caam/qi algorithms (caamalg_qi module) are
marked to be of lower priority than caam/jr ones (caamalg module).
Signed-off-by: Vakul Garg
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
dr
Add and export the ID of the channel serviced by the
CAAM (Cryptographic Acceleration and Assurance Module) DCP.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/qbman/qman_ccsr.c | 6 +-
include/soc/fsl/qman.h| 3 +++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a
,
but I am open to suggestions.
Patch 5 adds a missing double inclusion guard in desc_constr.h.
Patch 6 adds the caam/qi job submission backend.
Patch 7 adds algorithms (ablkcipher and authenc) that run on top
of caam/qi. For now, their priority is set lower than caam/jr.
Thanks,
Horia
Horia
Export qman_query_fq_np() function and related structures.
This will be needed in the caam/qi driver, where "queue empty"
condition will be decided based on the frm_cnt.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/qbman/qman.c | 4 +--
drivers/soc/fsl/qbman/qman_p
Add helper functions, macros, #defines for accessing / enabling
qman functionality from caam/qi driver, such that this driver
is not aware of the need for data conversion to big endian.
qman is updated to use these helpers internally.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/qbman/qman.c
Since qman_volatile_dequeue() is already exported, move the related
structures into the public header too.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/qbman/qman_priv.h | 36
include/soc/fsl/qman.h| 36
2
On 1/13/2017 10:46 AM, Herbert Xu wrote:
> On Fri, Jan 13, 2017 at 08:59:16AM +0200, Horia Geantă wrote:
>> Fix the "DMA-API: device driver maps memory from stack" warning
>> generated when crypto accelerators map the IV.
>>
>> Signed-off-by: Horia Geantă
&
On 7/25/2017 4:22 PM, Shawn Guo wrote:
> On Tue, Jul 18, 2017 at 06:30:46PM +0300, Horia Geantă wrote:
>> This patch set adds support for CAAM's legacy Job Ring backend / interface
>> on platforms having DPAA2 (Datapath Acceleration Architecture v2), like
>> LS1088A or L
On 9/1/2016 1:13 PM, Herbert Xu wrote:
> On Mon, Aug 29, 2016 at 05:11:24PM +0300, Horia Geantă wrote:
>> (a)blkcipher is being deprecated in favcur of skcipher.
>> The main difference is that IV generation is moved out
>> of crypto algorithms.
>>
>> Signed-
On 7/30/2017 1:55 AM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> 'qi_congested' member from structure caam_drv_private
> is never used at all, so it is safe to remove it.
Agree, though I would remove all the other dentry members not currently
used - since debugfs_remove_recursive() is called
On 7/27/2017 2:19 AM, Logan Gunthorpe wrote:
> Changes since v4:
> - Add functions so the powerpc implementation of iomap.c compiles. (As
> noticed by Horia)
Tested-by: Horia Geantă
more exactly: crypto self-tests pass on CAAM crypto engine
on NXP platforms LS1046A (ARMv8 A53), T10
On 7/31/2017 3:22 PM, Fabio Estevam wrote:
> Most of the dentry members from structure caam_drv_private
> are never used at all, so it is safe to remove them.
>
> Since debugfs_remove_recursive() is called, we don't need the
> file entries.
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since
On 8/1/2017 4:45 PM, Fabio Estevam wrote:
> Most of the dentry members from structure caam_drv_private
> are never used at all, so it is safe to remove them.
>
> Since debugfs_remove_recursive() is called, we don't need the
> file entries.
>
> Signed-off-by: Fabio Estev
On 7/20/2017 4:08 PM, Harald Freudenberger wrote:
> On 07/19/2017 08:13 PM, Oleksij Rempel wrote:
>> On Wed, Jul 19, 2017 at 04:53:21PM +0000, Horia Geantă wrote:
>>> On 7/19/2017 7:32 PM, Oleksij Rempel wrote:
>>>> On Wed, Jul 19, 2017 at 12:49:47PM +, Horia Ge
On 8/3/2017 6:17 AM, Herbert Xu wrote:
> On Wed, Aug 02, 2017 at 02:03:14PM +0000, Horia Geantă wrote:
>>
>> Take CAAM's engine HWRNG: it can work both as a TRNG and as a
>> TRNG-seeded DRBG (that's how it's currently configured).
>> IIUC, both set
On 7/25/2017 4:50 PM, Shawn Guo wrote:
> On Tue, Jul 25, 2017 at 01:31:52PM +0000, Horia Geantă wrote:
>> On 7/25/2017 4:22 PM, Shawn Guo wrote:
>>> On Tue, Jul 18, 2017 at 06:30:46PM +0300, Horia Geantă wrote:
>>>> This patch set adds support for CAAM's legacy J
Add support for Congestion State Change Notifications (CSCN), which
allow DPIO users to be notified when a congestion group changes its
state (due to hitting the entrance / exit threshold).
Signed-off-by: Ioana Radulescu
Signed-off-by: Radu Alexe
Signed-off-by: Horia Geantă
---
drivers
Enable CAAM (Cryptographic Accelerator and Assurance Module) driver
for QorIQ Data Path Acceleration Architecture (DPAA) v2.
It handles DPSECI (Data Path SEC Interface) DPAA2 objects that sit
on the Management Complex (MC) fsl-mc bus.
Signed-off-by: Horia Geantă
---
arch/arm64/configs/defconfig
Add the low-level API that allows to manage DPSECI DPAA2 objects
that sit on the Management Complex (MC) fsl-mc bus.
The API is compatible with MC firmware 10.2.0+.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/dpseci.c | 858 +++
drivers/crypto
(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă
---
drivers/crypto/Makefile |2 +-
drivers/crypto/caam/Kconfi
Add support to translate error codes returned by QI v2, i.e.
Queue Interface present on DataPath Acceleration Architecture
v2 (DPAA2).
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/error.c | 75 +++--
drivers/crypto/caam/error.h | 6 +++-
drivers
Update gcm(aes) descriptors (generic, rfc4106 and rfc4543) such that
they would also work when submitted via the QI interface.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg.c | 19 +++--
drivers/crypto/caam/caamalg_desc.c | 165 ++---
drivers
Add support to submit the following ablkcipher algorithms
via the DPSECI backend:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 1 +
drivers/crypto/caam/caamalg_qi2.c | 816
FLE case)
- FLC[5:0] not used for stashing
Signed-off-by: Horia Geantă
---
drivers/staging/fsl-mc/include/dpaa2-fd.h | 243 ++
1 file changed, 243 insertions(+)
diff --git a/drivers/staging/fsl-mc/include/dpaa2-fd.h
b/drivers/staging/fsl-mc/include/dpaa2-fd.h
index c
4. It will be built only if dependency
on DPIO (CONFIG_FSL_MC_DPIO) is satisfied.
Thanks,
Horia
Horia Geantă (9):
staging: fsl-mc: dpio: add frame list format support
staging: fsl-mc: dpio: add congestion notification support
staging: fsl-dpaa2/eth: move generic FD defines to DPIO
crypto:
her accelerators
can make use of them.
While here, fix the values of FD_CTRL_FSE and FD_CTRL_FAERR, which
were shifted off by one bit.
Signed-off-by: Horia Geantă
---
drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 8 +++-
drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h | 19 +---
From: Radu Alexe
Order preservation is a feature that will be supported
in dpni, dpseci and dpci devices.
This is a preliminary patch for the changes to be
introduced in the corresponding drivers.
Signed-off-by: Radu Alexe
Signed-off-by: Horia Geantă
---
drivers/staging/fsl-mc/include
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