There are no init and exit callbacks, so delete its comments.
Signed-off-by: Zhou Wang
---
include/crypto/internal/scompress.h | 11 ---
1 file changed, 11 deletions(-)
diff --git a/include/crypto/internal/scompress.h
b/include/crypto/internal/scompress.h
index ccad9b2..0f6ddac 100644
On 2020/6/26 4:07, Fenghua Yu wrote:
> PASID is defined as "int" although it's a 20-bit value and shouldn't be
> negative int. To be consistent with PASID type in iommu, define PASID
> as "u32".
>
> Suggested-by: Thomas Gleixner
> Signed-off-by: Fenghua Yu
Hi Fenghua,
Looks good to me, thanks
On 2020/8/2 22:52, Jia-Ju Bai wrote:
> In qm_qp_ctx_cfg(), "sqc" and "aeqc" are mapped to streaming DMA:
> eqc_dma = dma_map_single(..., eqc, ...);
> ..
> aeqc_dma = dma_map_single(..., aeqc, ...);
Only sqc, cqc will be configured in qm_qp_ctx_cfg.
>
> Then "sqc" and "aeqc" are accesse
On 2020/8/3 9:29, Jia-Ju Bai wrote:
>
>
> On 2020/8/3 9:12, Zhou Wang wrote:
>> On 2020/8/2 22:52, Jia-Ju Bai wrote:
>>> In qm_qp_ctx_cfg(), "sqc" and "aeqc" are mapped to streaming DMA:
>>>eqc_dma = dma_map_single(..., eqc, ...);
>
dify the type of @head_size to int, then change the type to size_t
> when invoke hisi_zip_create_req() as a parameter.
Acked-by: Zhou Wang
This is a bug, thinks for your fix!
Best,
Zhou
>
> Fixes: 62c455ca853e ("crypto: hisilicon - add HiSilicon ZIP accelerator
> support&
On 2019/9/13 17:17, Herbert Xu wrote:
> On Fri, Sep 06, 2019 at 05:22:30PM +0200, Arnd Bergmann wrote:
>> The only caller of hisi_zip_vf_q_assign() is hidden in an #ifdef,
>> so the function causes a warning when CONFIG_PCI_IOV is disabled:
>>
>> drivers/crypto/hisilicon/zip/zip_main.c:740:12: erro
On 2019/9/20 22:16, John Garry wrote:
> On 20/09/2019 14:36, Arnd Bergmann wrote:
>> On Fri, Sep 20, 2019 at 3:26 PM Arnd Bergmann wrote:
>>>
>>> On Fri, Sep 20, 2019 at 10:34 AM John Garry wrote:
>>>
> + if (!IS_ENABLED(CONFIG_ARM64)) {
> + memcpy_toio(fun_base, src, 16);
As a type CRYPTO_ALG_TYPE_ACOMPRESS is needed to trigger crypto acomp test,
we introduce a new help function tcrypto_test_extend to pass type and mask
to alg_test.
Then tcrypto module can be used to do basic acomp test by:
insmod tcrypto.ko alg="zlib-deflate" mode=55 type=10
Signed-of
continuous memory. We
fixes this by allocating memory by blocks.
This series is based on Arnd's patch: https://lkml.org/lkml/2019/9/19/455
Shunkun Tan (1):
crypto: hisilicon - add sgl_sge_nr module param for zip
Zhou Wang (3):
crypto: hisilicon - merge sgl support to hisi_qm module
c
e SGE number in one SGL when creating sgl pool, which
is better than a unified module parameter for sgl module before.
- Modify zip driver according to sgl interface change.
Signed-off-by: Zhou Wang
Signed-off-by: Shukun Tan
---
MAINTAINERS | 1 -
drivers/crypto/hisi
This patch fixes some misc problems in sgl codes, e.g. missing static,
sparse error and input parameter check.
Signed-off-by: Zhou Wang
Signed-off-by: Shukun Tan
---
drivers/crypto/hisilicon/sgl.c | 40 ++--
1 file changed, 22 insertions(+), 18 deletions
When disabling SMMU, it may fail to allocate large continuous memory. This
patch fixes this by allocating memory as blocks.
Signed-off-by: Zhou Wang
Signed-off-by: Shukun Tan
---
drivers/crypto/hisilicon/sgl.c | 83 ++
1 file changed, 68 insertions
From: Shukun Tan
Add a module parameter for zip driver to set the number of SGE in one SGL.
Signed-off-by: Shukun Tan
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.h | 2 ++
drivers/crypto/hisilicon/sgl.c| 2 +-
drivers/crypto/hisilicon/zip/zip_crypto.c
On 2019/9/30 15:08, Zhou Wang wrote:
> This series fixes some preblems in sgl code. The main change is merging sgl
> code into hisi_qm module.
>
> These problem are also fixed:
> - Let user driver to pass the configure of sge number in one sgl when
>creating hard
As a type CRYPTO_ALG_TYPE_ACOMPRESS is needed to trigger crypto acomp test,
we introduce a new help function tcrypto_test_extend to pass type and mask
to alg_test.
Then tcrypto module can be used to do basic acomp test by:
insmod tcrypto.ko alg="zlib-deflate" mode=55 type=10
Signed-of
On 2019/10/10 22:25, kbuild test robot wrote:
> tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
> master
> head: 504582e8e40b90b8f8c58783e2d1e4f6a2b71a3a
> commit: a92a00f809503c6db9dac518951e060ab3d6f6ee [65/78] crypto: hisilicon -
> misc fix about sgl
> co
On 2019/10/10 20:54, Herbert Xu wrote:
> On Mon, Sep 30, 2019 at 03:08:51PM +0800, Zhou Wang wrote:
>> This series fixes some preblems in sgl code. The main change is merging sgl
>> code into hisi_qm module.
>>
>> These problem are also fixed:
>> - Let user dr
To avoid compile error in some platforms, select NEED_SG_DMA_LENGTH in
qm Kconfig.
Signed-off-by: Zhou Wang
Reported-by: kbuild test robot
---
drivers/crypto/hisilicon/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/hisilicon/Kconfig b/drivers/crypto/hisilicon
On 2019/10/11 19:18, Zhou Wang wrote:
> To avoid compile error in some platforms, select NEED_SG_DMA_LENGTH in
> qm Kconfig.
>
> Signed-off-by: Zhou Wang
> Reported-by: kbuild test robot
sorry to make the head of this patch as 1/2, it should be "PATCH"
On 2019/10/10 16:21, Zhou Wang wrote:
> As a type CRYPTO_ALG_TYPE_ACOMPRESS is needed to trigger crypto acomp test,
> we introduce a new help function tcrypto_test_extend to pass type and mask
> to alg_test.
>
> Then tcrypto module can be used to do basic acomp test by:
> ins
On 2019/10/18 16:04, Herbert Xu wrote:
> On Fri, Oct 11, 2019 at 07:18:10PM +0800, Zhou Wang wrote:
>> To avoid compile error in some platforms, select NEED_SG_DMA_LENGTH in
>> qm Kconfig.
>>
>> Signed-off-by: Zhou Wang
>> Reported-by: kbuild test robot
&g
On 2019/10/18 15:14, Herbert Xu wrote:
> On Thu, Oct 10, 2019 at 04:21:47PM +0800, Zhou Wang wrote:
>> As a type CRYPTO_ALG_TYPE_ACOMPRESS is needed to trigger crypto acomp test,
>> we introduce a new help function tcrypto_test_extend to pass type and mask
>> to alg_test.
>
On 2019/10/21 13:45, Herbert Xu wrote:
> On Mon, Oct 21, 2019 at 12:00:00PM +0800, Zhou Wang wrote:
>>
>> seems it can not work, when I run insmod tcrypt.ko alg="zlib-deflate"
>> type=10 mask=15
>> I got: insmod: can't insert 'tcrypt.ko':
On 2019/10/22 14:15, Herbert Xu wrote:
> On Mon, Oct 21, 2019 at 04:45:14PM +0800, Zhou Wang wrote:
>>
>> I made CRYPTO_MANAGER_DISABLE_TESTS=n and CRYPTO_TEST=m. After loading
>> hisi_qm and hisi_zip modules, I got:
>>
>> [ 138.232605] hisi_zip :
480 218765574
> drivers/crypto/hisilicon/zip/zip_main.o
>
> After:
>textdata bss dec hex filename
> 156205776 480 218765574
> drivers/crypto/hisilicon/zip/zip_main.o
>
> Signed-off-by: Rikard Falkeborn
Reviewed-by: Zhou Wang
emloft.net
>> Cc: linux-crypto@vger.kernel.org; Xu Zaibo ; Wangzhou
>> (B)
>> Subject: [PATCH 13/13] crypto: hisilicon/zip - Make negative compression not
>> an error
>
>> From: Zhou Wang
>
>> Users can decide whether to use negative compression resu
emloft.net
>> Cc: linux-crypto@vger.kernel.org; Xu Zaibo ; Wangzhou
>> (B)
>> Subject: [PATCH 12/13] crypto: hisilicon/zip - Use temporary sqe when doing
>> work
>
>> From: Zhou Wang
>
>> Currently zip sqe is stored in hisi_zip_qp_ctx, which
tes which would
> have been copied if there were enough space and scnprintf() returns the
> number of bytes which were actually copied. It doesn't matter here
> because the strings are very short so they can't go over 256 bytes.
>
> Signed-off-by: Dan Carpenter
Looks go
On 2020/6/4 14:50, Herbert Xu wrote:
> On Thu, Jun 04, 2020 at 02:44:16PM +0800, Zhangfei Gao wrote:
>>
>> I think it is fine.
>> 1. Currently the name size is 64, bigger enough.
>> Simply grep in driver name, 64 should be enough.
>> We can make it larger when there is a request.
>> 2. it does not
On 2020/6/4 15:37, Herbert Xu wrote:
> The function hisi_acc_create_sg_pool may allocate a block of
> memory of size PAGE_SIZE * 2^(MAX_ORDER - 1). This value may
> exceed 2^31 on ia64, which would overflow the u32.
>
> This patch caps it at 2^31.
>
> Reported-by: kernel test robot
> Fixes: d8a
based on v5.3-rc1.
- Some tiny fixes.
Links:
- v2 https://lkml.org/lkml/2019/1/23/358
- v1 https://lwn.net/Articles/775484/
- rfc https://lkml.org/lkml/2018/12/13/290
Note: this series is based on https://lkml.org/lkml/2019/7/23/1135
Reference:
[1] https://lkml.org/lkml/2018/11/12/1951
Zhou
HiSilicon ZIP engine supports PCI SRIOV. This patch enable this feature.
User can enable VFs and pass through them to VM, same ZIP driver can work
in VM to provide ZLIB and GZIP algorithm by crypto acomp interface.
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 97
Add debugfs descriptions for HiSilicon ZIP and QM driver.
Signed-off-by: Zhou Wang
Reviewed-by: Jonathan Cameron
---
Documentation/ABI/testing/debugfs-hisi-zip | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/ABI/testing/debugfs-hisi-zip
Add Zhou Wang as a maintainer for HiSilicon QM and ZIP controller driver.
Signed-off-by: Zhou Wang
Reviewed-by: John Garry
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 783569e..667aac4 100644
--- a/MAINTAINERS
+++ b
HiSilicon ZIP engine driver uses debugfs to provide debug information,
the usage can be found in /Documentation/ABI/testing/debugfs-hisi-zip.
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 301 +
drivers/crypto/hisilicon/qm.h | 29
mailboxes and doorbells. Specific task request are descripted by
specific description buffer, which will be controlled and pass to related
accelerator IP by QM.
This patch adds a QM driver used by the accelerator driver to access
the QM hardware.
Signed-off-by: Zhou Wang
Signed-off-by: Kenneth Lee
The HiSilicon ZIP accelerator implements the zlib and gzip algorithm. It
uses Hisilicon QM as the interface to the CPU.
This patch provides PCIe driver to the accelerator and registers it to
crypto acomp interface. It also uses sgl as data input/output interface.
Signed-off-by: Zhou Wang
Signed
to hardware SGL.
The DMA address of mapped hardware SGL can be passed to SGL src/dst field
in QM SQE.
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/Kconfig | 8 ++
drivers/crypto/hisilicon/Makefile | 1 +
drivers/crypto/hisilicon/sgl.c| 214
On 2019/8/2 15:57, Zhou Wang wrote:
> This series adds HiSilicon QM and ZIP controller driver in crypto subsystem.
>
> A simple QM/ZIP driver which helps to provide an example for a general
> accelerator framework is under review in community[1]. Based on this simple
> driver, this
On 2019/8/9 14:19, Herbert Xu wrote:
> On Fri, Aug 02, 2019 at 03:57:49PM +0800, Zhou Wang wrote:
>> This series adds HiSilicon QM and ZIP controller driver in crypto subsystem.
>>
>> A simple QM/ZIP driver which helps to provide an example for a general
>> accelerator f
On 2019/8/12 11:21, Stephen Rothwell wrote:
> Hi all,
>
> After merging the crypto tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/crypto/hisilicon/qm.c: Assembler messages:
> drivers/crypto/hisilicon/qm.c:334: Error: no such instruction: `ldp
> %rdx,%rcx,%bl
long unsigned int', but argument 6 has type 'size_t {aka
> unsigned int}' [-Wformat=]
> dev_dbg(dev, "allocate qm dma buf(va=%pK, dma=%pad, size=%lx)\n",
>^
>include/linux/dynamic_debug.h:125:15: note: in definition of macro
> '__dy
~~
Hi Herbert,
I will fix this and set dependency on arm64 for zip.
Should I just post a fix patch or repost the whole series
([PATCH v3 0/7] crypto: hisilicon: Add HiSilicon QM and ZIP controller driver)
with fixes?
Best,
Zhou
>
> vim +/asm +322 drivers/crypto/hisilicon/qm.c
&
Patch 1~3 are fixes about kbuild errors, patch 4,5 are tiny fixes about qm
and zip.
This series is based on cryptodev-2.6.
Zhou Wang (5):
crypto: hisilicon - fix kbuild warnings
crypto: hisilicon - add dependency for CRYPTO_DEV_HISI_ZIP
crypto: hisilicon - init curr_sgl_dma to fix compile
Just init curr_sgl_dma = 0 to avoid compile warning.
Fixes: dfed0098ab91 ("crypto: hisilicon - add hardware SGL support")
Reported-by: kbuild test robot
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/sgl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Directly return error in the first loop in hisi_zip_create_req_q.
Fixes: 62c455ca853e ("crypto: hisilicon - add HiSilicon ZIP accelerator
support")
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_crypto.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
di
Add ARM64/PCI/PCI_MSI dependency for CRYPTO_DEV_HISI_ZIP.
Fixes: 62c455ca853e ("crypto: hisilicon - add HiSilicon ZIP accelerator
support")
Reported-by: kbuild test robot
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Fix to add missing single_release in qm_regs_fops.
Fixes: 263c9959c937 ("crypto: hisilicon - add queue management driver for
HiSilicon QM module")
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/hisili
Fix to use proper type of argument for dma_addr_t and size_t.
Fixes: 263c9959c937 ("crypto: hisilicon - add queue management driver for
HiSilicon QM module")
Reported-by: kbuild test robot
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 6 +++---
1 file changed, 3
On 2019/8/15 20:08, Herbert Xu wrote:
> On Wed, Aug 14, 2019 at 05:28:34PM +0800, Zhou Wang wrote:
>> Patch 1~3 are fixes about kbuild errors, patch 4,5 are tiny fixes about qm
>> and zip.
>>
>> This series is based on cryptodev-2.6.
>>
>> Zhou Wang (
On 2019/8/15 20:03, Herbert Xu wrote:
> This patch fixes a printk format warning by replacing %p with %#lx
> for dma_addr_t.
>
> Signed-off-by: Herbert Xu
>
> diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
> index d72e062..3095284 100644
> --- a/drivers/crypto/hisilic
On 2019/8/16 6:47, Herbert Xu wrote:
> This patch fixes a printk format warning by replacing %p with %#llx
> for dma_addr_t.
>
> Signed-off-by: Herbert Xu
>
> diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
> index d72e062..4ad4de4 100644
> --- a/drivers/crypto/hisilic
On 2019/8/16 15:08, Ondrej Mosnáček wrote:
> pi 16. 8. 2019 o 9:02 Ondrej Mosnáček napísal(a):
>> Hi Herbert,
>>
>> pi 16. 8. 2019 o 1:52 Herbert Xu napísal(a):
>>> On Thu, Aug 15, 2019 at 10:17:37PM +0800, Zhou Wang wrote:
>>>>
>>>>> -
te a 'work_queue' and set as 'WQ_UNBOUND' to do the back half work
> on some different CPUS.
>
> Signed-off-by: Yang Shen
> Reviewed-by: Zaibo Xu
Reviewed-by: Zhou Wang
Thanks,
Zhou
> ---
> drivers/crypto/hisilicon/zip/zip_main.c | 26
On 2020/6/23 23:04, Bjorn Helgaas wrote:
> On Fri, Jun 19, 2020 at 10:26:54AM +0800, Zhangfei Gao wrote:
>> Have studied _DSM method, two issues we met comparing using quirk.
>>
>> 1. Need change definition of either pci_host_bridge or pci_dev, like adding
>> member can_stall,
>> while pci system d
Add debugfs descriptions for HiSilicon ZIP and QM driver.
Signed-off-by: Zhou Wang
reviewed-by: Jonathan Cameron
---
Documentation/ABI/testing/debugfs-hisi-zip | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/ABI/testing/debugfs-hisi-zip
The HiSilicon ZIP accelerator implements the zlib and gzip algorithm. It
uses Hisilicon QM as the interface to the CPU.
This patch provides PCIe driver to the accelerator and register it to
the crypto subsystem.
Signed-off-by: Zhou Wang
Signed-off-by: Shiju Jose
Signed-off-by: Kenneth Lee
l.org/lkml/2018/11/12/1951
Zhou Wang (4):
Documentation: Add debugfs doc for hisi_zip
crypto: hisilicon: Add queue management driver for HiSilicon QM module
crypto: hisilicon: Add HiSilicon ZIP accelerator support
MAINTAINERS: add maintainer for HiSilicon QM and ZIP controller driver
Document
mailboxes and doorbells. Specific task request are descripted by specific
description buffer, which will be controlled and pass to related accelerator
IP by QM.
This patch adds a QM driver used by the accelerator driver to access
the QM hardware.
Signed-off-by: Zhou Wang
Signed-off-by: Kenneth Lee
Add Zhou Wang as a maintainer for HiSilicon QM and ZIP controller driver.
Signed-off-by: Zhou Wang
reviewed-by: John Garry
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0767f1d..5be84e2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
mailboxes and doorbells. Specific task request are descripted by specific
description buffer, which will be controlled and pass to related accelerator
IP by QM.
This patch adds a QM driver used by the accelerator driver to access
the QM hardware.
Signed-off-by: Zhou Wang
Signed-off-by: Kenneth Lee
The HiSilicon ZIP accelerator implements the zlib and gzip algorithm. It
uses Hisilicon QM as the interface to the CPU.
This patch provides PCIe driver to the accelerator and register it to
the crypto subsystem.
Signed-off-by: Zhou Wang
Signed-off-by: Shiju Jose
Signed-off-by: Kenneth Lee
Add debugfs descriptions for HiSilicon ZIP and QM driver.
Signed-off-by: Zhou Wang
Reviewed-by: Jonathan Cameron
---
Documentation/ABI/testing/debugfs-hisi-zip | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/ABI/testing/debugfs-hisi-zip
Add Zhou Wang as a maintainer for HiSilicon QM and ZIP controller driver.
Signed-off-by: Zhou Wang
Reviewed-by: John Garry
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0767f1d..5be84e2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
l.org/lkml/2018/11/12/1951
Zhou Wang (4):
Documentation: Add debugfs doc for hisi_zip
crypto: hisilicon: Add queue management driver for HiSilicon QM module
crypto: hisilicon: Add HiSilicon ZIP accelerator support
MAINTAINERS: add maintainer for HiSilicon QM and ZIP controller driver
Document
On 2018/12/22 15:51, Zhou Wang wrote:
> This series adds HiSilicon QM and ZIP controller driver in crypto subsystem.
>
> A simple QM/ZIP driver which helps to provide an example for a general
> accelerator framework is under review in community[1]. Based on this simple
> driver, t
On 2019/1/11 14:08, Herbert Xu wrote:
> On Sat, Dec 22, 2018 at 03:51:44PM +0800, Zhou Wang wrote:
>>
>> +static struct crypto_alg hisi_zip_zlib = {
>> +.cra_name = "zlib-deflate",
>> +.cra_flags = CRYPTO_AL
On 2019/1/11 14:34, Zhou Wang wrote:
> On 2019/1/11 14:08, Herbert Xu wrote:
>> On Sat, Dec 22, 2018 at 03:51:44PM +0800, Zhou Wang wrote:
>>>
>>> +static struct crypto_alg hisi_zip_zlib = {
>>> + .cra_name
On 2019/1/18 12:55, Herbert Xu wrote:
> On Wed, Jan 16, 2019 at 10:12:47PM +0800, Zhou Wang wrote:
>>
>> A stupid question: how do we test scomp alg?
>>
>> It seems we can not use general comp API, e.g. crypto_alloc_comp
>> to do this.
>>
>> Coul
Add Zhou Wang as a maintainer for HiSilicon QM and ZIP controller driver.
Signed-off-by: Zhou Wang
Reviewed-by: John Garry
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 51029a4..6e6be9b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
The HiSilicon ZIP accelerator implements the zlib and gzip algorithm. It
uses Hisilicon QM as the interface to the CPU.
This patch provides PCIe driver to the accelerator and register it to
the crypto subsystem.
Signed-off-by: Zhou Wang
Signed-off-by: Shiju Jose
Signed-off-by: Kenneth Lee
Add debugfs descriptions for HiSilicon ZIP and QM driver.
Signed-off-by: Zhou Wang
Reviewed-by: Jonathan Cameron
---
Documentation/ABI/testing/debugfs-hisi-zip | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/ABI/testing/debugfs-hisi-zip
hange to register zlib/gzip to scomp.
- Remove hisi_qm_mem_init/uninit, make QM interfaces compact.
- Some tiny fixes.
Links:
- v1 https://lwn.net/Articles/775484/
- rfc https://lkml.org/lkml/2018/12/13/290
Reference:
[1] https://lkml.org/lkml/2018/11/12/1951
Zhou Wang (4):
Documentation: Add debugfs
mailboxes and doorbells. Specific task request are descripted by
specific description buffer, which will be controlled and pass to related
accelerator IP by QM.
This patch adds a QM driver used by the accelerator driver to access
the QM hardware.
Signed-off-by: Zhou Wang
Signed-off-by: Kenneth Lee
On 2019/1/23 21:08, Zhou Wang wrote:
> This series adds HiSilicon QM and ZIP controller driver in crypto subsystem.
>
> A simple QM/ZIP driver which helps to provide an example for a general
> accelerator framework is under review in community[1]. Based on this simple
> driver, t
On 2019/2/1 13:22, Herbert Xu wrote:
> On Wed, Jan 23, 2019 at 09:08:51PM +0800, Zhou Wang wrote:
>>
>> +/**
>> + * hisi_qp_poll() - Poll current cqe to see if a task is finished.
>> + * @qp: The qp which will poll.
>> + *
>> + * This function polls curren
On 2019/2/1 23:39, Herbert Xu wrote:
> On Fri, Feb 01, 2019 at 03:15:54PM +0800, Zhou Wang wrote:
>>
>>> Polling in softirq context is unacceptable. Can't your hardware
>>> send interrupts to signal completion? What is the average speed
>>> of processing a
On 2019/2/20 12:10, Herbert Xu wrote:
> On Sat, Feb 02, 2019 at 10:25:43AM +0800, Zhou Wang wrote:
>>
>> In fact, I planned to register to acomp later.
>>
>> It also makes sense to use scomp if hardware engine is faster than CPU.
>> So how about registering to sco
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