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balancing crypto with NAPI flow vs. tasklet (was: Re: Hi,)
On Mon, 12 Mar 2012 14:44:27 +0200 horia.gea...@freescale.com wrote: This patch replaces the back-half implementation of talitos crypto engine from tasklet to NAPI. The decision to do this was based on improved performance (around 7%). A similiar patch (not posted yet) was tested for caam crypto engine, with 10-15% improvement over tasklet. Since having crypto engines use the net softirq is probably not acceptable, I would like to hear your comments on what options do I have to make this upstreamable. Besides current approach, I am considering the following: - defining a new softirq for crypto engines, having a higher priority than the NET_RX_SOFTIRQ but the priority just has to be equal to NET_RX_SOFTIRQ to get the net--crypto performance balance, not necessarily higher IIRC. - using tasklet_hi_schedule instead of tasklet_schedule this has done close to nothing for performance in my experience - but there is no other tasklet competing for the slice in my IPSec fwding tests either. Let me know if any of these two fits better or if something else is preferred. Herbert/Dave, Is it ok for a crypto driver to depend on NET? If not, how should the NAPI-style flow be abstracted out of NET? Thanks, Kim Thank you From 20f30ef6fdfe641f1c30f94320891715ffee33a2 Mon Sep 17 00:00:00 2001 From: Sandeep Malik sandeep.ma...@freescale.com Date: Sat, 12 Jun 2010 14:08:47 +0800 Subject: [RFC,PATCH] crypto: talitos - Replace the tasklet implementation with NAPI This patch updates the current tasklet implement to NAPI so as the system is more balanced in the terms that the packet submission and the packet forwarding after being processed can be done at the same priority. Signed-off-by: Sandeep Malik sandeep.ma...@freescale.com Signed-off-by: Horia Geanta horia.gea...@freescale.com --- drivers/crypto/Kconfig |2 +- drivers/crypto/talitos.c | 145 +- drivers/crypto/talitos.h |4 +- 3 files changed, 109 insertions(+), 42 deletions(-) diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index e707979..682096b 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -218,7 +218,7 @@ config CRYPTO_DEV_TALITOS select CRYPTO_ALGAPI select CRYPTO_AUTHENC select HW_RANDOM - depends on FSL_SOC + depends on FSL_SOC NET help Say 'Y' here to use the Freescale Security Engine (SEC) to offload cryptographic algorithm computation. diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c index dc641c7..f368579 100644 --- a/drivers/crypto/talitos.c +++ b/drivers/crypto/talitos.c @@ -1,7 +1,7 @@ /* * talitos - Freescale Integrated Security Engine (SEC) device driver * - * Copyright (c) 2008-2011 Freescale Semiconductor, Inc. + * Copyright (c) 2008-2012 Freescale Semiconductor, Inc. * * Scatterlist Crypto API glue code copied from files with the following: * Copyright (c) 2006-2007 Herbert Xu herb...@gondor.apana.org.au @@ -37,6 +37,7 @@ #include linux/io.h #include linux/spinlock.h #include linux/rtnetlink.h +#include linux/netdevice.h #include linux/slab.h #include crypto/algapi.h @@ -121,6 +122,7 @@ struct talitos_channel { struct talitos_private { struct device *dev; struct platform_device *ofdev; + struct net_device __percpu *netdev; void __iomem *reg; int irq[2]; @@ -145,8 +147,8 @@ struct talitos_private { /* next channel to be assigned next incoming descriptor */ atomic_t last_chan cacheline_aligned; - /* request callback tasklet */ - struct tasklet_struct done_task[2]; + /* request callback napi */ + struct napi_struct __percpu *done_task[2]; /* list of registered algorithms */ struct list_head alg_list; @@ -349,17 +351,18 @@ static int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc, /* * process what was done, notify callback of error if not */ -static void flush_channel(struct device *dev, int ch, int error, int reset_ch) +static int flush_channel(struct device *dev, int ch, int error, int reset_ch, + int weight) { struct talitos_private *priv = dev_get_drvdata(dev); struct talitos_request *request, saved_req; unsigned long flags; - int tail, status; + int tail, status, count = 0; spin_lock_irqsave(priv-chan[ch].tail_lock, flags); tail = priv-chan[ch].tail; - while (priv-chan[ch].fifo[tail].desc) { + while (priv-chan[ch].fifo[tail].desc (count weight)) { request = priv-chan[ch].fifo[tail]; /* descriptors with their done bits set don't get the error */ @@ -396,43 +399,55 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch) status); /* channel may resume processing in single
Hi,
This patch replaces the back-half implementation of talitos crypto engine from tasklet to NAPI. The decision to do this was based on improved performance (around 7%). A similiar patch (not posted yet) was tested for caam crypto engine, with 10-15% improvement over tasklet. Since having crypto engines use the net softirq is probably not acceptable, I would like to hear your comments on what options do I have to make this upstreamable. Besides current approach, I am considering the following: - defining a new softirq for crypto engines, having a higher priority than the NET_RX_SOFTIRQ - using tasklet_hi_schedule instead of tasklet_schedule Let me know if any of these two fits better or if something else is preferred. Thank you From 20f30ef6fdfe641f1c30f94320891715ffee33a2 Mon Sep 17 00:00:00 2001 From: Sandeep Malik sandeep.ma...@freescale.com Date: Sat, 12 Jun 2010 14:08:47 +0800 Subject: [RFC,PATCH] crypto: talitos - Replace the tasklet implementation with NAPI This patch updates the current tasklet implement to NAPI so as the system is more balanced in the terms that the packet submission and the packet forwarding after being processed can be done at the same priority. Signed-off-by: Sandeep Malik sandeep.ma...@freescale.com Signed-off-by: Horia Geanta horia.gea...@freescale.com --- drivers/crypto/Kconfig |2 +- drivers/crypto/talitos.c | 145 +- drivers/crypto/talitos.h |4 +- 3 files changed, 109 insertions(+), 42 deletions(-) diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index e707979..682096b 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -218,7 +218,7 @@ config CRYPTO_DEV_TALITOS select CRYPTO_ALGAPI select CRYPTO_AUTHENC select HW_RANDOM - depends on FSL_SOC + depends on FSL_SOC NET help Say 'Y' here to use the Freescale Security Engine (SEC) to offload cryptographic algorithm computation. diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c index dc641c7..f368579 100644 --- a/drivers/crypto/talitos.c +++ b/drivers/crypto/talitos.c @@ -1,7 +1,7 @@ /* * talitos - Freescale Integrated Security Engine (SEC) device driver * - * Copyright (c) 2008-2011 Freescale Semiconductor, Inc. + * Copyright (c) 2008-2012 Freescale Semiconductor, Inc. * * Scatterlist Crypto API glue code copied from files with the following: * Copyright (c) 2006-2007 Herbert Xu herb...@gondor.apana.org.au @@ -37,6 +37,7 @@ #include linux/io.h #include linux/spinlock.h #include linux/rtnetlink.h +#include linux/netdevice.h #include linux/slab.h #include crypto/algapi.h @@ -121,6 +122,7 @@ struct talitos_channel { struct talitos_private { struct device *dev; struct platform_device *ofdev; + struct net_device __percpu *netdev; void __iomem *reg; int irq[2]; @@ -145,8 +147,8 @@ struct talitos_private { /* next channel to be assigned next incoming descriptor */ atomic_t last_chan cacheline_aligned; - /* request callback tasklet */ - struct tasklet_struct done_task[2]; + /* request callback napi */ + struct napi_struct __percpu *done_task[2]; /* list of registered algorithms */ struct list_head alg_list; @@ -349,17 +351,18 @@ static int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc, /* * process what was done, notify callback of error if not */ -static void flush_channel(struct device *dev, int ch, int error, int reset_ch) +static int flush_channel(struct device *dev, int ch, int error, int reset_ch, +int weight) { struct talitos_private *priv = dev_get_drvdata(dev); struct talitos_request *request, saved_req; unsigned long flags; - int tail, status; + int tail, status, count = 0; spin_lock_irqsave(priv-chan[ch].tail_lock, flags); tail = priv-chan[ch].tail; - while (priv-chan[ch].fifo[tail].desc) { + while (priv-chan[ch].fifo[tail].desc (count weight)) { request = priv-chan[ch].fifo[tail]; /* descriptors with their done bits set don't get the error */ @@ -396,43 +399,55 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch) status); /* channel may resume processing in single desc error case */ if (error !reset_ch status == error) - return; + return 0; spin_lock_irqsave(priv-chan[ch].tail_lock, flags); tail = priv-chan[ch].tail; + count++; } spin_unlock_irqrestore(priv-chan[ch].tail_lock, flags); + + return count; } /* * process completed requests for channels that have done status */ -#define DEF_TALITOS_DONE(name, ch_done_mask) \ -static void
Re: 回复:Re: vgdisplay problem with hi fn795x
Evgeniy Polyakov wrote: On Sat, Dec 06, 2008 at 10:09:55PM +0800, Lingbo Tang (SINA) ([EMAIL PROTECTED]) wrote: In some cases the non-debug version can work with mkfs.xfs, but it could not in most case. I tried to disable most services in the system, but it seems have no related to the system load. So I suppose it is easy to reproduce problem. Please show 'dmesg' output for the hung case when debug is turned off. Did you see register dump message when that happened? Please also try attached patch and show the hung dmesg (with tured off heavy debug). There is no message when my system hung with debug disabled. After I patched your new code, there is no hang anymore. I got following message: Dec 7 18:06:15 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 1, err: -115. Dec 7 18:06:16 localhost last message repeated 87 times Dec 7 18:06:16 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 0, err: -115. Dec 7 18:06:16 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 1, err: -115. Dec 7 18:06:18 localhost last message repeated 344 times Dec 7 18:06:18 localhost kernel: Filesystem dm-3: Disabling barriers, trial barrier write failed Dec 7 18:06:18 localhost kernel: XFS mounting filesystem dm-3 Dec 7 18:06:19 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 1, err: -115. Dec 7 18:06:19 localhost last message repeated 21 times Dec 7 18:06:19 localhost kernel: XFS quotacheck dm-3: Please wait. Dec 7 18:06:19 localhost kernel: XFS quotacheck dm-3: Done. Dec 7 18:06:19 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 1, err: -115. Dec 7 18:06:19 localhost last message repeated 2 times Dec 7 18:06:25 localhost ntpd[2125]: synchronized to LOCAL(0), stratum 10 Dec 7 18:06:25 localhost ntpd[2125]: kernel time sync enabled 0001 Dec 7 18:06:35 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 0, err: -115. Dec 7 18:06:35 localhost kernel: hifn_handle_req: nbytes: 512, started: 23, qlen: 1, err: -115. Regards, Lingbo -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: 回复:Re: vgdisplay problem with hi fn795x
Evgeniy Polyakov wrote: On Sun, Nov 30, 2008 at 04:26:00PM +0800, [EMAIL PROTECTED] ([EMAIL PROTECTED]) wrote: I downloaded the source file from your link and compiled successfully. But it still hang when I tried to run mkfs.xfs. Please enable debug mode with attached patch and send dmesg output. Thank you. The weird thing is that there is no problem if I turned on the debug option. I can see kcryptd taking 99% CPU time and there are many debug output from the serial port, but the encrypted LVM worked eventually. In some cases the non-debug version can work with mkfs.xfs, but it could not in most case. I tried to disable most services in the system, but it seems have no related to the system load. diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c index 6e9b39c..ca621f6 100644 --- a/drivers/crypto/hifn_795x.c +++ b/drivers/crypto/hifn_795x.c @@ -38,7 +38,7 @@ #include asm/kmap_types.h -//#define HIFN_DEBUG +#define HIFN_DEBUG #ifdef HIFN_DEBUG #define dprintk(f, a...) printk(f, ##a) -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html