On Thu, Jan 09, 2014 at 08:57:42AM -0800, Tim Chen wrote:
From 41656afcbd63ccb92357d4937a75629499f4fd4f Mon Sep 17 00:00:00 2001
From: Tim Chen tim.c.c...@linux.intel.com
Date: Mon, 6 Jan 2014 07:23:52 -0800
Subject: [PATCH] crypto: Rename aesni-intel_avx.S to indicate it only
supports
On Mon, Jan 06, 2014 at 03:39:06PM -0800, Tim Chen wrote:
On Mon, 2014-01-06 at 13:21 -0800, H. Peter Anvin wrote:
On 01/06/2014 12:26 PM, Borislav Petkov wrote:
On Mon, Jan 06, 2014 at 10:10:55AM -0800, Tim Chen wrote:
Yes, the code is in the file named aesni_intel_avx.S. So it should be
On Thu, 2014-01-09 at 17:03 +0800, Herbert Xu wrote:
On Mon, Jan 06, 2014 at 03:39:06PM -0800, Tim Chen wrote:
On Mon, 2014-01-06 at 13:21 -0800, H. Peter Anvin wrote:
On 01/06/2014 12:26 PM, Borislav Petkov wrote:
On Mon, Jan 06, 2014 at 10:10:55AM -0800, Tim Chen wrote:
Yes, the
On Mon, 2013-12-30 at 15:52 +0200, Andy Shevchenko wrote:
It seems commit d764593a crypto: aesni - AVX and AVX2 version of AESNI-GCM
encode and decode breaks a build on x86_32 since it's designed only for
x86_64. This patch makes a compilation unit conditional to CONFIG_64BIT and
functions
Can the code be adjusted to compile for 32 bit x86 or is that pointless?
Tim Chen tim.c.c...@linux.intel.com wrote:
On Mon, 2013-12-30 at 15:52 +0200, Andy Shevchenko wrote:
It seems commit d764593a crypto: aesni - AVX and AVX2 version of
AESNI-GCM
encode and decode breaks a build on x86_32
On Mon, 2014-01-06 at 09:45 -0800, H. Peter Anvin wrote:
Can the code be adjusted to compile for 32 bit x86 or is that pointless?
Code was optimized for wide registers. So it is only meant for x86_64.
Tim
Tim Chen tim.c.c...@linux.intel.com wrote:
On Mon, 2013-12-30 at 15:52 +0200,
On 01/06/2014 09:57 AM, Tim Chen wrote:
On Mon, 2014-01-06 at 09:45 -0800, H. Peter Anvin wrote:
Can the code be adjusted to compile for 32 bit x86 or is that pointless?
Code was optimized for wide registers. So it is only meant for x86_64.
Aren't the wide registers the vector registers?
On Mon, 2014-01-06 at 10:00 -0800, H. Peter Anvin wrote:
On 01/06/2014 09:57 AM, Tim Chen wrote:
On Mon, 2014-01-06 at 09:45 -0800, H. Peter Anvin wrote:
Can the code be adjusted to compile for 32 bit x86 or is that pointless?
Code was optimized for wide registers. So it is only meant
On Mon, Jan 06, 2014 at 10:10:55AM -0800, Tim Chen wrote:
Yes, the code is in the file named aesni_intel_avx.S. So it should be
clear that the code is meant for x86_64.
How do you deduce aesni_intel_avx.S is meant for x86_64 only from the
name?
Shouldn't it be called aesni_intel_avx-x86_64.S,
On 01/06/2014 12:26 PM, Borislav Petkov wrote:
On Mon, Jan 06, 2014 at 10:10:55AM -0800, Tim Chen wrote:
Yes, the code is in the file named aesni_intel_avx.S. So it should be
clear that the code is meant for x86_64.
How do you deduce aesni_intel_avx.S is meant for x86_64 only from the
name?
On Mon, 2014-01-06 at 13:21 -0800, H. Peter Anvin wrote:
On 01/06/2014 12:26 PM, Borislav Petkov wrote:
On Mon, Jan 06, 2014 at 10:10:55AM -0800, Tim Chen wrote:
Yes, the code is in the file named aesni_intel_avx.S. So it should be
clear that the code is meant for x86_64.
How do you
On 01/06/2014 03:39 PM, Tim Chen wrote:
Will renaming the file to aesni_intel_avx-x86_64.S make things clearer
now?
Tim
Yes.
Acked-by: H. Peter Anvin h...@linux.intel.com
Herbert, can you pick it up?
-hpa
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On Mon, Jan 06, 2014 at 03:41:51PM -0800, H. Peter Anvin wrote:
On 01/06/2014 03:39 PM, Tim Chen wrote:
Will renaming the file to aesni_intel_avx-x86_64.S make things clearer
now?
Tim
Yes.
Acked-by: H. Peter Anvin h...@linux.intel.com
Herbert, can you pick it up?
Sure I'll
On Mon, Dec 30, 2013 at 03:52:24PM +0200, Andy Shevchenko wrote:
It seems commit d764593a crypto: aesni - AVX and AVX2 version of AESNI-GCM
encode and decode breaks a build on x86_32 since it's designed only for
x86_64. This patch makes a compilation unit conditional to CONFIG_64BIT and
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