to user space, otherwise returns false.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Reviewed-by: James Morse <james.mo...@arm.com>
Change from V11:
1. Change the commit message
2. Update the Documentation/virtual/kvm/api.tx
---
Documentation/virtual/kvm/api.txt | 11 +++
Add a helper to handle the NOTIFY_SEI notification, when kernel
gets the NOTIFY_SEI notification, call this helper and let APEI
driver to handle this notification.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/include/asm/system_misc.h | 1 +
arch/arm64/kernel/t
, user space can get/set
the SError exception state to do migrate/snapshot/suspend.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Change since V11:
Address James's comments, thanks James
1. Align the struct of kvm_vcpu_events to 64 bytes
2. Avoid exposing the stale ESR
that padding transferred to user-space
doesn't
contain kernel stack.
Dongjiu Geng (4):
arm64: KVM: export the capability to set guest SError syndrome
arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS
ACPI / APEI: Add SEI notification type support for ARMv8
arm64: handle NOTIFY_SEI
ACPI 6.x adds support for NOTIFY_SEI as a GHES notification
mechanism, so add new GHES notification handling functions.
Expose API ghes_notify_sei() to arch code, arch code will call
this API when it gets this NOTIFY_SEI.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Note:
Fi
kvm_vcpu_events struct align to 4 bytes
4. Add something check in the kvm_arm_vcpu_set_events()
5. Check kvm_arm_vcpu_get/set_events()'s return value.
6. Initialise kvm_vcpu_events to 0 so that padding transferred to user-space
doesn't
contain kernel stack.
Dongjiu Geng (4):
arm64: KVM: export
Add a helper to handle the NOTIFY_SEI notification, when kernel
gets the NOTIFY_SEI notification, call this helper and let APEI
driver to handle this notification.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/include/asm/system_misc.h | 1 +
arch/arm64/kernel/t
This new IOCTL exports user-invisible states related to SError.
Together with appropriate user space changes, it can inject
SError with specified syndrome to guest by setup kvm_vcpu_events
value. Also it can support live migration.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
ACPI 6.x adds support for NOTIFY_SEI as a GHES notification
mechanism, so add new GHES notification handling functions.
Expose API ghes_notify_sei() to arch code, arch code will call
this API when it gets this NOTIFY_SEI.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
drivers/acp
Before user space injects a SError, it needs to know whether it can
specify the guest Exception Syndrome, so KVM should tell user space
whether it has such capability.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
Documentation/virtual/kvm/api.txt | 11 +++
arch/arm
Export one API to specify virtual SEI syndrome value
for guest, and add a helper to get the VSESR_EL2 value.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/include/asm/kvm_emulate.h | 5 +
arch/arm64/include/asm/kvm_host.h| 2 ++
arch/arm64/kvm/inject_f
Add a helper to handle the NOTIFY_SEI notification, when kernel
gets the NOTIFY_SEI notification, call this helper and let APEI
driver to handle this notification.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/include/asm/system_misc.h | 1 +
arch/arm64/kernel/t
Before user space injects a SError, it needs to know whether it can
specify the guest Exception Syndrome, so KVM should tell user space
whether it has such capability.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
Documentation/virtual/kvm/api.txt | 11 +++
arch/arm
ACPI 6.x adds support for NOTIFY_SEI as a GHES notification
mechanism, so add new GHES notification handling functions.
Expose API ghes_notify_sei() to arch code, arch code will call
this API when it gets this NOTIFY_SEI.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
drivers/acp
this
notification in software, KVM or kernel ARCH code call handle_guest_sei() to
let ACP driver
to handle this notification.
Dongjiu Geng (5):
arm64: KVM: Prepare set virtual SEI syndrome value
arm64: KVM: export the capability to set guest SError syndrome
arm/arm64: KVM: Introduce set and get per-vcpu
-by: Dongjiu Geng <gengdong...@huawei.com>
---
Documentation/virtual/kvm/api.txt | 26 --
arch/arm/include/asm/kvm_host.h | 6 ++
arch/arm/kvm/guest.c | 12
arch/arm64/include/asm/kvm_host.h | 5 +
arch/arm64/include/uapi/asm/kvm.
onfig option, reworded commit message]
Signed-off-by: James Morse <james.mo...@arm.com>
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
---
arch/arm64/Kconfig | 16
arch/arm64/include/asm/
, restore this value to VSESR_EL2
only when HCR_EL2.VSE is set. This value no need to be saved
because it is stale vale when guest exit.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
[Set an impdef ESR for Virtual-SError]
Signed-off-by: James Morse <james.mo...@arm.com>
---
users. External
modules can call this exposed API to parse APEI table and
handle the SEI notification.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
drivers/acpi/apei/Kconfig | 15 ++
drivers/acpi/apei/ghes.c | 53 +++
includ
, If has, will set it. Otherwise, nothing to do.
For this ESR specifying, Only support for AArch64, not support AArch32.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
change the name to KVM_CAP_ARM_INJECT_SERROR_ESR instead of
X_ARM_RAS_EXTENSION, suggested here
raps attempts to access the physical
error registers.
ERRIDR_EL1 advertises the number of error records, we return
zero meaning we can treat all the other registers as RAZ/WI too.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
[removed specific emulation, use trap_raz_wi() directly for
From: James Morse
When we exit a guest due to an SError the vcpu fault info isn't updated
with the ESR. Today this is only done for traps.
The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's
fault_info with the ESR on SError so that handle_exit() can
and has not (yet) been architecturally consumed
by the PE, the exception is precise. In order to make it
simple, we temporarily shut down the VM to isolate the error.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
change since v8:
1. Check handle_guest_sei()'s return value
2. Tempo
for recoverable error (UER)
4. update some patch's commit messages and clean some patches
Dongjiu Geng (5):
acpi: apei: Add SEI notification type support for ARMv8
KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA
arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl
arm64: kvm:
detects this feature and let the userspace know about it via a
HWCAP bit and MRS emulation.
Cc: Dave Martin <dave.mar...@arm.com>
Cc: Suzuki K Poulose <suzuki.poul...@arm.com>
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Reviewed-by: Dave Martin <dave.mar...@arm.com>
detects this feature and let the userspace know about it via a
HWCAP bit and MRS emulation.
Cc: Dave Martin <dave.mar...@arm.com>
Cc: Suzuki K Poulose <suzuki.poul...@arm.com>
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
Change since v1:
1. Address Dave and Suzuki's
ARM v8.4 extensions include support for new floating point
multiplication variant instructions to the AArch64 SIMD
instructions set. Let the userspace know about it via a
HWCAP bit and MRS emulation.
Cc: Suzuki K Poulose <suzuki.poul...@arm.com>
Signed-off-by: Dongjiu Geng <gengdong...@h
() can determine
if this was a RAS SError and decode its severity.
Signed-off-by: James Morse <james.mo...@arm.com>
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/kvm/hyp/switch.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/
', so set
this ESR to IMPLEMENTATION DEFINED by default if user space does not specify
it.
Dongjiu Geng (5):
acpi: apei: Add SEI notification type support for ARMv8
KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA
arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl
a
raps attempts to access the physical
error registers.
ERRIDR_EL1 advertises the number of error records, we return
zero meaning we can treat all the other registers as RAZ/WI too.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
[removed specific emulation, use trap_raz_wi() directly for
users. External
modules can call this exposed API to parse APEI table and
handle the SEI notification.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
drivers/acpi/apei/Kconfig | 15 ++
drivers/acpi/apei/ghes.c | 53 +++
includ
b and config option, reworded commit message]
Signed-off-by: James Morse <james.mo...@arm.com>
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
---
arch/arm64/Kconfig | 16
arch/arm64/incl
switch, restore this value to VSESR_EL2
only when HCR_EL2.VSE is set. This value no need to be saved
because it is stale vale when guest exit.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
[Set an impdef ESR for Virtual-SError
, If has, will set it. Otherwise, nothing to do.
For this ESR specifying, Only support for AArch64, not support AArch32.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
change the name to KVM_CAP_ARM_INJECT_SERROR
a valid ESR and inject virtual
SError, guest can just kill the current application if the
non-consumed error coming from guest application.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
---
arch/arm64/include/asm/esr.h
switch, restore this value to VSESR_EL2
only when HCR_EL2.VSE is set. This value no need to be saved
because it is stale vale when guest exit.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
[Set an impdef ESR for Virtual-SError
the address recorded by APEI table is not
accurate, so can not identify the address to hwpoison memory and
can not notify guest to do the recovery, so at the same time, let
user space specify a valid ESR and inject virtual SError.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Sign
to software on taking a virtual
SError interrupt exception. By default specify this syndrome value
to IMPLEMENTATION DEFINED, because all-zero means 'RAS error: Uncategorized'
instead of 'no valid ISS'.
Dongjiu Geng (4):
arm64: kvm: route synchronous external abort exceptions to EL2
arm64: kvm
for a generic API for all KVM architectures that will allow us to
do something like this.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
---
Documentation/virtual/kvm/api.txt | 11 +++
arch/arm/include/asm/kvm_host.h | 1
_EL1 and ERRSELR_EL1 are zero.
Then, the others ERX* registers are RAZ/WI.
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/include/asm/kvm_arm.h | 2 ++
arch/arm64/include/asm/kvm_emulate.h | 7 +++
arch/arm64/include/asm/kvm_host.h| 2 ++
arch/arm64/i
no one cares the
old VSESR_EL2 value
(3) Add a new KVM_ARM_SEI ioctl to set the VSESR_EL2 value and pend
a virtual system error
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
---
Documentation/virtual/kvm/api.txt| 10
Handle userspace's detection for RAS extension, because sometimes
the userspace needs to know the CPU's capacity
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/kvm/reset.c | 11 +++
include/uapi/linux/kvm.h | 1 +
2 files changed, 12 insertions(+)
diff
it delegates to the guest OS kernel
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
---
arch/arm64/include/asm/kvm_arm.h | 2 ++
arch/arm64/include/asm/kvm_emulate.h | 7 +++
2 files changed, 9 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/inclu
no one cares the
old VSESR_EL2 value
(3) Add a new KVM_ARM_SEI ioctl to set the VSESR_EL2 value and pend
a virtual system error
Signed-off-by: Dongjiu Geng <gengdong...@huawei.com>
Signed-off-by: Quanming Wu <wuquanm...@huawei.com>
---
Documentation/virtual/kvm/api.txt| 10
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