.
Signed-off-by: Leo Yan <leo@linaro.org>
---
tools/perf/util/scripting-engines/trace-event-python.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/perf/util/scripting-engines/trace-event-python.c
b/tools/perf/util/scripting-engines/trace-event-python.c
index 10dd5fc.
oirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
tools/perf/scripts/python/arm-cs-trace-disasm.py | 235 +++
1 file changed, 235 insertions(+)
create mode 100644 tools/perf/scripts/python/arm-cs-trace-disasm.py
diff --git a/tools/p
This commit documents CoreSight trace disassembler usage and gives
example for it.
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight.txt | 52 +++
1 file changed, 52 insertions(+)
diff --git a/Documentation/trace/coresight.
to remove the exception prediction algorithm,
we can rely on the sane exception packets for disassembler.
Leo Yan (4):
perf cs-etm: Generate branch sample for missed packets
perf script python: Add addr into perf sample dict
perf script python: Add script for CoreSight trace disassembler
78fb12 ("perf cs-etm: Inject capabilitity for CoreSight traces")
Signed-off-by: Leo Yan <leo@linaro.org>
---
tools/perf/util/cs-etm.c | 93 +---
1 file changed, 73 insertions(+), 20 deletions(-)
diff --git a/tools/perf/util/cs-etm.c b/tools/perf
ve provided, so that I can merge it?
Sure! I will respin the v3 patch series by following up Rob's
suggestion and add Rob's review tag.
BTW, I'd like to get ack from Mathieu as well. Mathieu is working on
CPU wide tracing, so I talked with Mathieu he will review the patch
series if has conflic
Hi Rob,
On Wed, May 23, 2018 at 12:21:18PM +0100, Robert Walker wrote:
> Hi Leo,
>
> On 22/05/18 10:52, Leo Yan wrote:
> >On Tue, May 22, 2018 at 04:39:20PM +0800, Leo Yan wrote:
> >
> >[...]
> >
> >Rather than the patch I posted in my previous em
On Tue, May 22, 2018 at 04:39:20PM +0800, Leo Yan wrote:
[...]
Rather than the patch I posted in my previous email, I think below new
patch is more reasonable for me.
In the below change, 'etmq->prev_packet' is only used to store the
previous CS_ETM_RANGE packet, we don't need to s
Hi Rob,
On Mon, May 21, 2018 at 12:27:42PM +0100, Robert Walker wrote:
> Hi Leo,
>
> On 21/05/18 09:52, Leo Yan wrote:
> >Commit e573e978fb12 ("perf cs-etm: Inject capabilitity for CoreSight
> >traces") reworks the samples generation flow from CoreSight trace to
tion
flow.
Fixes: e573e978fb12 ("perf cs-etm: Inject capabilitity for CoreSight traces")
Cc: Mike Leach <mike.le...@arm.com>
Cc: Robert Walker <robert.wal...@arm.com>
Cc: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo.
the fixing to generate samples
for the start packet and exception packets.
* Simplify the python script to remove the exception prediction algorithm,
we can rely on the sane exception packets for disassembler.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
Leo Yan (4):
p
This commit documents CoreSight trace disassembler usage and gives
example for it.
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight.txt | 52 +++
1 file changed, 52 insertions(+)
diff --git a/Documentation/trace/coresight.
.
Signed-off-by: Leo Yan <leo@linaro.org>
---
tools/perf/util/scripting-engines/trace-event-python.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/perf/util/scripting-engines/trace-event-python.c
b/tools/perf/util/scripting-engines/trace-event-python.c
index 10dd5fc.
On Tue, May 01, 2018 at 10:29:46PM -0700, Kees Cook wrote:
> On Tue, May 1, 2018 at 10:00 PM, Leo Yan <leo@linaro.org> wrote:
> > The driver prints pcsr twice: the first time it uses specifier %px to
> > print hexadecimal pcsr value and the second time uses specifier %pS
e document for alignment between the code and document.
Suggested-by: Kees Cook <keesc...@chromium.org>
Cc: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 4 ++--
drivers/hwtra
When CONFIG_BPF_JIT_ALWAYS_ON is enabled, kernel has limitation for
bpf_jit_enable, so it has fixed value 1 and we cannot set it to 2
for JIT opcode dumping; this patch is to update the doc for it.
Suggested-by: Daniel Borkmann <dan...@iogearbox.net>
Signed-off-by: Leo Yan <leo@l
On Fri, Apr 27, 2018 at 11:44:44AM +0200, Daniel Borkmann wrote:
> On 04/26/2018 04:26 AM, Leo Yan wrote:
> > When CONFIG_BPF_JIT_ALWAYS_ON is enabled, kernel has limitation for
> > bpf_jit_enable, so it has fixed value 1 and we cannot set it to 2
> > for JIT opcod
When CONFIG_BPF_JIT_ALWAYS_ON is enabled, kernel has limitation for
bpf_jit_enable, so it has fixed value 1 and we cannot set it to 2
for JIT opcode dumping; this patch is to update the doc for it.
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/networking/filter.txt | 6 +++
oir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../trace/coresight/coresight-panic-kdump.txt | 130 +
MAINTAINERS| 1 +
2 files changed, 131 insertions(+)
create mode 100644 Documentation/trace/coresight/cor
and CS_MODE_PERF; and clear the
handler when Coresight is disabled.
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 5 +
drivers/hwtracing/coresight/coresight.c | 16 ++--
2 files changed, 19 insertions(+), 2 del
nk devices can be recorded into Coresight kdump node for
kernel panic kdump.
When kernel panic happens, the notifier iterates dump array and invoke
callback function to dump tracing data. Later the tracing data can be
used to reverse execution flow before the kernel panic.
Signed-off-by: Le
.
To avoid unnecessary overload introduced by set/clear operations for
updating kdump node, we only set ETMv4 metadata info for the
corresponding kdump node at initialization and won't be cleared anymore.
Suggested-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Ya
for kdump.
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/coresight-tmc-etf.c | 30 +
1 file changed, 30 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c
b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index e
format compatible file.
* Refactored panic dump driver to support pre & post panic dump.
Changes from RFC:
* Follow Mathieu's suggestion, use general framework to support dump
functionality.
* Changed to use perf to analyse trace data.
Leo Yan (6):
doc: Add Coresight documentat
On Tue, Jan 09, 2018 at 01:21:28PM -0700, Mathieu Poirier wrote:
> On Thu, Dec 21, 2017 at 04:20:15PM +0800, Leo Yan wrote:
> > ETMv4 hardware information and configuration needs to be saved as
> > metadata; these metadata should be compatible with tool 'perf' and
> > can be
On Tue, Jan 09, 2018 at 11:41:26AM -0700, Mathieu Poirier wrote:
> On Thu, Dec 21, 2017 at 04:20:12PM +0800, Leo Yan wrote:
> > After kernel panic happens, coresight has many useful info can be used
> > for analysis. For example, the trace info from ETB RAM can be used to
&g
Add detailed documentation for Coresight panic kdump, which contains
the idea for why need this and introduce the framework implementation
and usage.
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../trace/coresight/coresight-panic-kdump.txt | 91 ++
MAINT
happening.
When kernel panic happens, the notifier iterates dump list and calls
callback function to dump device specific info. The panic dump is
mainly used to dump trace data so we can get to know the execution flow
before the panic happens.
Signed-off-by: Leo Yan <leo@linaro.org>
---
d
.
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/coresight-tmc-etf.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c
b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index e2513b7..f
-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 12 +++-
drivers/hwtracing/coresight/coresight-etm4x.c| 23 +++
drivers/hwtracing/coresight/coresight-etm
If the sink device has panic kdump callback, this means the sink device
wants to save tracing data for panic happening.
This commit adds node into panic kdump list when the sink device is
enabled, and delete node when the sink device is disabled.
Signed-off-by: Leo Yan <leo@linaro.
For easily management and friendly adding more Coresight related
documentations, this commit creates one dedicated directory:
Documentation/trace/coresight. It moves Coresight related docs into
this new directory and updates MAINTAINERS file to reflect docs
movement.
Signed-off-by: Leo Yan <
RFC:
* Follow Mathieu's suggestion, use general framework to support dump
functionality.
* Changed to use perf to analyse trace data.
Leo Yan (6):
doc: Add Coresight documentation directory
doc: Add documentation for Coresight panic kdump
coresight: Support panic kdump functionality
cores
On Mon, Oct 02, 2017 at 11:14:46AM -0700, Mathieu Poirier wrote:
> On 19 September 2017 at 21:46, Leo Yan <leo@linaro.org> wrote:
> > In the coresight CPU debug document it suggests to use 'echo' command
> > to set latency request to /dev/cpu_dma_latency so can disable al
on cpu_dma_latency.
This patch also adds the info for reference docs for PM QoS and cpuidle
sysfs.
Cc: Jonathan Corbet <cor...@lwn.net>
Cc: Sudeep Holla <sudeep.ho...@arm.com>
Reported-by: Kim Phillips <kim.phill...@arm.com>
Suggested-by: Mathieu Poirier <mathieu.poir...@linaro.or
On Tue, Sep 19, 2017 at 03:32:54PM -0600, Mathieu Poirier wrote:
> On 15 September 2017 at 04:16, Leo Yan <leo@linaro.org> wrote:
> > In the coresight CPU debug document it suggests to use 'echo' command
> > to set latency request to /dev/cpu_dma_latency so can disable al
on cpu_dma_latency.
This patch also adds the info for reference docs for PM QoS and cpuidle
sysfs.
Cc: Jonathan Corbet <cor...@lwn.net>
Cc: Mathieu Poirier <mathieu.poir...@linaro.org>
Cc: Sudeep Holla <sudeep.ho...@arm.com>
Reported-by: Kim Phillips <kim.phill...@arm.com>
Sig
Hi Sudeep,
On Wed, Aug 23, 2017 at 10:17:06AM +0100, Sudeep Holla wrote:
>
> On 23/08/17 08:23, Leo Yan wrote:
> > In the coresight CPU debug document it suggests to use 'echo' command
> > to set latency request to /dev/cpu_dma_latency so can disable all CPU
> >
: Kim Phillips <kim.phill...@arm.com>
Reported-by: Kim Phillips <kim.phill...@arm.com>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/trace/coresigh
Hi Andy, David,
[ + Nico ]
On Fri, May 26, 2017 at 12:04:13AM +0800, Leo Yan wrote:
> Add debug unit on Qualcomm msm8916 based platforms, including the
> DragonBoard 410c board.
Could you take a look for this patch? After get your ACK I think
Mathieu could help pick up this patch t
Hi Wei,
On Thu, May 25, 2017 at 11:57:15PM +0800, Leo Yan wrote:
> Bind debug module driver for Hi6220.
Could you ACK this patch? From Mathieu's previous suggestion, after
your confirmation he could pick up this patch.
If you want me to send a separate patch to you directly, also is o
On Mon, May 29, 2017 at 10:41:17AM -0600, Mathieu Poirier wrote:
> On 25 May 2017 at 09:57, Leo Yan <leo@linaro.org> wrote:
> > ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The
> > Sample-based Profiling Extension" has description for samplin
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 32
1 file
viewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../bindings/arm/coresight-cpu-debug.txt | 49 ++
h <mike.le...@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 175
1 file changed, 175 insertions(+)
create mode 100644 Documentation/trace/c
Bind debug module driver for Hi6220.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/ar
Add coresight_cpu_debug.enable to kernel-parameters.txt, this flag is
used to enable/disable the CPU sampling based debugging.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/admin-guide/kernel-parameters.txt |
m>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 43 +++---
include/linux/coresight.h | 3 +++
2 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_core
Update document file entries for Coresight debug module.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9e98464..86
latform_data]
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c
b/drivers/hwtracing/coresight/of_coresight.c
index 2749853
estion, added check for EDPRSR to avoid
lockup; added supporting EDVIDSR and EDCIDSR registers.
* According to Mark Rutland and Mathieu Poirier suggestion, rewrote
the documentation for DT binding.
* According to Mark and Mathieu suggestion, refined debug driver.
Leo Yan (8):
coresight: bindin
case I suggest modifiying the description to:
>
> "Control to enable coresight CPU debug functionality"
It's shame for checkpatch.pl warning. Although everytime I used script
before sending out patch set, should think a bit more to handle them
better. Have sent new patch set to dis
viewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../bindings/arm/coresight-cpu-debug.txt | 49 ++
h <mike.le...@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 175
1 file changed, 175 insertions(+)
create mode 100644 Documentation/trace/c
Add coresight_cpu_debug.enable to kernel-parameters.txt, this flag is
used to enable/disable the CPU sampling based debugging.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/admin-guide/kernel-parameters.txt |
latform_data]
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c
b/drivers/hwtracing/coresight/of_coresight.c
index 2749853
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 32
1 file
all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/Kconfig | 14 +
driv
Bind debug module driver for Hi6220.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/ar
m>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 43 +++---
include/linux/coresight.h | 3 +++
2 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_core
isters.
* According to Mark Rutland and Mathieu Poirier suggestion, rewrote
the documentation for DT binding.
* According to Mark and Mathieu suggestion, refined debug driver.
Leo Yan (8):
coresight: bindings for CPU debug module
doc: Add documentation for Coresight CPU debug
doc: Add
driver.
Changes from RFC:
* According to Mike Leach suggestion, added check for EDPRSR to avoid
lockup; added supporting EDVIDSR and EDCIDSR registers.
* According to Mark Rutland and Mathieu Poirier suggestion, rewrote
the documentation for DT binding.
* According to Mark and Mathieu suggestion, r
latform_data]
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c
b/drivers/hwtracing/coresight/of_coresight.c
index 2749853
m>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 43 +++---
include/linux/coresight.h | 3 +++
2 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_core
all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/Kconfig | 14 +
driv
Bind debug module driver for Hi6220.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/ar
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 32
1 file
viewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../bindings/arm/coresight-cpu-debug.txt | 49 ++
h <mike.le...@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 175
1 file changed, 175 insertions(+)
create mode 100644 Documentation/trace/c
On Mon, May 22, 2017 at 11:16:00AM +0100, Liviu Dudau wrote:
> On Fri, May 19, 2017 at 12:25:49PM +0800, Leo Yan wrote:
> > Add detailed documentation for Coresight CPU debug driver, which
> > contains the info for driver implementation, Mike Leach excellent
> > summary for &q
Update document file entries for Coresight debug module.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f7d568b..d4
m>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 43 +++---
include/linux/coresight.h | 3 +++
2 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_core
From: Suzuki K Poulose <suzuki.poul...@arm.com>
Add Coresight CPU debug nodes for Juno r0, r1 & r2. The CPU
debug areas are mapped at the same address for all revisions,
like the ETM, even though the CPUs have changed from r1 to r2.
Cc: Sudeep Holla <sudeep.ho...@arm.com>
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 32
1 file
Bind debug module driver for Hi6220.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/ar
all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/Kconfig | 14 +
driv
latform_data]
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c
b/drivers/hwtracing/coresight/of_coresight.c
index 2749853
Add coresight_cpu_debug.enable to kernel-parameters.txt, this flag is
used to enable/disable the CPU sampling based debugging.
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/admin-guide/kernel-parameters.txt |
viewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../bindings/arm/coresight-cpu-debug.txt | 49 ++
EDVIDSR and EDCIDSR registers.
* According to Mark Rutland and Mathieu Poirier suggestion, rewrote
the documentation for DT binding.
* According to Mark and Mathieu suggestion, refined debug driver.
Leo Yan (8):
coresight: bindings for CPU debug module
doc: Add documentation for Coresight CPU deb
h <mike.le...@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 174
1 file changed, 174 insertions(+)
create mode 100644 Documentation/trace/c
Hi Mathieu,
On Wed, May 03, 2017 at 04:29:37PM -0600, Mathieu Poirier wrote:
> On Tue, May 02, 2017 at 06:08:32PM +0800, Leo Yan wrote:
> > Update kernel-parameters.txt to add new parameter:
> > coresight_cpu_debug.enable is a knob to enable debugging at boot time.
> &
latform_data]
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c
b/drivers/hwtracing/coresight/of_coresight.c
index 2749853
Update document file entries for Coresight debug module.
Signed-off-by: Leo Yan <leo@linaro.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b948dfa..a4b1f60 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1191,7 +1191,
dded check for EDPRSR to avoid
lockup; added supporting EDVIDSR and EDCIDSR registers.
* According to Mark Rutland and Mathieu Poirier suggestion, rewrote
the documentation for DT binding.
* According to Mark and Mathieu suggestion, refined debug driver.
Leo Yan (8):
coresight: bindings
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/m
all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/Kconfig | 14 +
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwt
Bind debug module driver for Hi6220.
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/
m>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 43 +++---
include/linux/coresight.h | 3 +++
2 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_core
Add coresight_cpu_debug.enable to kernel-parameters.txt, this flag is
used to enable/disable the CPU sampling based debugging.
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/admin-guide/kernel-parameters.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documen
h <mike.le...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/trace/coresight-cpu-debug.txt | 174
1 file changed, 174 insertions(+)
create mode 100644 Documentation/trace/coresight-cpu-debug.txt
diff --git a/Documentation/trace/core
viewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../bindings/arm/coresight-cpu-debug.txt | 49 ++
m>
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 43 +++---
include/linux/coresight.h | 2 ++
2 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_core
Bind debug module driver for Hi6220.
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/
viewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
.../bindings/arm/coresight-cpu-debug.txt | 49 ++
all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/Kconfig | 14 +
drivers/hwtracing/coresight/Makefile | 1 +
drivers/hwt
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.
Signed-off-by: Leo Yan <leo@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/m
to enable the debugging functionality are provided.
Suggested-by: Mike Leach <mike.le...@linaro.org>
Signed-off-by: Leo Yan <leo@linaro.org>
---
Documentation/admin-guide/kernel-parameters.txt | 7 +
Documentation/trace/coresight-cpu-debug.txt | 174
2 files c
ing EDVIDSR and EDCIDSR registers.
* According to Mark Rutland and Mathieu Poirier suggestion, rewrote
the documentation for DT binding.
* According to Mark and Mathieu suggestion, refined debug driver.
Leo Yan (6):
coresight: bindings for CPU debug module
doc: Add documentation for Coresight
latform_data]
Signed-off-by: Leo Yan <leo@linaro.org>
---
drivers/hwtracing/coresight/of_coresight.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c
b/drivers/hwtracing/coresight/of_coresight.c
index 859ad49
1 - 100 of 142 matches
Mail list logo
