On Mon, 2017-11-20 at 15:10 +0100, Jiri Olsa wrote:
> On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:
>
> SNIP
>
> > +/* Branch Monitoring default and mask values */
> > +#define BM_MAX_WINDOW_SIZE 0x3ff
> > +#define BM_MAX_THRESHOLD 0
On Mon, 2017-11-20 at 15:07 +0100, Jiri Olsa wrote:
> On Fri, Nov 17, 2017 at 05:54:06PM -0800, Megha Dey wrote:
>
> SNIP
>
> > +IV. User-configurable inputs
> > +
> > +
> > +Several sysfs entries are provided in /sys/devices/
On Mon, 2017-11-20 at 12:57 +0100, Peter Zijlstra wrote:
> On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:
> > + mutex_lock(_counter_mutex);
> > + for (i = 0; i < BM_MAX_COUNTERS; i++) {
> > + if (bm_counter_owner[i] == NULL) {
> > +
On Tue, 2017-12-12 at 23:32 +0100, Peter Zijlstra wrote:
> On Tue, Dec 12, 2017 at 01:10:57PM -0800, Megha Dey wrote:
> > On Mon, 2017-11-20 at 12:57 +0100, Peter Zijlstra wrote:
> > > On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:
> > > > +
_event' function when used
9. Removed the setting of event->count to 0 in event_init. This is
redundant as this is its default value
10. Do not allow threshold to be set as 0
Megha Dey (3):
x86/cpu/intel: Add Cannonlake to Intel family
perf/x86/intel/bm.c: Add Intel Branch Monitoring supp
Add CPUID of Cannonlake (CNL) processors to Intel family list.
Signed-off-by: Megha Dey <megha@linux.intel.com>
---
arch/x86/include/asm/intel-family.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h
b/arch/x86/include/asm/intel-family.h
This patch adds the Documentation/x86/intel_bm.txt file with some
information about Intel Branch monitoring.
Signed-off-by: Megha Dey <megha@linux.intel.com>
---
Documentation/x86/intel_bm.txt | 216 +
1 file changed, 216 insertions(+)
creat
cks
Megha Dey (3):
x86/cpu/intel: Add Cannonlake to Intel family
perf/x86/intel/bm.c: Add Intel Branch Monitoring support
x86, bm: Add documentation on Intel Branch Monitoring
Documentation/x86/intel_bm.txt | 216 +
arch/x86/events/Kconfig | 10 +
arch/x86/eve
Add CPUID of Cannonlake (CNL) processors to Intel family list.
Signed-off-by: Megha Dey <megha@linux.intel.com>
---
arch/x86/include/asm/intel-family.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h
b/arch/x86/include/asm/intel-family.h
705937 seconds time elapsed
perf returns the number of branch monitoring interrupts occurred during
the execution of the user-space application.
Signed-off-by: Megha Dey <megha@linux.intel.com>
Signed-off-by: Yu-Cheng Yu <yu-cheng...@intel.com>
---
arch/x86/events/Kconfig
This patch adds the Documentation/x86/intel_bm.txt file with some
information about Intel Branch monitoring.
Signed-off-by: Megha Dey <megha@linux.intel.com>
---
Documentation/x86/intel_bm.txt | 216 +
1 file changed, 216 insertions(+)
creat
On Mon, 2017-11-06 at 13:49 +0200, Alexander Shishkin wrote:
> On Fri, Nov 03, 2017 at 11:00:05AM -0700, Megha Dey wrote:
> > +static int intel_bm_event_init(struct perf_event *event)
> > +{
>
> ...
>
> > + /*
> > +* Find a hardware counter for the ta
On Mon, 2017-11-13 at 21:25 +0100, Thomas Gleixner wrote:
> On Mon, 13 Nov 2017, Dey, Megha wrote:
> > >-Original Message-
> > >From: Peter Zijlstra [mailto:pet...@infradead.org]
> > >Sent: Monday, November 13, 2017 1:00 AM
> > >To: Megha Dey
This patch adds the Documentation/x86/intel_bm.txt file with some
information about Intel Branch monitoring.
Signed-off-by: Megha Dey <megha@linux.intel.com>
Signed-off-by: Yu-Cheng Yu <yu-cheng...@intel.com>
---
Documentation/x86/intel_
perf returns the number of branch monitoring interrupts occurred during
the execution of the user-space application.
Signed-off-by: Megha Dey <megha@linux.intel.com>
Signed-off-by: Yu-Cheng Yu <yu-cheng...@intel.com>
---
arch/x86/events/Kconfig | 10 +
arch/x86/events/inte
Add CPUID of Cannonlake (CNL) processors to Intel family list.
Signed-off-by: Megha Dey <megha@linux.intel.com>
---
arch/x86/include/asm/intel-family.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h
b/arch/x86/include/asm/intel-family.h
family list and the Documentation/x86/intel_bm.txt
file with some information about Intel Branch monitoring.
Megha Dey (3):
x86/cpu/intel: Add Cannonlake to Intel family
perf/x86/intel/bm.c: Add Intel Branch Monitoring support
x86, bm: Add documentation on Intel Branch Monitoring
On Wed, 2017-12-13 at 08:21 +0100, Peter Zijlstra wrote:
> On Tue, Dec 12, 2017 at 03:08:00PM -0800, Megha Dey wrote:
> > >
> > > There's work on the way to allow multiple HW PMUs. You'll either have to
> > > wait for that or help in making that happen. What you do
On Wed, 2017-12-20 at 13:23 -0800, Megha Dey wrote:
> On Wed, 2017-12-13 at 08:21 +0100, Peter Zijlstra wrote:
> > On Tue, Dec 12, 2017 at 03:08:00PM -0800, Megha Dey wrote:
> > > >
> > > > There's work on the way to allow multiple HW PMUs. You'll either have
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