From: "Edward A. James"
This series adds a hwmon driver to support the OCC on POWER8 and POWER9
processors. The OCC is an embedded processor that provides realtime power and
thermal monitoring and management.
This driver has two different platform drivers as a "base" for the
From: "Edward A. James"
Document the bindings for I2C-based OCC hwmon device.
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
From: "Edward A. James"
For the P8 OCC, add the procedure to send a command to the OCC over I2C
bus. This involves writing the OCC command registers with serial
communication operations (SCOMs) interpreted by the I2C slave. For the
P9 OCC, add a procedure to use the OCC
From: "Edward A. James"
Detail the sysfs attributes provided by the occ-hwmon driver.
Signed-off-by: Edward A. James
---
Documentation/ABI/testing/sysfs-driver-occ-hwmon | 85
1 file changed, 85 insertions(+)
create mode 100644
From: "Edward A. James"
Add method to parse the response from the OCC poll command. This only
needs to be done during probe(), since the OCC shouldn't change the
number or format of sensors while it's running. The parsed response
allows quick access to sensor data, as well as
From: "Edward A. James"
Create device attributes for additional OCC properties that do not
belong as hwmon sensors. These provide additional information as to the
state of the processor and system.
Signed-off-by: Edward A. James
---
From: "Edward A. James"
Setup the sensor attributes for every OCC sensor found by the first poll
response. Register the attributes with hwmon. Add hwmon documentation
for the driver.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 450
From: "Edward A. James"
Add logic to detect a number of error scenarios on the OCC. Export any
errors through an additional non-hwmon device attribute. The error
counting and state verification are required by the OCC hardware
specification.
Signed-off-by: Edward A. James
From: "Edward A. James"
Add structures to define all sensor types and versions. Add sysfs show
and store functions for each sensor type. Add a method to construct the
"set user power cap" command and send it to the OCC. Add rate limit to
polling the OCC (in case user-space
44 Documentation/hwmon/occ
diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..c88d0f5
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,75 @@
+Kernel driver occ-hwmon
+===
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Aut
s = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "occ-hwmon",
+ .of_match_table = p8_i2c_occ_of_match,
+ },
+ .probe = p8_i2c_occ_probe,
+};
+
+module_i2c_driver(p8_i2c_occ_driver);
+
+MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>&quo
From: "Edward A. James"
Document the bindings for the FSI-based OCC hwmon device.
Signed-off-by: Edward A. James
---
.../devicetree/bindings/fsi/ibm,p9-occ-hwmon.txt | 16
1 file changed, 16 insertions(+)
create mode 100644
On 08/17/2017 10:11 AM, Rob Herring wrote:
On Thu, Aug 10, 2017 at 05:19:44PM -0500, Eddie James wrote:
From: "Edward A. James" <eaja...@us.ibm.com>
Signed-off-by: Edward A. James <eaja...@us.ibm.com>
---
.../devicetree/bindings/i2c/ibm,power-ps.txt| 21 +++
On 08/14/2017 05:37 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 02:26:20PM -0500, Eddie James wrote:
On 08/14/2017 01:53 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote:
From: "Edward A. James" <eaja...@us.ibm.com>
Signed-off-by:
On 08/14/2017 01:53 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote:
From: "Edward A. James" <eaja...@us.ibm.com>
Signed-off-by: Edward A. James <eaja...@us.ibm.com>
---
Documentation/hwmon/ibm-cffps | 54 +
From: "Edward A. James"
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,cffps1.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/ibm,cffps1.txt
diff
From: "Edward A. James"
This series adds a hwmon pmbus driver for a POWER System power supply. The
core monitoring functionality is provided by pmbus.
Changes since v2:
* Renamed the driver again...
* Remove debugfs bool from pmbus_driver_info.
* Add comment for returning
--git a/Documentation/hwmon/ibm-cffps b/Documentation/hwmon/ibm-cffps
new file mode 100644
index 000..e091ff2
--- /dev/null
+++ b/Documentation/hwmon/ibm-cffps
@@ -0,0 +1,54 @@
+Kernel driver ibm-cffps
+===
+
+Supported chips:
+ * IBM Common Form Factor power supply
+
+Aut
",
+ .of_match_table = ibm_cffps_of_match,
+ },
+ .probe = ibm_cffps_probe,
+ .remove = pmbus_do_remove,
+ .id_table = ibm_cffps_id,
+};
+
+module_i2c_driver(ibm_cffps_driver);
+
+MODULE_AUTHOR("Eddie James");
+MODULE_DESCRIPTION("PMBus driver for I
On 08/10/2017 08:18 PM, Guenter Roeck wrote:
On Thu, Aug 10, 2017 at 05:19:45PM -0500, Eddie James wrote:
From: "Edward A. James" <eaja...@us.ibm.com>
Add the driver to monitor POWER system power supplies with hwmon over
pmbus.
Signed-off-by: Edward A. James <
rps_of_match,
+ },
+ .probe = powerps_probe,
+ .remove = pmbus_do_remove,
+ .id_table = powerps_id,
+};
+
+module_i2c_driver(powerps_driver);
+
+MODULE_AUTHOR("Eddie James");
+MODULE_DESCRIPTION("PMBus driver for POWER system power supplies");
+MODULE_LICENSE(&quo
From: "Edward A. James"
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,power-ps.txt| 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/ibm,power-ps.txt
diff
a/Documentation/hwmon/powerps b/Documentation/hwmon/powerps
new file mode 100644
index 000..a4fbe92
--- /dev/null
+++ b/Documentation/hwmon/powerps
@@ -0,0 +1,54 @@
+Kernel driver powerps
+=
+
+Supported chips:
+ * POWER system power supply
+
+Author: Eddie Jam
From: "Edward A. James"
This series adds a hwmon pmbus driver for a POWER System power supply. The
core monitoring functionality is provided by pmbus.
This series depends on the pmbus core extensions for debugfs recently submitted
to the mailing list (latest:
From: "Edward A. James"
This series adds a hwmon driver to support the OCC on POWER8 and POWER9
processors. The OCC is an embedded processor that provides realtime power and
thermal monitoring and management.
This driver has two different platform drivers as a "base" for the
From: "Edward A. James"
For the P8 OCC, add the procedure to send a command to the OCC over I2C
bus. This involves writing the OCC command registers with serial
communication operations (SCOMs) interpreted by the I2C slave. For the
P9 OCC, add a procedure to use the OCC
From: "Edward A. James"
Create device attributes for additional OCC properties that do not
belong as hwmon sensors. These provide additional information as to the
state of the processor and system.
Signed-off-by: Edward A. James
---
s = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "occ-hwmon",
+ .of_match_table = p8_i2c_occ_of_match,
+ },
+ .probe = p8_i2c_occ_probe,
+};
+
+module_i2c_driver(p8_i2c_occ_driver);
+
+MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>&quo
From: "Edward A. James"
Setup the sensor attributes for every OCC sensor found by the first poll
response. Register the attributes with hwmon. Add hwmon documentation
for the driver.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 432
44 Documentation/hwmon/occ
diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..dcae911
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,74 @@
+Kernel driver occ-hwmon
+===
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Aut
From: "Edward A. James"
Detail the sysfs attributes provided by the occ-hwmon driver.
Signed-off-by: Edward A. James
---
Documentation/ABI/testing/sysfs-driver-occ-hwmon | 77
1 file changed, 77 insertions(+)
create mode 100644
From: "Edward A. James"
Add logic to detect a number of error scenarios on the OCC. Export any
errors through an additional non-hwmon device attribute. The error
counting and state verification are required by the OCC hardware
specification.
Signed-off-by: Edward A. James
From: "Edward A. James"
Document the bindings for I2C-based OCC hwmon driver.
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
From: "Edward A. James"
Add method to parse the response from the OCC poll command. This only
needs to be done during probe(), since the OCC shouldn't change the
number or format of sensors while it's running. The parsed response
allows quick access to sensor data, as well as
On 04/02/2017 06:19 AM, Guenter Roeck wrote:
On 03/14/2017 01:55 PM, Eddie James wrote:
From: "Edward A. James" <eaja...@us.ibm.com>
Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.
Signed-off-by: Edward A. James <eaja...@us.ibm.com>
Signed-
From: "Edward A. James"
This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.
The
===
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Please note that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James <eaj
hwmon,
+ >occ_info,
+ NULL);
+ if (IS_ERR(hwmon->dev)) {
+ dev_err(dev, "cannot register hwmon device %s: %ld\n",
+ h
er = {
+ .class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = OCC_P8_I2C_NAME,
+ .of_match_table = occ_of_match,
+ },
+ .probe = p8_occ_probe,
+ .id_table = occ_ids,
+};
+
+module_i2c_driver(p8_occ_driver);
+
+MODULE_AUTHOR("Eddie James <eaja...@us.i
{
+ .command_addr = 0x6000,
+ .response_addr = 0x7000,
+ .ops = _ops,
+};
+
+const u32 *p8_get_sensor_hwmon_configs()
+{
+ return p8_sensor_hwmon_configs;
+}
+
+struct occ *p8_occ_init(struct device *dev, void *bus,
+ const struct occ_bus_ops *bus_ops)
+{
+
buf[2] = data0;
+
+ rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3);
+ if (rc < 0)
+ return rc;
+ else if (rc != sizeof(u32) * 3)
+ return -EIO;
+
+ return 0;
+}
+
+MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>")
===
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Please note that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James <eaj
buf[2] = data0;
+
+ rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3);
+ if (rc < 0)
+ return rc;
+ else if (rc != sizeof(u32) * 3)
+ return -EIO;
+
+ return 0;
+}
+
+MODULE_AUTHOR("Eddie James <eaja...@us.ibm.com>")
er = {
+ .class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = OCC_P8_I2C_NAME,
+ .of_match_table = occ_of_match,
+ },
+ .probe = p8_occ_probe,
+ .id_table = occ_ids,
+};
+
+module_i2c_driver(p8_occ_driver);
+
+MODULE_AUTHOR("Eddie James <eaja...@us.i
nsor = p9_alloc_sensor,
+ .get_sensor = p9_get_sensor,
+};
+
+static const struct occ_init_data p9_init = {
+ .command_addr = 0xFFFBE000,
+ .response_addr = 0xFFFBF000,
+ .ops = _ops,
+};
+
+const u32 *p9_get_sensor_hwmon_configs()
+{
+ return p9_sensor_hwmon_c
{
+ .command_addr = 0x6000,
+ .response_addr = 0x7000,
+ .ops = _ops,
+};
+
+const u32 *p8_get_sensor_hwmon_configs()
+{
+ return p8_sensor_hwmon_configs;
+}
+
+struct occ *p8_occ_init(struct device *dev, void *bus,
+ const struct occ_bus_ops *bus_ops)
+{
+
_info,
+ NULL);
+ if (IS_ERR(hwmon->dev)) {
+ dev_err(dev, "cannot register hwmon device %s: %ld\n",
+ hwmon->hwmon_name, PTR_ERR(hwmon->dev));
+ return ERR_CAST(hwmon->dev);
+
From: "Edward A. James"
This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.
The
DRIVER
Mention P8 and P9?
+M: Eddie James <eaja...@us.ibm.com>
+L: linux-hw...@vger.kernel.org
Have you subscribed to this list? Would you prefer the mail to come to
the openbmc list?
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
ONENAND FLAS
49 matches
Mail list logo