Re: [PATCH v6 4/5] arm64: dts: sdm845: Add serial console support
On 05/23/2018 08:43 PM, Doug Anderson wrote: > Rajendra, > > On Tue, May 22, 2018 at 11:30 PM, Rajendra Nayak <rna...@codeaurora.org> > wrote: >> >> >> On 03/30/2018 10:38 PM, Karthikeyan Ramasubramanian wrote: >>> From: Rajendra Nayak <rna...@codeaurora.org> >>> >>> Add the qup uart node and geni se instance needed to >>> support the serial console on the MTP. >>> >>> Signed-off-by: Rajendra Nayak <rna...@codeaurora.org> >>> Signed-off-by: Karthikeyan Ramasubramanian <krama...@codeaurora.org> >>> --- >> >> Andy, is it possible to pull this one in for 4.18? >> Sorry, I only realized we somehow missed this after looking at your pull >> request. >> >> This is the only patch that prevents linux-next from booting up my sdm845 MTP >> to a minimal console shell. > > It was in Andy's tree but then got dropped. Unfortunately the clock > bindings didn't land early enough so it's a bit difficult to land any > device tree changes that use the clock bindings until the next kernel > revision... ah, okay, did not realize that. Thanks for clarifying. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 4/5] arm64: dts: sdm845: Add serial console support
On 03/30/2018 10:38 PM, Karthikeyan Ramasubramanian wrote:
> From: Rajendra Nayak <rna...@codeaurora.org>
>
> Add the qup uart node and geni se instance needed to
> support the serial console on the MTP.
>
> Signed-off-by: Rajendra Nayak <rna...@codeaurora.org>
> Signed-off-by: Karthikeyan Ramasubramanian <krama...@codeaurora.org>
> ---
Andy, is it possible to pull this one in for 4.18?
Sorry, I only realized we somehow missed this after looking at your pull
request.
This is the only patch that prevents linux-next from booting up my sdm845 MTP
to a minimal console shell.
Thanks,
Rajendra
> arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 41
> +
> arch/arm64/boot/dts/qcom/sdm845.dtsi| 39 +++
> 2 files changed, 80 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> index 979ab49..17b2fb0 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> @@ -12,4 +12,45 @@
> / {
> model = "Qualcomm Technologies, Inc. SDM845 MTP";
> compatible = "qcom,sdm845-mtp";
> +
> + aliases {
> + serial0 =
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> + {
> + geniqup@ac {
> + status = "okay";
> +
> + serial@a84000 {
> + status = "okay";
> + };
> + };
> +
> + pinctrl@340 {
> + qup-uart2-default {
> + pinconf_tx {
> + pins = "gpio4";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + pinconf_rx {
> + pins = "gpio5";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +
> + qup-uart2-sleep {
> + pinconf {
> + pins = "gpio4", "gpio5";
> + bias-pull-down;
> + };
> + };
> + };
> };
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 32f8561..71801b9 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -6,6 +6,7 @@
> */
>
> #include
> +#include
>
> / {
> interrupt-parent = <>;
> @@ -194,6 +195,20 @@
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> +
> + qup_uart2_default: qup-uart2-default {
> + pinmux {
> + function = "qup9";
> + pins = "gpio4", "gpio5";
> + };
> + };
> +
> + qup_uart2_sleep: qup-uart2-sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio4", "gpio5";
> + };
> + };
> };
>
> timer@17c9 {
> @@ -272,5 +287,29 @@
> #interrupt-cells = <4>;
> cell-index = <0>;
> };
> +
> + geniqup@ac {
> + compatible = "qcom,geni-se-qup";
> + reg = <0xac 0x6000>;
> + clock-names = "m-ahb", "s-ahb";
> + clocks = < GCC_QUPV3_WRAP_1_M_AHB_CLK>,
> + < GCC_QUPV3_WRAP_1_S_AHB_CLK>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + status = "disabled";
> +
> + uart2: serial@a84000 {
> + compatible = "qcom,geni-debug-uart";
> + reg = <0xa84000 0x4000>;
> + clock-names = "se";
> + clocks = < GCC_QUPV3_WRAP1_S1_CLK>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <_uart2_default>;
> + pinctrl-1 = <_uart2_sleep>;
> + interrupts = ;
> + status = "disabled";
> + };
> + };
> };
> };
>
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Re: [PATCH v4 5/6] arm64: dts: sdm845: Add serial console support
On 3/21/2018 1:09 AM, Stephen Boyd wrote:
Quoting Karthikeyan Ramasubramanian (2018-03-14 16:58:50)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
index 979ab49..ea3efc5 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
@@ -12,4 +12,43 @@
/ {
model = "Qualcomm Technologies, Inc. SDM845 MTP";
compatible = "qcom,sdm845-mtp";
+
+ aliases {
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0";
Also add :115200n8 ?
+ };
+};
+
+ {
I think the method is to put these inside soc node without using the
phandle reference. So indent everything once more.
Some of this was discussed in the previous versions [1] and we arrived
at a consensus to follow this way of doing it.
Bjorn also said he was going to do a series to move all the existing
dts files to follow similar convention so its all consistent.
https://lkml.org/lkml/2018/2/6/676
+ geniqup@ac {
+ serial@a84000 {
+ status = "okay";
+ };
+ };
+
+ pinctrl@340 {
+ qup-uart2-default {
+ pinconf_tx {
+ pins = "gpio4";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ pinconf_rx {
+ pins = "gpio5";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ qup-uart2-sleep {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ bias-pull-down;
+ };
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 32f8561..59334d9 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -6,6 +6,7 @@
*/
#include
+#include
/ {
interrupt-parent = <>;
@@ -194,6 +195,20 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+
+ qup_uart2_default: qup-uart2-default {
+ pinmux {
+ function = "qup9";
+ pins = "gpio4", "gpio5";
+ };
+ };
+
+ qup_uart2_sleep: qup-uart2-sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio4", "gpio5";
+ };
+ };
Are these supposed to go to the board file?
Again, this was discussed in the previous versions, and we decided it
makes sense to have the pinmux (default) which rarely changes across
boards in the SoC file, and have boards specify the pinconf (electrical)
properties.
And get rid of all the soc-pins/board-pins/pmic-pins files.
https://lkml.org/lkml/2018/2/6/693
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Re: [PATCH v2 3/7] soc: qcom: Add GENI based QUP Wrapper driver
[].. >> diff --git a/drivers/soc/qcom/qcom-geni-se.c >> b/drivers/soc/qcom/qcom-geni-se.c >> new file mode 100644 >> index 000..3f43582 >> --- /dev/null >> +++ b/drivers/soc/qcom/qcom-geni-se.c >> @@ -0,0 +1,1016 @@ >> +/* >> + * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 and >> + * only version 2 as published by the Free Software Foundation. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + */ > > Please use SPDX style license header, i.e. this file should start with: > > // SPDX-License-Identifier: GPL-2.0 > /* > * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. > */ Looks like Mark Brown commented elsewhere [1] that we should use the C++ commenting style even for the Linux Foundation copyright? [1] https://marc.info/?l=linux-clk=151497978626135=2 -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
