[PATCH linux v5 2/6] hwmon: occ: Add sysfs interface

2017-01-30 Thread eajames . ibm 
From: "Edward A. James" 

Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ   |  62 +++
 drivers/hwmon/occ/Makefile|   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 251 ++
 drivers/hwmon/occ/occ_sysfs.h |  30 +
 4 files changed, 344 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 79d1642..d0bdf06 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,68 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports a number of sysfs files for each type of sensor. The
+sensor-specific files vary depending on the processor type, though many of the
+attributes are common for both the POWER8 and POWER9.
+
+The hwmon interface cannot define every type of sensor that may be used.
+Therefore, the frequency sensor on the OCC uses the "input" type sensor defined
+by the hwmon interface, rather than defining a new type of custom sensor.
+
+Below are detailed the names and meaning of each sensor file for both types of
+processors. All sensors are read-only unless otherwise specified.  indicates
+the hwmon index. sensor id indicates the unique internal OCC identifer. Please
+see the POWER OCC specification for details on all these sensor values.
+
+frequency:
+   all processors:
+   in_input - frequency value
+   in_label - sensor id
+temperature:
+   POWER8:
+   temp_input - temperature value
+   temp_label - sensor id
+   POWER9 (in addition to above):
+   temp_type - FRU type
+
+power:
+   POWER8:
+   power_input - power value
+   power_label - sensor id
+   power_average - accumulator
+   power_average_interval - update tag (number of samples in
+   accumulator)
+   POWER9:
+   power_input - power value
+   power_label - sensor id
+   power_average_min - accumulator[0]
+   power_average_max - accumulator[1] (64 bits total)
+   power_average_interval - update tag
+   power_reset_history - (function_id | (apss_channel << 8)
+
+caps:
+   POWER8:
+   power_cap - current powercap
+   power_cap_max - max powercap
+   power_cap_min - min powercap
+   power_max - normal powercap
+   power_alarm - user powercap, r/w
+   POWER9:
+   power_cap_alarm - user powercap source
+
+The driver also provides two sysfs entries through hwmon to better
+control the driver and monitor the master OCC. Though there may be multiple
+OCCs present on the system, these two files are only present for the "master"
+OCC.
+   name - read the name of the driver
+   update_interval - read or write the minimum interval for polling the
+   OCC.
+
 BMC - Host Communications
 -
 
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index 93cb52f..a6881f9 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
diff --git a/drivers/hwmon/occ/occ_sysfs.c b/drivers/hwmon/occ/occ_sysfs.c
new file mode 100644
index 000..9598f78
--- /dev/null
+++ b/drivers/hwmon/occ/occ_sysfs.c
@@ -0,0 +1,251 @@
+/*
+ * occ_sysfs.c - OCC sysfs interface
+ *
+ * This file contains the methods and data structures for implementing the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_sysfs.h"
+
+#define OCC_HWMON_NAME_LENGTH  32
+
+struct occ_sysfs {
+   struct device *dev;
+   struct occ *occ;
+
+   char hwmon_name[OCC_HWMON_NAME_LENGTH + 1];
+   const u32

[PATCH linux v5 0/6] drivers: hwmon: Add On-Chip Controller driver

2017-01-30 Thread eajames . ibm 
From: "Edward A. James" 

This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set
user power caps, and perform some basic OCC error handling. It interfaces
with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips.
Communicating with the POWER9 OCC requries FSI support.

Edward A. James (6):
  hwmon: Add core On-Chip Controller support for POWER CPUs
  hwmon: occ: Add sysfs interface
  hwmon: occ: Add I2C transport implementation for SCOM operations
  hwmon: occ: Add callbacks for parsing P8 OCC datastructures
  hwmon: occ: Add hwmon implementation for the P8 OCC
  hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ | 114 ++
 MAINTAINERS |   7 +
 drivers/hwmon/Kconfig   |   2 +
 drivers/hwmon/Makefile  |   1 +
 drivers/hwmon/occ/Kconfig   |  29 ++
 drivers/hwmon/occ/Makefile  |   2 +
 drivers/hwmon/occ/occ.c | 470 
 drivers/hwmon/occ/occ.h |  80 
 drivers/hwmon/occ/occ_p8.c  | 247 +
 drivers/hwmon/occ/occ_p8.h  |  30 ++
 drivers/hwmon/occ/occ_p9.c  | 308 
 drivers/hwmon/occ/occ_p9.h  |  30 ++
 drivers/hwmon/occ/occ_scom_i2c.c|  77 
 drivers/hwmon/occ/occ_scom_i2c.h|  26 ++
 drivers/hwmon/occ/occ_sysfs.c   | 251 +
 drivers/hwmon/occ/occ_sysfs.h   |  30 ++
 drivers/hwmon/occ/p8_occ_i2c.c  | 104 ++
 drivers/hwmon/occ/scom.h|  47 +++
 19 files changed, 1868 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c
 create mode 100644 drivers/hwmon/occ/scom.h

-- 
1.8.3.1

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[PATCH linux v5 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2017-01-30 Thread eajames . ibm 
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  40 
 MAINTAINERS|   7 +
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  15 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 470 +
 drivers/hwmon/occ/occ.h|  80 
 drivers/hwmon/occ/scom.h   |  47 +
 9 files changed, 663 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..79d1642
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,40 @@
+Kernel driver occ
+=
+
+Supported chips:
+ * ASPEED AST2400
+ * ASPEED AST2500
+
+Please note that the chip must be connected to a POWER8 or POWER9 processor
+(see the BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f10c28..193a13b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9128,6 +9128,13 @@ T:   git git://linuxtv.org/media_tree.git
 S: Maintained
 F: drivers/media/i2c/ov7670.c
 
+ON-CHIP CONTROLLER HWMON DRIVER
+M: Eddie James 
+L: linux-hw...@vger.kernel.org
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
 ONENAND FLASH DRIVER
 M: Kyungmin Park 
 L: linux-...@lists.infradead.org
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..c7ec5d4 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_PPC_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..cdb64a7
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,15 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_PPC_OCC
+   bool "PPC On-Chip Controller"
+   help
+ If you say yes here you get support to monitor Power CPU
+ sensors via the On-Chip Controller (OCC).
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
+
+ This driver can also be built as a module. If so, the module
+ will be called occ.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..93cb52f
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
diff --git a/drivers/hwmon/occ/occ.c

[PATCH linux v5 5/6] hwmon: occ: Add hwmon implementation for the P8 OCC

2017-01-30 Thread eajames . ibm 
From: "Edward A. James" 

Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +++
 drivers/hwmon/occ/Kconfig   |  14 
 drivers/hwmon/occ/Makefile  |   1 +
 drivers/hwmon/occ/p8_occ_i2c.c  | 104 
 4 files changed, 132 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c

diff --git a/Documentation/devicetree/bindings/hwmon/occ.txt 
b/Documentation/devicetree/bindings/hwmon/occ.txt
new file mode 100644
index 000..b0d2b36
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/occ.txt
@@ -0,0 +1,13 @@
+HWMON I2C driver for IBM POWER CPU OCC (On Chip Controller)
+
+Required properties:
+ - compatible: must be "ibm,p8-occ-i2c"
+ - reg: physical address
+
+Example:
+i2c3: i2c-bus@100 {
+   occ@50 {
+   compatible = "ibm,p8-occ-i2c";
+   reg = <0x50>;
+   };
+};
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
index cdb64a7..3a5188f 100644
--- a/drivers/hwmon/occ/Kconfig
+++ b/drivers/hwmon/occ/Kconfig
@@ -13,3 +13,17 @@ menuconfig SENSORS_PPC_OCC
 
  This driver can also be built as a module. If so, the module
  will be called occ.
+
+if SENSORS_PPC_OCC
+
+config SENSORS_PPC_OCC_P8_I2C
+   tristate "POWER8 OCC hwmon support"
+   depends on I2C
+   help
+Provide a hwmon sysfs interface for the POWER8 On-Chip Controller,
+exposing temperature, frequency and power measurements.
+
+This driver can also be built as a module. If so, the module will be
+called p8-occ-i2c.
+
+endif
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index a6881f9..9294b58 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
+obj-$(CONFIG_SENSORS_PPC_OCC_P8_I2C) += occ_scom_i2c.o occ_p8.o p8_occ_i2c.o
diff --git a/drivers/hwmon/occ/p8_occ_i2c.c b/drivers/hwmon/occ/p8_occ_i2c.c
new file mode 100644
index 000..6273040
--- /dev/null
+++ b/drivers/hwmon/occ/p8_occ_i2c.c
@@ -0,0 +1,104 @@
+/*
+ * p8_occ_i2c.c - hwmon OCC driver
+ *
+ * This file contains the i2c layer for accessing the P8 OCC over i2c bus.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ_p8.h"
+#include "occ_scom_i2c.h"
+#include "occ_sysfs.h"
+#include "scom.h"
+
+#define P8_OCC_I2C_NAME"p8-occ-i2c"
+
+int p8_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_getscom(bus, address, data);
+}
+
+int p8_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_putscom(bus, address, data0, data1);
+}
+
+static struct occ_bus_ops p8_bus_ops = {
+   .getscom = p8_i2c_getscom,
+   .putscom = p8_i2c_putscom,
+};
+
+static int p8_occ_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   struct occ *occ;
+   struct occ_sysfs *hwmon;
+   const u32 *sensor_hwmon_configs = p8_get_sensor_hwmon_configs();
+
+   occ = p8_occ_start(>dev, client, _bus_ops);
+   if (IS_ERR(occ))
+   return PTR_ERR(occ);
+
+   hwmon = occ_sysfs_start(>dev, occ, sensor_hwmon_configs,
+   P8_OCC_I2C_NAME);
+   if (IS_ERR(hwmon))
+   return PTR_ERR(hwmon);
+
+   i2c_set_clientdata(client, occ);
+
+   return 0;
+}
+
+/* used by old-style board info. */
+static const struct i2c_device_id occ_ids[] = {
+   { P8_OCC_I2C_NAME, 0 },
+   {}
+};
+MODULE_DEVICE_TABLE(i2c, occ_ids);
+
+/* used by device table */
+static const struct of_device_id occ_of_match[] = {
+   { .compatible = "ibm,p8-occ-i2c" },
+   {}
+};
+MODULE_DEVICE_TABLE(of, occ_of_match);
+
+static struct i2c_driver p8_occ_driver = {
+   .class = I2C_CLASS_HWMON,
+

[PATCH linux v4 6/6] hwmon: occ: Add callbacks for parsing P9 OCC datastructures

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER9 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   3 +
 drivers/hwmon/occ/occ_p9.c | 308 +
 drivers/hwmon/occ/occ_p9.h |  30 +
 3 files changed, 341 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 143951e..6cea853 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -34,6 +34,9 @@ number of data structures, such as command format, response 
headers, and the
 like, are also defined in this specification, and are common to both POWER8 and
 POWER9 OCCs.
 
+There is currently no public P9 OCC specification, and the data structures
+defined in the POWER9 OCC driver are subject to change.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p9.c b/drivers/hwmon/occ/occ_p9.c
new file mode 100644
index 000..d99a026
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p9.c
@@ -0,0 +1,308 @@
+/*
+ * occ_p9.c - OCC hwmon driver
+ *
+ * This file contains the Power9-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_p9.h"
+
+/* P9 OCC sensor data format */
+struct p9_temp_sensor {
+   u32 sensor_id;
+   u8 fru_type;
+   u8 value;
+};
+
+struct p9_freq_sensor {
+   u32 sensor_id;
+   u16 value;
+};
+
+struct p9_power_sensor {
+   u32 sensor_id;
+   u8 function_id;
+   u8 apss_channel;
+   u16 reserved;
+   u32 update_tag;
+   u64 accumulator;
+   u16 value;
+};
+
+struct p9_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+   u8 user_powerlimit_source;
+};
+
+static const u32 p9_sensor_hwmon_configs[MAX_OCC_SENSOR_TYPE] = {
+   HWMON_I_INPUT | HWMON_I_LABEL,  /* freq: value | label */
+   /* temp: value | label | fru_type */
+   HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_TYPE,
+   /* power: value | label | accum[0] | accum[1] | update_tag |
+*   (function_id | (apss_channel << 8))
+*/
+   HWMON_P_INPUT | HWMON_P_LABEL | HWMON_P_AVERAGE_MIN |
+   HWMON_P_AVERAGE_MAX | HWMON_P_AVERAGE_INTERVAL |
+   HWMON_P_RESET_HISTORY,
+   /* caps: curr | max | min | norm | user | source */
+   HWMON_P_CAP | HWMON_P_CAP_MAX | HWMON_P_CAP_MIN | HWMON_P_MAX |
+   HWMON_P_ALARM | HWMON_P_CAP_ALARM,
+};
+
+void p9_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   {
+   struct p9_freq_sensor *fs =
+   &(((struct p9_freq_sensor *)sensor)[snum]);
+
+   fs->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->value = be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   }
+   break;
+   case TEMP:
+   {
+   struct p9_temp_sensor *ts =
+   &(((struct p9_temp_sensor *)sensor)[snum]);
+
+   ts->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->fru_type = data[off + 4];
+   fs->value = data[off + 5];
+   }
+   break;
+   case POWER:
+   {
+   struct p9_power_sensor *ps =
+   &(((struct p9_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   ps->function_id = data[off + 4];
+   ps->apss_channel = data[off + 5];
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 8]));
+   ps->accumulator =
+   be64_to_cpu(get_unaligned((u64 *)[off + 12]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 20]));
+   }
+   break;
+   case CAPS:
+   {
+   struct

[PATCH linux v4 5/6] hwmon: occ: Add hwmon implementation for the P8 OCC

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +++
 drivers/hwmon/occ/Kconfig   |  14 
 drivers/hwmon/occ/Makefile  |   1 +
 drivers/hwmon/occ/p8_occ_i2c.c  | 104 
 4 files changed, 132 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c

diff --git a/Documentation/devicetree/bindings/hwmon/occ.txt 
b/Documentation/devicetree/bindings/hwmon/occ.txt
new file mode 100644
index 000..b0d2b36
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/occ.txt
@@ -0,0 +1,13 @@
+HWMON I2C driver for IBM POWER CPU OCC (On Chip Controller)
+
+Required properties:
+ - compatible: must be "ibm,p8-occ-i2c"
+ - reg: physical address
+
+Example:
+i2c3: i2c-bus@100 {
+   occ@50 {
+   compatible = "ibm,p8-occ-i2c";
+   reg = <0x50>;
+   };
+};
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
index cdb64a7..3a5188f 100644
--- a/drivers/hwmon/occ/Kconfig
+++ b/drivers/hwmon/occ/Kconfig
@@ -13,3 +13,17 @@ menuconfig SENSORS_PPC_OCC
 
  This driver can also be built as a module. If so, the module
  will be called occ.
+
+if SENSORS_PPC_OCC
+
+config SENSORS_PPC_OCC_P8_I2C
+   tristate "POWER8 OCC hwmon support"
+   depends on I2C
+   help
+Provide a hwmon sysfs interface for the POWER8 On-Chip Controller,
+exposing temperature, frequency and power measurements.
+
+This driver can also be built as a module. If so, the module will be
+called p8-occ-i2c.
+
+endif
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index a6881f9..9294b58 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
+obj-$(CONFIG_SENSORS_PPC_OCC_P8_I2C) += occ_scom_i2c.o occ_p8.o p8_occ_i2c.o
diff --git a/drivers/hwmon/occ/p8_occ_i2c.c b/drivers/hwmon/occ/p8_occ_i2c.c
new file mode 100644
index 000..6273040
--- /dev/null
+++ b/drivers/hwmon/occ/p8_occ_i2c.c
@@ -0,0 +1,104 @@
+/*
+ * p8_occ_i2c.c - hwmon OCC driver
+ *
+ * This file contains the i2c layer for accessing the P8 OCC over i2c bus.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ_p8.h"
+#include "occ_scom_i2c.h"
+#include "occ_sysfs.h"
+#include "scom.h"
+
+#define P8_OCC_I2C_NAME"p8-occ-i2c"
+
+int p8_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_getscom(bus, address, data);
+}
+
+int p8_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_putscom(bus, address, data0, data1);
+}
+
+static struct occ_bus_ops p8_bus_ops = {
+   .getscom = p8_i2c_getscom,
+   .putscom = p8_i2c_putscom,
+};
+
+static int p8_occ_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   struct occ *occ;
+   struct occ_sysfs *hwmon;
+   const u32 *sensor_hwmon_configs = p8_get_sensor_hwmon_configs();
+
+   occ = p8_occ_start(>dev, client, _bus_ops);
+   if (IS_ERR(occ))
+   return PTR_ERR(occ);
+
+   hwmon = occ_sysfs_start(>dev, occ, sensor_hwmon_configs,
+   P8_OCC_I2C_NAME);
+   if (IS_ERR(hwmon))
+   return PTR_ERR(hwmon);
+
+   i2c_set_clientdata(client, occ);
+
+   return 0;
+}
+
+/* used by old-style board info. */
+static const struct i2c_device_id occ_ids[] = {
+   { P8_OCC_I2C_NAME, 0 },
+   {}
+};
+MODULE_DEVICE_TABLE(i2c, occ_ids);
+
+/* used by device table */
+static const struct of_device_id occ_of_match[] = {
+   { .compatible = "ibm,p8-occ-i2c" },
+   {}
+};
+MODULE_DEVICE_TABLE(of, occ_of_match);
+
+static struct i2c_driver p8_occ_driver = {
+   .class = I2C_CLASS_HWMON,
+

[PATCH linux v4 4/6] hwmon: occ: Add callbacks for parsing P8 OCC datastructures

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER8 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   9 ++
 drivers/hwmon/occ/occ_p8.c | 247 +
 drivers/hwmon/occ/occ_p8.h |  30 ++
 3 files changed, 286 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index d0bdf06..143951e 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,15 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+The format for the POWER8 OCC sensor data can be found in the P8 OCC
+specification:
+github.com/open-power/docs/blob/master/occ/OCC_OpenPwr_FW_Interfaces.pdf
+This document provides the details of the OCC sensors: power, frequency,
+temperature, and caps. These sensor formats are specific to the POWER8 OCC. A
+number of data structures, such as command format, response headers, and the
+like, are also defined in this specification, and are common to both POWER8 and
+POWER9 OCCs.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p8.c b/drivers/hwmon/occ/occ_p8.c
new file mode 100644
index 000..32215ed
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p8.c
@@ -0,0 +1,247 @@
+/*
+ * occ_p8.c - OCC hwmon driver
+ *
+ * This file contains the Power8-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_p8.h"
+
+/* P8 OCC sensor data format */
+struct p8_occ_sensor {
+   u16 sensor_id;
+   u16 value;
+};
+
+struct p8_power_sensor {
+   u16 sensor_id;
+   u32 update_tag;
+   u32 accumulator;
+   u16 value;
+};
+
+struct p8_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+};
+
+static const u32 p8_sensor_hwmon_configs[MAX_OCC_SENSOR_TYPE] = {
+   HWMON_I_INPUT | HWMON_I_LABEL,  /* freq: value | label */
+   HWMON_T_INPUT | HWMON_T_LABEL,  /* temp: value | label */
+   /* power: value | label | accumulator | update_tag */
+   HWMON_P_INPUT | HWMON_P_LABEL | HWMON_P_AVERAGE |
+   HWMON_P_AVERAGE_INTERVAL,
+   /* caps: curr | max | min | norm | user */
+   HWMON_P_CAP | HWMON_P_CAP_MAX | HWMON_P_CAP_MIN | HWMON_P_MAX |
+   HWMON_P_ALARM,
+};
+
+void p8_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   case TEMP:
+   {
+   struct p8_occ_sensor *os =
+   &(((struct p8_occ_sensor *)sensor)[snum]);
+
+   os->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   os->value = be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   }
+   break;
+   case POWER:
+   {
+   struct p8_power_sensor *ps =
+   &(((struct p8_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 2]));
+   ps->accumulator =
+   be32_to_cpu(get_unaligned((u32 *)[off + 6]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 10]));
+   }
+   break;
+   case CAPS:
+   {
+   struct p8_caps_sensor *cs =
+   &(((struct p8_caps_sensor *)sensor)[snum]);
+
+   cs->curr_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off]));
+   cs->curr_powerreading =
+   be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   cs->norm_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   cs->max_powercap =
+

[PATCH linux v4 0/6] drivers: hwmon: Add On-Chip Controller drive

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set
user power caps, and perform some basic OCC error handling. It interfaces
with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips.
Communicating with the POWER9 OCC requries FSI support.

Edward A. James (6):
  hwmon: Add core On-Chip Controller support for POWER CPUs
  hwmon: occ: Add sysfs interface
  hwmon: occ: Add I2C transport implementation for SCOM operations
  hwmon: occ: Add callbacks for parsing P8 OCC datastructures
  hwmon: occ: Add hwmon implementation for the P8 OCC
  hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ | 114 ++
 MAINTAINERS |   7 +
 drivers/hwmon/Kconfig   |   2 +
 drivers/hwmon/Makefile  |   1 +
 drivers/hwmon/occ/Kconfig   |  29 ++
 drivers/hwmon/occ/Makefile  |   2 +
 drivers/hwmon/occ/occ.c | 479 
 drivers/hwmon/occ/occ.h |  80 
 drivers/hwmon/occ/occ_p8.c  | 247 
 drivers/hwmon/occ/occ_p8.h  |  30 ++
 drivers/hwmon/occ/occ_p9.c  | 308 +++
 drivers/hwmon/occ/occ_p9.h  |  30 ++
 drivers/hwmon/occ/occ_scom_i2c.c|  77 
 drivers/hwmon/occ/occ_scom_i2c.h|  26 ++
 drivers/hwmon/occ/occ_sysfs.c   | 259 +
 drivers/hwmon/occ/occ_sysfs.h   |  30 ++
 drivers/hwmon/occ/p8_occ_i2c.c  | 104 +
 drivers/hwmon/occ/scom.h|  47 +++
 19 files changed, 1885 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c
 create mode 100644 drivers/hwmon/occ/scom.h

-- 
1.9.1

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[PATCH linux v4 3/6] hwmon: occ: Add I2C transport implementation for SCOM operations

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register space.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 drivers/hwmon/occ/occ_scom_i2c.c | 77 
 drivers/hwmon/occ/occ_scom_i2c.h | 26 ++
 2 files changed, 103 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h

diff --git a/drivers/hwmon/occ/occ_scom_i2c.c b/drivers/hwmon/occ/occ_scom_i2c.c
new file mode 100644
index 000..74bd6ff
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.c
@@ -0,0 +1,77 @@
+/*
+ * occ_scom_i2c.c - hwmon OCC driver
+ *
+ * This file contains the functions for performing SCOM operations over I2C bus
+ * to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include "occ_scom_i2c.h"
+#include "scom.h"
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   ssize_t rc;
+   u64 buf;
+   struct i2c_client *client = bus;
+   struct i2c_msg msgs[2];
+
+   msgs[0].addr = client->addr;
+   msgs[0].flags = client->flags & I2C_M_TEN;
+   msgs[0].len = sizeof(u32);
+   msgs[0].buf = (char *)
+
+   msgs[1].addr = client->addr;
+   msgs[1].flags = client->flags & I2C_M_TEN;
+   msgs[1].flags |= I2C_M_RD;
+   msgs[1].len = sizeof(u64);
+   msgs[1].buf = (char *)
+
+   rc = i2c_transfer(client->adapter, msgs, 2);
+   if (rc < 0)
+   return rc;
+
+   *data = be64_to_cpu(buf);
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_getscom);
+
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   u32 buf[3];
+   ssize_t rc;
+   struct i2c_client *client = bus;
+
+   /* send raw data, user can handle endian */
+   buf[0] = address;
+   buf[1] = data1;
+   buf[2] = data0;
+
+   rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3);
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32) * 3)
+   return -EIO;
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_putscom);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("I2C OCC SCOM transport");
+MODULE_LICENSE("GPL");
diff --git a/drivers/hwmon/occ/occ_scom_i2c.h b/drivers/hwmon/occ/occ_scom_i2c.h
new file mode 100644
index 000..945739c
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.h
@@ -0,0 +1,26 @@
+/*
+ * occ_scom_i2c.h - hwmon OCC driver
+ *
+ * This file contains function protoypes for peforming SCOM operations over I2C
+ * bus to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __OCC_SCOM_I2C_H__
+#define __OCC_SCOM_I2C_H__
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data);
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1);
+
+#endif /* __OCC_SCOM_I2C_H__ */
-- 
1.9.1

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[PATCH linux v4 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  40 
 MAINTAINERS|   7 +
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  15 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 479 +
 drivers/hwmon/occ/occ.h|  80 
 drivers/hwmon/occ/scom.h   |  47 +
 9 files changed, 672 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..79d1642
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,40 @@
+Kernel driver occ
+=
+
+Supported chips:
+ * ASPEED AST2400
+ * ASPEED AST2500
+
+Please note that the chip must be connected to a POWER8 or POWER9 processor
+(see the BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f0420a..f5d4195 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9112,6 +9112,13 @@ T:   git git://linuxtv.org/media_tree.git
 S: Maintained
 F: drivers/media/i2c/ov7670.c
 
+ON-CHIP CONTROLLER HWMON DRIVER
+M: Eddie James 
+L: linux-hw...@vger.kernel.org
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
 ONENAND FLASH DRIVER
 M: Kyungmin Park 
 L: linux-...@lists.infradead.org
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..c7ec5d4 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_PPC_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..cdb64a7
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,15 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_PPC_OCC
+   bool "PPC On-Chip Controller"
+   help
+ If you say yes here you get support to monitor Power CPU
+ sensors via the On-Chip Controller (OCC).
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
+
+ This driver can also be built as a module. If so, the module
+ will be called occ.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..93cb52f
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
diff --git a/drivers/hwmon/occ/occ.c

[PATCH linux v4 2/6] hwmon: occ: Add sysfs interface

2017-01-26 Thread eajames . ibm 
From: "Edward A. James" 

Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ   |  62 ++
 drivers/hwmon/occ/Makefile|   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 259 ++
 drivers/hwmon/occ/occ_sysfs.h |  30 +
 4 files changed, 352 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 79d1642..d0bdf06 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,68 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports a number of sysfs files for each type of sensor. The
+sensor-specific files vary depending on the processor type, though many of the
+attributes are common for both the POWER8 and POWER9.
+
+The hwmon interface cannot define every type of sensor that may be used.
+Therefore, the frequency sensor on the OCC uses the "input" type sensor defined
+by the hwmon interface, rather than defining a new type of custom sensor.
+
+Below are detailed the names and meaning of each sensor file for both types of
+processors. All sensors are read-only unless otherwise specified.  indicates
+the hwmon index. sensor id indicates the unique internal OCC identifer. Please
+see the POWER OCC specification for details on all these sensor values.
+
+frequency:
+   all processors:
+   in_input - frequency value
+   in_label - sensor id
+temperature:
+   POWER8:
+   temp_input - temperature value
+   temp_label - sensor id
+   POWER9 (in addition to above):
+   temp_type - FRU type
+
+power:
+   POWER8:
+   power_input - power value
+   power_label - sensor id
+   power_average - accumulator
+   power_average_interval - update tag (number of samples in
+   accumulator)
+   POWER9:
+   power_input - power value
+   power_label - sensor id
+   power_average_min - accumulator[0]
+   power_average_max - accumulator[1] (64 bits total)
+   power_average_interval - update tag
+   power_reset_history - (function_id | (apss_channel << 8)
+
+caps:
+   POWER8:
+   power_cap - current powercap
+   power_cap_max - max powercap
+   power_cap_min - min powercap
+   power_max - normal powercap
+   power_alarm - user powercap, r/w
+   POWER9:
+   power_cap_alarm - user powercap source
+
+The driver also provides two sysfs entries through hwmon to better
+control the driver and monitor the master OCC. Though there may be multiple
+OCCs present on the system, these two files are only present for the "master"
+OCC.
+   name - read the name of the driver
+   update_interval - read or write the minimum interval for polling the
+   OCC.
+
 BMC - Host Communications
 -
 
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index 93cb52f..a6881f9 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
diff --git a/drivers/hwmon/occ/occ_sysfs.c b/drivers/hwmon/occ/occ_sysfs.c
new file mode 100644
index 000..ea2aa04
--- /dev/null
+++ b/drivers/hwmon/occ/occ_sysfs.c
@@ -0,0 +1,259 @@
+/*
+ * occ_sysfs.c - OCC sysfs interface
+ *
+ * This file contains the methods and data structures for implementing the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_sysfs.h"
+
+#define RESP_RETURN_CMD_INVAL  0x13
+#define OCC_HWMON_NAME_LENGTH  32
+
+struct occ_sysfs {
+   struct device *dev;
+   struct occ *occ;
+
+   char hwmon_name[OCC_HWMON_NAME_LENGTH

[PATCH linux v3 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  40 
 MAINTAINERS|   7 +
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  15 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 522 +
 drivers/hwmon/occ/occ.h|  81 +++
 drivers/hwmon/occ/scom.h   |  47 
 9 files changed, 716 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..79d1642
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,40 @@
+Kernel driver occ
+=
+
+Supported chips:
+ * ASPEED AST2400
+ * ASPEED AST2500
+
+Please note that the chip must be connected to a POWER8 or POWER9 processor
+(see the BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f0420a..f5d4195 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9112,6 +9112,13 @@ T:   git git://linuxtv.org/media_tree.git
 S: Maintained
 F: drivers/media/i2c/ov7670.c
 
+ON-CHIP CONTROLLER HWMON DRIVER
+M: Eddie James 
+L: linux-hw...@vger.kernel.org
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
 ONENAND FLASH DRIVER
 M: Kyungmin Park 
 L: linux-...@lists.infradead.org
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..c7ec5d4 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_PPC_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..cdb64a7
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,15 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_PPC_OCC
+   bool "PPC On-Chip Controller"
+   help
+ If you say yes here you get support to monitor Power CPU
+ sensors via the On-Chip Controller (OCC).
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
+
+ This driver can also be built as a module. If so, the module
+ will be called occ.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..93cb52f
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
diff --git a/drivers/hwmon/occ/occ.c

[PATCH linux v3 3/6] hwmon: occ: Add I2C transport implementation for SCOM operations

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register space.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 drivers/hwmon/occ/occ_scom_i2c.c | 72 
 drivers/hwmon/occ/occ_scom_i2c.h | 26 +++
 2 files changed, 98 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h

diff --git a/drivers/hwmon/occ/occ_scom_i2c.c b/drivers/hwmon/occ/occ_scom_i2c.c
new file mode 100644
index 000..8b4ca13
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.c
@@ -0,0 +1,72 @@
+/*
+ * occ_scom_i2c.c - hwmon OCC driver
+ *
+ * This file contains the functions for performing SCOM operations over I2C bus
+ * to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include "occ_scom_i2c.h"
+#include "scom.h"
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   ssize_t rc;
+   u64 buf;
+   struct i2c_client *client = bus;
+
+   rc = i2c_master_send(client, (const char *), sizeof(u32));
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32))
+   return -EIO;
+
+   rc = i2c_master_recv(client, (char *), sizeof(u64));
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u64))
+   return -EIO;
+
+   *data = be64_to_cpu(buf);
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_getscom);
+
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   u32 buf[3];
+   ssize_t rc;
+   struct i2c_client *client = bus;
+
+   buf[0] = address;
+   buf[1] = data1;
+   buf[2] = data0;
+
+   rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3);
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32) * 3)
+   return -EIO;
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_putscom);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("I2C OCC SCOM transport");
+MODULE_LICENSE("GPL");
diff --git a/drivers/hwmon/occ/occ_scom_i2c.h b/drivers/hwmon/occ/occ_scom_i2c.h
new file mode 100644
index 000..945739c
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.h
@@ -0,0 +1,26 @@
+/*
+ * occ_scom_i2c.h - hwmon OCC driver
+ *
+ * This file contains function protoypes for peforming SCOM operations over I2C
+ * bus to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __OCC_SCOM_I2C_H__
+#define __OCC_SCOM_I2C_H__
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data);
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1);
+
+#endif /* __OCC_SCOM_I2C_H__ */
-- 
1.9.1

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[PATCH linux v3 4/6] hwmon: occ: Add callbacks for parsing P8 OCC datastructures

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER8 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   9 ++
 drivers/hwmon/occ/occ_p8.c | 247 +
 drivers/hwmon/occ/occ_p8.h |  30 ++
 3 files changed, 286 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index d0bdf06..143951e 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,15 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+The format for the POWER8 OCC sensor data can be found in the P8 OCC
+specification:
+github.com/open-power/docs/blob/master/occ/OCC_OpenPwr_FW_Interfaces.pdf
+This document provides the details of the OCC sensors: power, frequency,
+temperature, and caps. These sensor formats are specific to the POWER8 OCC. A
+number of data structures, such as command format, response headers, and the
+like, are also defined in this specification, and are common to both POWER8 and
+POWER9 OCCs.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p8.c b/drivers/hwmon/occ/occ_p8.c
new file mode 100644
index 000..32215ed
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p8.c
@@ -0,0 +1,247 @@
+/*
+ * occ_p8.c - OCC hwmon driver
+ *
+ * This file contains the Power8-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_p8.h"
+
+/* P8 OCC sensor data format */
+struct p8_occ_sensor {
+   u16 sensor_id;
+   u16 value;
+};
+
+struct p8_power_sensor {
+   u16 sensor_id;
+   u32 update_tag;
+   u32 accumulator;
+   u16 value;
+};
+
+struct p8_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+};
+
+static const u32 p8_sensor_hwmon_configs[MAX_OCC_SENSOR_TYPE] = {
+   HWMON_I_INPUT | HWMON_I_LABEL,  /* freq: value | label */
+   HWMON_T_INPUT | HWMON_T_LABEL,  /* temp: value | label */
+   /* power: value | label | accumulator | update_tag */
+   HWMON_P_INPUT | HWMON_P_LABEL | HWMON_P_AVERAGE |
+   HWMON_P_AVERAGE_INTERVAL,
+   /* caps: curr | max | min | norm | user */
+   HWMON_P_CAP | HWMON_P_CAP_MAX | HWMON_P_CAP_MIN | HWMON_P_MAX |
+   HWMON_P_ALARM,
+};
+
+void p8_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   case TEMP:
+   {
+   struct p8_occ_sensor *os =
+   &(((struct p8_occ_sensor *)sensor)[snum]);
+
+   os->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   os->value = be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   }
+   break;
+   case POWER:
+   {
+   struct p8_power_sensor *ps =
+   &(((struct p8_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 2]));
+   ps->accumulator =
+   be32_to_cpu(get_unaligned((u32 *)[off + 6]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 10]));
+   }
+   break;
+   case CAPS:
+   {
+   struct p8_caps_sensor *cs =
+   &(((struct p8_caps_sensor *)sensor)[snum]);
+
+   cs->curr_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off]));
+   cs->curr_powerreading =
+   be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   cs->norm_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   cs->max_powercap =
+

[PATCH linux v3 2/6] hwmon: occ: Add sysfs interface

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ   |  62 ++
 drivers/hwmon/occ/Makefile|   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 271 ++
 drivers/hwmon/occ/occ_sysfs.h |  44 +++
 4 files changed, 378 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 79d1642..d0bdf06 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,68 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports a number of sysfs files for each type of sensor. The
+sensor-specific files vary depending on the processor type, though many of the
+attributes are common for both the POWER8 and POWER9.
+
+The hwmon interface cannot define every type of sensor that may be used.
+Therefore, the frequency sensor on the OCC uses the "input" type sensor defined
+by the hwmon interface, rather than defining a new type of custom sensor.
+
+Below are detailed the names and meaning of each sensor file for both types of
+processors. All sensors are read-only unless otherwise specified.  indicates
+the hwmon index. sensor id indicates the unique internal OCC identifer. Please
+see the POWER OCC specification for details on all these sensor values.
+
+frequency:
+   all processors:
+   in_input - frequency value
+   in_label - sensor id
+temperature:
+   POWER8:
+   temp_input - temperature value
+   temp_label - sensor id
+   POWER9 (in addition to above):
+   temp_type - FRU type
+
+power:
+   POWER8:
+   power_input - power value
+   power_label - sensor id
+   power_average - accumulator
+   power_average_interval - update tag (number of samples in
+   accumulator)
+   POWER9:
+   power_input - power value
+   power_label - sensor id
+   power_average_min - accumulator[0]
+   power_average_max - accumulator[1] (64 bits total)
+   power_average_interval - update tag
+   power_reset_history - (function_id | (apss_channel << 8)
+
+caps:
+   POWER8:
+   power_cap - current powercap
+   power_cap_max - max powercap
+   power_cap_min - min powercap
+   power_max - normal powercap
+   power_alarm - user powercap, r/w
+   POWER9:
+   power_cap_alarm - user powercap source
+
+The driver also provides two sysfs entries through hwmon to better
+control the driver and monitor the master OCC. Though there may be multiple
+OCCs present on the system, these two files are only present for the "master"
+OCC.
+   name - read the name of the driver
+   update_interval - read or write the minimum interval for polling the
+   OCC.
+
 BMC - Host Communications
 -
 
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index 93cb52f..a6881f9 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
diff --git a/drivers/hwmon/occ/occ_sysfs.c b/drivers/hwmon/occ/occ_sysfs.c
new file mode 100644
index 000..2f20c40
--- /dev/null
+++ b/drivers/hwmon/occ/occ_sysfs.c
@@ -0,0 +1,271 @@
+/*
+ * occ_sysfs.c - OCC sysfs interface
+ *
+ * This file contains the methods and data structures for implementing the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_sysfs.h"
+
+#define RESP_RETURN_CMD_INVAL  0x13
+
+static int occ_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
+ u32 attr, int channel, long *val)
+{
+   int rc

[PATCH linux v3 6/6] hwmon: occ: Add callbacks for parsing P9 OCC datastructures

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER9 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   3 +
 drivers/hwmon/occ/occ_p9.c | 308 +
 drivers/hwmon/occ/occ_p9.h |  30 +
 3 files changed, 341 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 143951e..6cea853 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -34,6 +34,9 @@ number of data structures, such as command format, response 
headers, and the
 like, are also defined in this specification, and are common to both POWER8 and
 POWER9 OCCs.
 
+There is currently no public P9 OCC specification, and the data structures
+defined in the POWER9 OCC driver are subject to change.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p9.c b/drivers/hwmon/occ/occ_p9.c
new file mode 100644
index 000..d99a026
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p9.c
@@ -0,0 +1,308 @@
+/*
+ * occ_p9.c - OCC hwmon driver
+ *
+ * This file contains the Power9-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ.h"
+#include "occ_p9.h"
+
+/* P9 OCC sensor data format */
+struct p9_temp_sensor {
+   u32 sensor_id;
+   u8 fru_type;
+   u8 value;
+};
+
+struct p9_freq_sensor {
+   u32 sensor_id;
+   u16 value;
+};
+
+struct p9_power_sensor {
+   u32 sensor_id;
+   u8 function_id;
+   u8 apss_channel;
+   u16 reserved;
+   u32 update_tag;
+   u64 accumulator;
+   u16 value;
+};
+
+struct p9_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+   u8 user_powerlimit_source;
+};
+
+static const u32 p9_sensor_hwmon_configs[MAX_OCC_SENSOR_TYPE] = {
+   HWMON_I_INPUT | HWMON_I_LABEL,  /* freq: value | label */
+   /* temp: value | label | fru_type */
+   HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_TYPE,
+   /* power: value | label | accum[0] | accum[1] | update_tag |
+*   (function_id | (apss_channel << 8))
+*/
+   HWMON_P_INPUT | HWMON_P_LABEL | HWMON_P_AVERAGE_MIN |
+   HWMON_P_AVERAGE_MAX | HWMON_P_AVERAGE_INTERVAL |
+   HWMON_P_RESET_HISTORY,
+   /* caps: curr | max | min | norm | user | source */
+   HWMON_P_CAP | HWMON_P_CAP_MAX | HWMON_P_CAP_MIN | HWMON_P_MAX |
+   HWMON_P_ALARM | HWMON_P_CAP_ALARM,
+};
+
+void p9_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   {
+   struct p9_freq_sensor *fs =
+   &(((struct p9_freq_sensor *)sensor)[snum]);
+
+   fs->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->value = be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   }
+   break;
+   case TEMP:
+   {
+   struct p9_temp_sensor *ts =
+   &(((struct p9_temp_sensor *)sensor)[snum]);
+
+   ts->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->fru_type = data[off + 4];
+   fs->value = data[off + 5];
+   }
+   break;
+   case POWER:
+   {
+   struct p9_power_sensor *ps =
+   &(((struct p9_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   ps->function_id = data[off + 4];
+   ps->apss_channel = data[off + 5];
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 8]));
+   ps->accumulator =
+   be64_to_cpu(get_unaligned((u64 *)[off + 12]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 20]));
+   }
+   break;
+   case CAPS:
+   {
+   struct

[PATCH linux v3 5/6] hwmon: occ: Add hwmon implementation for the P8 OCC

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +++
 drivers/hwmon/occ/Kconfig   |  14 
 drivers/hwmon/occ/Makefile  |   1 +
 drivers/hwmon/occ/p8_occ_i2c.c  | 104 
 4 files changed, 132 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c

diff --git a/Documentation/devicetree/bindings/hwmon/occ.txt 
b/Documentation/devicetree/bindings/hwmon/occ.txt
new file mode 100644
index 000..b0d2b36
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/occ.txt
@@ -0,0 +1,13 @@
+HWMON I2C driver for IBM POWER CPU OCC (On Chip Controller)
+
+Required properties:
+ - compatible: must be "ibm,p8-occ-i2c"
+ - reg: physical address
+
+Example:
+i2c3: i2c-bus@100 {
+   occ@50 {
+   compatible = "ibm,p8-occ-i2c";
+   reg = <0x50>;
+   };
+};
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
index cdb64a7..3a5188f 100644
--- a/drivers/hwmon/occ/Kconfig
+++ b/drivers/hwmon/occ/Kconfig
@@ -13,3 +13,17 @@ menuconfig SENSORS_PPC_OCC
 
  This driver can also be built as a module. If so, the module
  will be called occ.
+
+if SENSORS_PPC_OCC
+
+config SENSORS_PPC_OCC_P8_I2C
+   tristate "POWER8 OCC hwmon support"
+   depends on I2C
+   help
+Provide a hwmon sysfs interface for the POWER8 On-Chip Controller,
+exposing temperature, frequency and power measurements.
+
+This driver can also be built as a module. If so, the module will be
+called p8-occ-i2c.
+
+endif
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index a6881f9..9294b58 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
+obj-$(CONFIG_SENSORS_PPC_OCC_P8_I2C) += occ_scom_i2c.o occ_p8.o p8_occ_i2c.o
diff --git a/drivers/hwmon/occ/p8_occ_i2c.c b/drivers/hwmon/occ/p8_occ_i2c.c
new file mode 100644
index 000..6273040
--- /dev/null
+++ b/drivers/hwmon/occ/p8_occ_i2c.c
@@ -0,0 +1,104 @@
+/*
+ * p8_occ_i2c.c - hwmon OCC driver
+ *
+ * This file contains the i2c layer for accessing the P8 OCC over i2c bus.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "occ_p8.h"
+#include "occ_scom_i2c.h"
+#include "occ_sysfs.h"
+#include "scom.h"
+
+#define P8_OCC_I2C_NAME"p8-occ-i2c"
+
+int p8_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_getscom(bus, address, data);
+}
+
+int p8_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_putscom(bus, address, data0, data1);
+}
+
+static struct occ_bus_ops p8_bus_ops = {
+   .getscom = p8_i2c_getscom,
+   .putscom = p8_i2c_putscom,
+};
+
+static int p8_occ_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   struct occ *occ;
+   struct occ_sysfs *hwmon;
+   const u32 *sensor_hwmon_configs = p8_get_sensor_hwmon_configs();
+
+   occ = p8_occ_start(>dev, client, _bus_ops);
+   if (IS_ERR(occ))
+   return PTR_ERR(occ);
+
+   hwmon = occ_sysfs_start(>dev, occ, sensor_hwmon_configs,
+   P8_OCC_I2C_NAME);
+   if (IS_ERR(hwmon))
+   return PTR_ERR(hwmon);
+
+   i2c_set_clientdata(client, occ);
+
+   return 0;
+}
+
+/* used by old-style board info. */
+static const struct i2c_device_id occ_ids[] = {
+   { P8_OCC_I2C_NAME, 0 },
+   {}
+};
+MODULE_DEVICE_TABLE(i2c, occ_ids);
+
+/* used by device table */
+static const struct of_device_id occ_of_match[] = {
+   { .compatible = "ibm,p8-occ-i2c" },
+   {}
+};
+MODULE_DEVICE_TABLE(of, occ_of_match);
+
+static struct i2c_driver p8_occ_driver = {
+   .class = I2C_CLASS_HWMON,
+

[PATCH linux v3 0/6] drivers: hwmon: Add On-Chip Controller driver

2017-01-16 Thread eajames . ibm 
From: "Edward A. James" 

This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set
user power caps, and perform some basic OCC error handling. It interfaces
with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips.
Communicating with the POWER9 OCC requries FSI support.

Edward A. James (6):
  hwmon: Add core On-Chip Controller support for POWER CPUs
  hwmon: occ: Add sysfs interface
  hwmon: occ: Add I2C transport implementation for SCOM operations
  hwmon: occ: Add callbacks for parsing P8 OCC datastructures
  hwmon: occ: Add hwmon implementation for the P8 OCC
  hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ | 114 ++
 MAINTAINERS |   7 +
 drivers/hwmon/Kconfig   |   2 +
 drivers/hwmon/Makefile  |   1 +
 drivers/hwmon/occ/Kconfig   |  29 ++
 drivers/hwmon/occ/Makefile  |   2 +
 drivers/hwmon/occ/occ.c | 522 
 drivers/hwmon/occ/occ.h |  81 
 drivers/hwmon/occ/occ_p8.c  | 247 +++
 drivers/hwmon/occ/occ_p8.h  |  30 ++
 drivers/hwmon/occ/occ_p9.c  | 308 ++
 drivers/hwmon/occ/occ_p9.h  |  30 ++
 drivers/hwmon/occ/occ_scom_i2c.c|  72 
 drivers/hwmon/occ/occ_scom_i2c.h|  26 ++
 drivers/hwmon/occ/occ_sysfs.c   | 271 
 drivers/hwmon/occ/occ_sysfs.h   |  44 ++
 drivers/hwmon/occ/p8_occ_i2c.c  | 104 +
 drivers/hwmon/occ/scom.h|  47 +++
 19 files changed, 1950 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c
 create mode 100644 drivers/hwmon/occ/scom.h

-- 
1.9.1

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[PATCH linux v2 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  40 
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  15 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 533 +
 drivers/hwmon/occ/occ.h|  83 +++
 drivers/hwmon/occ/scom.h   |  47 
 8 files changed, 722 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..79d1642
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,40 @@
+Kernel driver occ
+=
+
+Supported chips:
+ * ASPEED AST2400
+ * ASPEED AST2500
+
+Please note that the chip must be connected to a POWER8 or POWER9 processor
+(see the BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..c7ec5d4 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_PPC_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..cdb64a7
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,15 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_PPC_OCC
+   bool "PPC On-Chip Controller"
+   help
+ If you say yes here you get support to monitor Power CPU
+ sensors via the On-Chip Controller (OCC).
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
+
+ This driver can also be built as a module. If so, the module
+ will be called occ.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..93cb52f
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
diff --git a/drivers/hwmon/occ/occ.c b/drivers/hwmon/occ/occ.c
new file mode 100644
index 000..31e6164
--- /dev/null
+++ b/drivers/hwmon/occ/occ.c
@@ -0,0 +1,533 @@
+/*
+ * occ.c - OCC hwmon driver
+ *
+ * This file contains the methods and data structures for the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is

[PATCH linux v2 3/6] hwmon: occ: Add I2C transport implementation for SCOM operations

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register space.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 drivers/hwmon/occ/occ_scom_i2c.c | 73 
 drivers/hwmon/occ/occ_scom_i2c.h | 26 ++
 2 files changed, 99 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h

diff --git a/drivers/hwmon/occ/occ_scom_i2c.c b/drivers/hwmon/occ/occ_scom_i2c.c
new file mode 100644
index 000..a922f83
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.c
@@ -0,0 +1,73 @@
+/*
+ * occ_scom_i2c.c - hwmon OCC driver
+ *
+ * This file contains the functions for performing SCOM operations over I2C bus
+ * to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include "scom.h"
+#include "occ_scom_i2c.h"
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   ssize_t rc;
+   u64 buf;
+   struct i2c_client *client = bus;
+
+   rc = i2c_master_send(client, (const char *), sizeof(u32));
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32))
+   return -EIO;
+
+   rc = i2c_master_recv(client, (char *), sizeof(u64));
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u64))
+   return -EIO;
+
+   *data = be64_to_cpu(buf);
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_getscom);
+
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   u32 buf[3];
+   ssize_t rc;
+   struct i2c_client *client = bus;
+
+   buf[0] = address;
+   buf[1] = data1;
+   buf[2] = data0;
+
+   rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3);
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32) * 3)
+   return -EIO;
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_putscom);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("I2C OCC SCOM transport");
+MODULE_LICENSE("GPL");
diff --git a/drivers/hwmon/occ/occ_scom_i2c.h b/drivers/hwmon/occ/occ_scom_i2c.h
new file mode 100644
index 000..945739c
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.h
@@ -0,0 +1,26 @@
+/*
+ * occ_scom_i2c.h - hwmon OCC driver
+ *
+ * This file contains function protoypes for peforming SCOM operations over I2C
+ * bus to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __OCC_SCOM_I2C_H__
+#define __OCC_SCOM_I2C_H__
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data);
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1);
+
+#endif /* __OCC_SCOM_I2C_H__ */
-- 
1.9.1

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[PATCH linux v2 0/6] drivers: hwmon: Add On-Chip Controller driver

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set
user power caps, and perform some basic OCC error handling. It interfaces
with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips.
Communicating with the POWER9 OCC requries FSI support.

Edward A. James (6):
  hwmon: Add core On-Chip Controller support for POWER CPUs
  hwmon: occ: Add sysfs interface
  hwmon: occ: Add I2C transport implementation for SCOM operations
  hwmon: occ: Add callbacks for parsing P8 OCC datastructures
  hwmon: occ: Add hwmon implementation for the P8 OCC
  hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +
 Documentation/hwmon/occ | 114 +
 drivers/hwmon/Kconfig   |   2 +
 drivers/hwmon/Makefile  |   1 +
 drivers/hwmon/occ/Kconfig   |  29 ++
 drivers/hwmon/occ/Makefile  |   2 +
 drivers/hwmon/occ/occ.c | 533 
 drivers/hwmon/occ/occ.h |  83 
 drivers/hwmon/occ/occ_p8.c  | 254 +++
 drivers/hwmon/occ/occ_p8.h  |  31 ++
 drivers/hwmon/occ/occ_p9.c  | 314 ++
 drivers/hwmon/occ/occ_p9.h  |  31 ++
 drivers/hwmon/occ/occ_scom_i2c.c|  73 
 drivers/hwmon/occ/occ_scom_i2c.h|  26 ++
 drivers/hwmon/occ/occ_sysfs.c   | 274 
 drivers/hwmon/occ/occ_sysfs.h   |  44 ++
 drivers/hwmon/occ/p8_occ_i2c.c  | 123 ++
 drivers/hwmon/occ/scom.h|  47 +++
 18 files changed, 1994 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c
 create mode 100644 drivers/hwmon/occ/scom.h

-- 
1.9.1

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[PATCH linux v2 4/6] hwmon: occ: Add callbacks for parsing P8 OCC datastructures

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER8 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   9 ++
 drivers/hwmon/occ/occ_p8.c | 254 +
 drivers/hwmon/occ/occ_p8.h |  31 ++
 3 files changed, 294 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index d0bdf06..143951e 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,15 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+The format for the POWER8 OCC sensor data can be found in the P8 OCC
+specification:
+github.com/open-power/docs/blob/master/occ/OCC_OpenPwr_FW_Interfaces.pdf
+This document provides the details of the OCC sensors: power, frequency,
+temperature, and caps. These sensor formats are specific to the POWER8 OCC. A
+number of data structures, such as command format, response headers, and the
+like, are also defined in this specification, and are common to both POWER8 and
+POWER9 OCCs.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p8.c b/drivers/hwmon/occ/occ_p8.c
new file mode 100644
index 000..6673da2
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p8.c
@@ -0,0 +1,254 @@
+/*
+ * occ_p8.c - OCC hwmon driver
+ *
+ * This file contains the Power8-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "occ.h"
+#include "occ_p8.h"
+
+/* P8 OCC sensor data format */
+struct p8_occ_sensor {
+   u16 sensor_id;
+   u16 value;
+};
+
+struct p8_power_sensor {
+   u16 sensor_id;
+   u32 update_tag;
+   u32 accumulator;
+   u16 value;
+};
+
+struct p8_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+};
+
+static const u32 p8_sensor_hwmon_configs[MAX_OCC_SENSOR_TYPE] = {
+   HWMON_I_INPUT | HWMON_I_LABEL,  /* freq: value | label */
+   HWMON_T_INPUT | HWMON_T_LABEL,  /* temp: value | label */
+   /* power: value | label | accumulator | update_tag */
+   HWMON_P_INPUT | HWMON_P_LABEL | HWMON_P_AVERAGE |
+   HWMON_P_AVERAGE_INTERVAL,
+   /* caps: curr | max | min | norm | user */
+   HWMON_P_CAP | HWMON_P_CAP_MAX | HWMON_P_CAP_MIN | HWMON_P_MAX |
+   HWMON_P_ALARM,
+};
+
+void p8_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   case TEMP:
+   {
+   struct p8_occ_sensor *os =
+   &(((struct p8_occ_sensor *)sensor)[snum]);
+
+   os->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   os->value = be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   }
+   break;
+   case POWER:
+   {
+   struct p8_power_sensor *ps =
+   &(((struct p8_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 2]));
+   ps->accumulator =
+   be32_to_cpu(get_unaligned((u32 *)[off + 6]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 10]));
+   }
+   break;
+   case CAPS:
+   {
+   struct p8_caps_sensor *cs =
+   &(((struct p8_caps_sensor *)sensor)[snum]);
+
+   cs->curr_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off]));
+   cs->curr_powerreading =
+   be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   cs->norm_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   cs->max_powercap =
+

[PATCH linux v2 2/6] hwmon: occ: Add sysfs interface

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ   |  62 ++
 drivers/hwmon/occ/Makefile|   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 274 ++
 drivers/hwmon/occ/occ_sysfs.h |  44 +++
 4 files changed, 381 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 79d1642..d0bdf06 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,68 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports a number of sysfs files for each type of sensor. The
+sensor-specific files vary depending on the processor type, though many of the
+attributes are common for both the POWER8 and POWER9.
+
+The hwmon interface cannot define every type of sensor that may be used.
+Therefore, the frequency sensor on the OCC uses the "input" type sensor defined
+by the hwmon interface, rather than defining a new type of custom sensor.
+
+Below are detailed the names and meaning of each sensor file for both types of
+processors. All sensors are read-only unless otherwise specified.  indicates
+the hwmon index. sensor id indicates the unique internal OCC identifer. Please
+see the POWER OCC specification for details on all these sensor values.
+
+frequency:
+   all processors:
+   in_input - frequency value
+   in_label - sensor id
+temperature:
+   POWER8:
+   temp_input - temperature value
+   temp_label - sensor id
+   POWER9 (in addition to above):
+   temp_type - FRU type
+
+power:
+   POWER8:
+   power_input - power value
+   power_label - sensor id
+   power_average - accumulator
+   power_average_interval - update tag (number of samples in
+   accumulator)
+   POWER9:
+   power_input - power value
+   power_label - sensor id
+   power_average_min - accumulator[0]
+   power_average_max - accumulator[1] (64 bits total)
+   power_average_interval - update tag
+   power_reset_history - (function_id | (apss_channel << 8)
+
+caps:
+   POWER8:
+   power_cap - current powercap
+   power_cap_max - max powercap
+   power_cap_min - min powercap
+   power_max - normal powercap
+   power_alarm - user powercap, r/w
+   POWER9:
+   power_cap_alarm - user powercap source
+
+The driver also provides two sysfs entries through hwmon to better
+control the driver and monitor the master OCC. Though there may be multiple
+OCCs present on the system, these two files are only present for the "master"
+OCC.
+   name - read the name of the driver
+   update_interval - read or write the minimum interval for polling the
+   OCC.
+
 BMC - Host Communications
 -
 
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index 93cb52f..a6881f9 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
diff --git a/drivers/hwmon/occ/occ_sysfs.c b/drivers/hwmon/occ/occ_sysfs.c
new file mode 100644
index 000..e846b0c
--- /dev/null
+++ b/drivers/hwmon/occ/occ_sysfs.c
@@ -0,0 +1,274 @@
+/*
+ * occ_sysfs.c - OCC sysfs interface
+ *
+ * This file contains the methods and data structures for implementing the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "occ.h"
+#include "occ_sysfs.h"
+
+#define RESP_RETURN_CMD_INVAL  0x13
+
+static int occ_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
+ u32 attr, int channel, long *val)
+{
+   int

[PATCH linux v2 6/6] hwmon: occ: Add callbacks for parsing P9 OCC datastructures

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER9 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   3 +
 drivers/hwmon/occ/occ_p9.c | 314 +
 drivers/hwmon/occ/occ_p9.h |  31 +
 3 files changed, 348 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p9.c
 create mode 100644 drivers/hwmon/occ/occ_p9.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 143951e..6cea853 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -34,6 +34,9 @@ number of data structures, such as command format, response 
headers, and the
 like, are also defined in this specification, and are common to both POWER8 and
 POWER9 OCCs.
 
+There is currently no public P9 OCC specification, and the data structures
+defined in the POWER9 OCC driver are subject to change.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p9.c b/drivers/hwmon/occ/occ_p9.c
new file mode 100644
index 000..8b351a0
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p9.c
@@ -0,0 +1,314 @@
+/*
+ * occ_p9.c - OCC hwmon driver
+ *
+ * This file contains the Power9-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "occ.h"
+#include "occ_p9.h"
+
+/* P9 OCC sensor data format */
+struct p9_temp_sensor {
+   u32 sensor_id;
+   u8 fru_type;
+   u8 value;
+};
+
+struct p9_freq_sensor {
+   u32 sensor_id;
+   u16 value;
+};
+
+struct p9_power_sensor {
+   u32 sensor_id;
+   u8 function_id;
+   u8 apss_channel;
+   u16 reserved;
+   u32 update_tag;
+   u64 accumulator;
+   u16 value;
+};
+
+struct p9_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+   u8 user_powerlimit_source;
+};
+
+static const u32 p9_sensor_hwmon_configs[MAX_OCC_SENSOR_TYPE] = {
+   HWMON_I_INPUT | HWMON_I_LABEL,  /* freq: value | label */
+   /* temp: value | label | fru_type */
+   HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_TYPE,
+   /* power: value | label | accum[0] | accum[1] | update_tag |
+*   (function_id | (apss_channel << 8))
+*/
+   HWMON_P_INPUT | HWMON_P_LABEL | HWMON_P_AVERAGE_MIN |
+   HWMON_P_AVERAGE_MAX | HWMON_P_AVERAGE_INTERVAL |
+   HWMON_P_RESET_HISTORY,
+   /* caps: curr | max | min | norm | user | source */
+   HWMON_P_CAP | HWMON_P_CAP_MAX | HWMON_P_CAP_MIN | HWMON_P_MAX |
+   HWMON_P_ALARM | HWMON_P_CAP_ALARM,
+};
+
+void p9_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   {
+   struct p9_freq_sensor *fs =
+   &(((struct p9_freq_sensor *)sensor)[snum]);
+
+   fs->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->value = be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   }
+   break;
+   case TEMP:
+   {
+   struct p9_temp_sensor *ts =
+   &(((struct p9_temp_sensor *)sensor)[snum]);
+
+   ts->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->fru_type = data[off + 4];
+   fs->value = data[off + 5];
+   }
+   break;
+   case POWER:
+   {
+   struct p9_power_sensor *ps =
+   &(((struct p9_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   ps->function_id = data[off + 4];
+   ps->apss_channel = data[off + 5];
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 8]));
+   ps->accumulator =
+   be64_to_cpu(get_unaligned((u64 *)[off + 12]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 20]));
+   }
+   break;
+   case CAPS:
+   {
+   struct

[PATCH linux v2 5/6] hwmon: occ: Add hwmon implementation for the P8 OCC

2017-01-11 Thread eajames . ibm 
From: "Edward A. James" 

Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/devicetree/bindings/hwmon/occ.txt |  13 +++
 drivers/hwmon/occ/Kconfig   |  14 +++
 drivers/hwmon/occ/Makefile  |   1 +
 drivers/hwmon/occ/p8_occ_i2c.c  | 123 
 4 files changed, 151 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/occ.txt
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c

diff --git a/Documentation/devicetree/bindings/hwmon/occ.txt 
b/Documentation/devicetree/bindings/hwmon/occ.txt
new file mode 100644
index 000..b0d2b36
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/occ.txt
@@ -0,0 +1,13 @@
+HWMON I2C driver for IBM POWER CPU OCC (On Chip Controller)
+
+Required properties:
+ - compatible: must be "ibm,p8-occ-i2c"
+ - reg: physical address
+
+Example:
+i2c3: i2c-bus@100 {
+   occ@50 {
+   compatible = "ibm,p8-occ-i2c";
+   reg = <0x50>;
+   };
+};
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
index cdb64a7..3a5188f 100644
--- a/drivers/hwmon/occ/Kconfig
+++ b/drivers/hwmon/occ/Kconfig
@@ -13,3 +13,17 @@ menuconfig SENSORS_PPC_OCC
 
  This driver can also be built as a module. If so, the module
  will be called occ.
+
+if SENSORS_PPC_OCC
+
+config SENSORS_PPC_OCC_P8_I2C
+   tristate "POWER8 OCC hwmon support"
+   depends on I2C
+   help
+Provide a hwmon sysfs interface for the POWER8 On-Chip Controller,
+exposing temperature, frequency and power measurements.
+
+This driver can also be built as a module. If so, the module will be
+called p8-occ-i2c.
+
+endif
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index a6881f9..9294b58 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
+obj-$(CONFIG_SENSORS_PPC_OCC_P8_I2C) += occ_scom_i2c.o occ_p8.o p8_occ_i2c.o
diff --git a/drivers/hwmon/occ/p8_occ_i2c.c b/drivers/hwmon/occ/p8_occ_i2c.c
new file mode 100644
index 000..4515c68
--- /dev/null
+++ b/drivers/hwmon/occ/p8_occ_i2c.c
@@ -0,0 +1,123 @@
+/*
+ * p8_occ_i2c.c - hwmon OCC driver
+ *
+ * This file contains the i2c layer for accessing the P8 OCC over i2c bus.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "scom.h"
+#include "occ_scom_i2c.h"
+#include "occ_p8.h"
+#include "occ_sysfs.h"
+
+#define P8_OCC_I2C_NAME"p8-occ-i2c"
+
+int p8_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_getscom(bus, address, data);
+}
+
+int p8_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_putscom(bus, address, data0, data1);
+}
+
+static struct occ_bus_ops p8_bus_ops = {
+   .getscom = p8_i2c_getscom,
+   .putscom = p8_i2c_putscom,
+};
+
+static int p8_occ_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   struct occ *occ;
+   struct occ_sysfs *hwmon;
+   const u32 *sensor_hwmon_configs = p8_get_sensor_hwmon_configs();
+
+   occ = p8_occ_start(>dev, client, _bus_ops);
+   if (IS_ERR(occ))
+   return PTR_ERR(occ);
+
+   hwmon = occ_sysfs_start(>dev, occ, sensor_hwmon_configs,
+   P8_OCC_I2C_NAME);
+   if (IS_ERR(hwmon))
+   return PTR_ERR(hwmon);
+
+   i2c_set_clientdata(client, occ);
+
+   return 0;
+}
+
+static int p8_occ_remove(struct i2c_client *client)
+{
+   struct occ *occ = i2c_get_clientdata(client);
+
+   return p8_occ_stop(occ);
+}
+
+/* used by old-style board info. */
+static const struct i2c_device_id occ_ids[] = {
+   { P8_OCC_I2C_NAME, 0 },
+   {}
+};
+MODULE_DEVICE_TABLE(i2c, occ_ids);
+
+/* used by device table */
+static const struct of_device_id occ_of_match[] = {
+   { .compatible =

[PATCH linux 6/6] hwmon: occ: Add callbacks for parsing P9 OCC datastructures

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER9 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
Reviewed-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   3 +
 drivers/hwmon/occ/p9_occ.c | 243 +
 drivers/hwmon/occ/p9_occ.h |  30 ++
 3 files changed, 276 insertions(+)
 create mode 100644 drivers/hwmon/occ/p9_occ.c
 create mode 100644 drivers/hwmon/occ/p9_occ.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index a6b3dd6..0f17c2f 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -34,6 +34,9 @@ number of data structures, such as command format, response 
headers, and the
 like, are also defined in this specification, and are common to both POWER8 and
 POWER9 OCCs.
 
+There is currently no public P9 OCC specification, and the data structures
+defined in the POWER9 OCC driver are subject to change.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/p9_occ.c b/drivers/hwmon/occ/p9_occ.c
new file mode 100644
index 000..f69b469
--- /dev/null
+++ b/drivers/hwmon/occ/p9_occ.c
@@ -0,0 +1,243 @@
+/*
+ * p9.c - OCC hwmon driver
+ *
+ * This file contains the Power9-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "occ.h"
+#include "occ_p9.h"
+
+/* P9 OCC sensor data format */
+struct p9_temp_sensor {
+   u32 sensor_id;
+   u8 fru_type;
+   u8 value;
+};
+
+struct p9_freq_sensor {
+   u32 sensor_id;
+   u16 value;
+};
+
+struct p9_power_sensor {
+   u32 sensor_id;
+   u8 function_id;
+   u8 apss_channel;
+   u16 reserved;
+   u32 update_tag;
+   u64 accumulator;
+   u16 value;
+};
+
+struct p9_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+   u8 user_powerlimit_source;
+};
+
+void p9_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   {
+   struct p9_freq_sensor *fs =
+   &(((struct p9_freq_sensor *)sensor)[snum]);
+
+   fs->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->value = be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   }
+   break;
+   case TEMP:
+   {
+   struct p9_temp_sensor *ts =
+   &(((struct p9_temp_sensor *)sensor)[snum]);
+
+   ts->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   fs->fru_type = data[off + 4];
+   fs->value = data[off + 5];
+   }
+   break;
+   case POWER:
+   {
+   struct p9_power_sensor *ps =
+   &(((struct p9_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be32_to_cpu(get_unaligned((u32 *)[off]));
+   ps->function_id = data[off + 4];
+   ps->apss_channel = data[off + 5];
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 8]));
+   ps->accumulator =
+   be64_to_cpu(get_unaligned((u64 *)[off + 12]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 20]));
+   }
+   break;
+   case CAPS:
+   {
+   struct p9_caps_sensor *cs =
+   &(((struct p9_caps_sensor *)sensor)[snum]);
+
+   cs->curr_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off]));
+   cs->curr_powerreading =
+   be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   cs->norm_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   cs->max_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 6]));
+   cs->min_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 8]));
+   cs->user_powerlimit =
+

[PATCH linux 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  40 
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  15 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 544 +
 drivers/hwmon/occ/occ.h|  86 +++
 drivers/hwmon/occ/scom.h   |  47 
 8 files changed, 736 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..79d1642
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,40 @@
+Kernel driver occ
+=
+
+Supported chips:
+ * ASPEED AST2400
+ * ASPEED AST2500
+
+Please note that the chip must be connected to a POWER8 or POWER9 processor
+(see the BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..c7ec5d4 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_PPC_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..cdb64a7
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,15 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_PPC_OCC
+   bool "PPC On-Chip Controller"
+   help
+ If you say yes here you get support to monitor Power CPU
+ sensors via the On-Chip Controller (OCC).
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
+
+ This driver can also be built as a module. If so, the module
+ will be called occ.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..93cb52f
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
diff --git a/drivers/hwmon/occ/occ.c b/drivers/hwmon/occ/occ.c
new file mode 100644
index 000..9884ddd
--- /dev/null
+++ b/drivers/hwmon/occ/occ.c
@@ -0,0 +1,544 @@
+/*
+ * occ.c - OCC hwmon driver
+ *
+ * This file contains the methods and data structures for the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is

[PATCH linux 2/6] hwmon: occ: Add sysfs interface

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
Reviewed-by: Andrew Jeffery 
---
 Documentation/hwmon/occ   |  48 +
 drivers/hwmon/occ/Makefile|   2 +-
 drivers/hwmon/occ/occ_sysfs.c | 492 ++
 drivers/hwmon/occ/occ_sysfs.h |  52 +
 4 files changed, 593 insertions(+), 1 deletion(-)
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 79d1642..1ee8689 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,54 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+sysfs Entries
+-
+
+The OCC driver uses the hwmon sysfs framework to provide data to userspace.
+
+The driver exports two sysfs files for each frequency, temperature, and power
+sensor. These are "input" and "label". The input file contains the value of the
+sensor. The label file contains the sensor id. The sensor id is the unique
+internal OCC identifier. Sensor ids may be provided by the OCC specification.
+The names of these files will be in the following format:
+   _input
+   _label
+Sensor types will be one of "temp", "freq", or "power". The sensor index is
+an index to differentiate different sensor files. For example, a single
+temperature sensor will have two sysfs files: temp1_input and temp1_label.
+
+Caps sensors are exported differently. For each caps sensor, the driver will
+export 6 entries:
+   curr_powercap - current power cap in watts
+   curr_powerreading - current power output in watts
+   norm_powercap - power cap without redundant power
+   max_powercap - maximum power cap that can be set in watts
+   min_powercap - minimum power cap that can be set in watts
+   user_powerlimit - power limit specified by the user in watts
+In addition, the OCC driver for P9 will export a 7th entry:
+   user_powerlimit_source - can be one of two values depending on who set
+   the user_powerlimit. 0x1 - out of band from BMC or host. 0x2 -
+   in band from other source.
+The format for these files is caps_. For example,
+caps1_curr_powercap.
+
+The driver also provides a number of sysfs entries through hwmon to better
+control the driver and monitor the OCC.
+   powercap - read or write the OCC user power limit in watts.
+   name - read the name of the driver
+   update_interval - read or write the minimum interval for polling the
+   OCC.
+
+The driver also exports a single sysfs file through the communication protocol
+device (see BMC - Host Communications). The filename is "online" and represents
+the status of the OCC with respect to the driver. The OCC can be in one of two
+states: OCC polling enabled or OCC polling disabled. The purpose of this file
+is to control the behavior of the driver and it's hwmon sysfs entries, not to
+infer any information about the state of the physical OCC. Reading the file
+returns either a 0 (polling disabled) or 1 (polling enabled). Writing 1 to the
+file enables OCC polling in the driver if communications can be established
+with the OCC. Writing a 0 to the driver disables OCC polling.
+
 BMC - Host Communications
 -
 
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index 93cb52f..a6881f9 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o
+obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
diff --git a/drivers/hwmon/occ/occ_sysfs.c b/drivers/hwmon/occ/occ_sysfs.c
new file mode 100644
index 000..b0e063da
--- /dev/null
+++ b/drivers/hwmon/occ/occ_sysfs.c
@@ -0,0 +1,492 @@
+/*
+ * occ_sysfs.c - OCC sysfs interface
+ *
+ * This file contains the methods and data structures for implementing the OCC
+ * hwmon sysfs entries.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "occ_sysfs.h"
+
+#define MAX_SENSOR_ATTR_LEN32
+
+#define RESP_RETURN_CMD_INVAL  0x13
+

[PATCH linux 4/6] hwmon: occ: Add callbacks for parsing P8 OCC datastructures

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to parse the data structures that are specific to the OCC on
the POWER8 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
Reviewed-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|   9 ++
 drivers/hwmon/occ/occ_p8.c | 217 +
 drivers/hwmon/occ/occ_p8.h |  30 +++
 3 files changed, 256 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
index 1ee8689..a6b3dd6 100644
--- a/Documentation/hwmon/occ
+++ b/Documentation/hwmon/occ
@@ -25,6 +25,15 @@ Currently, all versions of the OCC support four types of 
sensor data: power,
 temperature, frequency, and "caps," which indicate limits and thresholds used
 internally on the OCC.
 
+The format for the POWER8 OCC sensor data can be found in the P8 OCC
+specification:
+github.com/open-power/docs/blob/master/occ/OCC_OpenPwr_FW_Interfaces.pdf
+This document provides the details of the OCC sensors: power, frequency,
+temperature, and caps. These sensor formats are specific to the POWER8 OCC. A
+number of data structures, such as command format, response headers, and the
+like, are also defined in this specification, and are common to both POWER8 and
+POWER9 OCCs.
+
 sysfs Entries
 -
 
diff --git a/drivers/hwmon/occ/occ_p8.c b/drivers/hwmon/occ/occ_p8.c
new file mode 100644
index 000..812df16
--- /dev/null
+++ b/drivers/hwmon/occ/occ_p8.c
@@ -0,0 +1,217 @@
+/*
+ * occ_p8.c - OCC hwmon driver
+ *
+ * This file contains the Power8-specific methods and data structures for
+ * the OCC hwmon driver.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "occ.h"
+#include "occ_p8.h"
+
+/* P8 OCC sensor data format */
+struct p8_occ_sensor {
+   u16 sensor_id;
+   u16 value;
+};
+
+struct p8_power_sensor {
+   u16 sensor_id;
+   u32 update_tag;
+   u32 accumulator;
+   u16 value;
+};
+
+struct p8_caps_sensor {
+   u16 curr_powercap;
+   u16 curr_powerreading;
+   u16 norm_powercap;
+   u16 max_powercap;
+   u16 min_powercap;
+   u16 user_powerlimit;
+};
+
+void p8_parse_sensor(u8 *data, void *sensor, int sensor_type, int off,
+int snum)
+{
+   switch (sensor_type) {
+   case FREQ:
+   case TEMP:
+   {
+   struct p8_occ_sensor *os =
+   &(((struct p8_occ_sensor *)sensor)[snum]);
+
+   os->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   os->value = be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   }
+   break;
+   case POWER:
+   {
+   struct p8_power_sensor *ps =
+   &(((struct p8_power_sensor *)sensor)[snum]);
+
+   ps->sensor_id = be16_to_cpu(get_unaligned((u16 *)[off]));
+   ps->update_tag =
+   be32_to_cpu(get_unaligned((u32 *)[off + 2]));
+   ps->accumulator =
+   be32_to_cpu(get_unaligned((u32 *)[off + 6]));
+   ps->value = be16_to_cpu(get_unaligned((u16 *)[off + 10]));
+   }
+   break;
+   case CAPS:
+   {
+   struct p8_caps_sensor *cs =
+   &(((struct p8_caps_sensor *)sensor)[snum]);
+
+   cs->curr_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off]));
+   cs->curr_powerreading =
+   be16_to_cpu(get_unaligned((u16 *)[off + 2]));
+   cs->norm_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 4]));
+   cs->max_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 6]));
+   cs->min_powercap =
+   be16_to_cpu(get_unaligned((u16 *)[off + 8]));
+   cs->user_powerlimit =
+   be16_to_cpu(get_unaligned((u16 *)[off + 10]));
+   }
+   break;
+   };
+}
+
+void *p8_alloc_sensor(int sensor_type, int num_sensors)
+{
+   switch (sensor_type) {
+   case FREQ:
+   case TEMP:
+   return

[PATCH linux 3/6] hwmon: occ: Add I2C transport implementation for SCOM operations

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register space.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 drivers/hwmon/occ/occ_scom_i2c.c | 73 
 drivers/hwmon/occ/occ_scom_i2c.h | 26 ++
 2 files changed, 99 insertions(+)
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h

diff --git a/drivers/hwmon/occ/occ_scom_i2c.c b/drivers/hwmon/occ/occ_scom_i2c.c
new file mode 100644
index 000..a922f83
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.c
@@ -0,0 +1,73 @@
+/*
+ * occ_scom_i2c.c - hwmon OCC driver
+ *
+ * This file contains the functions for performing SCOM operations over I2C bus
+ * to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include "scom.h"
+#include "occ_scom_i2c.h"
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   ssize_t rc;
+   u64 buf;
+   struct i2c_client *client = bus;
+
+   rc = i2c_master_send(client, (const char *), sizeof(u32));
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32))
+   return -EIO;
+
+   rc = i2c_master_recv(client, (char *), sizeof(u64));
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u64))
+   return -EIO;
+
+   *data = be64_to_cpu(buf);
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_getscom);
+
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   u32 buf[3];
+   ssize_t rc;
+   struct i2c_client *client = bus;
+
+   buf[0] = address;
+   buf[1] = data1;
+   buf[2] = data0;
+
+   rc = i2c_master_send(client, (const char *)buf, sizeof(u32) * 3);
+   if (rc < 0)
+   return rc;
+   else if (rc != sizeof(u32) * 3)
+   return -EIO;
+
+   return 0;
+}
+EXPORT_SYMBOL(occ_i2c_putscom);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("I2C OCC SCOM transport");
+MODULE_LICENSE("GPL");
diff --git a/drivers/hwmon/occ/occ_scom_i2c.h b/drivers/hwmon/occ/occ_scom_i2c.h
new file mode 100644
index 000..945739c
--- /dev/null
+++ b/drivers/hwmon/occ/occ_scom_i2c.h
@@ -0,0 +1,26 @@
+/*
+ * occ_scom_i2c.h - hwmon OCC driver
+ *
+ * This file contains function protoypes for peforming SCOM operations over I2C
+ * bus to access the OCC.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __OCC_SCOM_I2C_H__
+#define __OCC_SCOM_I2C_H__
+
+int occ_i2c_getscom(void *bus, u32 address, u64 *data);
+int occ_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1);
+
+#endif /* __OCC_SCOM_I2C_H__ */
-- 
1.9.1

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[PATCH linux 5/6] hwmon: occ: Add hwmon implementation for the P8 OCC

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
Reviewed-by: Andrew Jeffery 
---
 .../devicetree/bindings/i2c/i2c-ibm-occ.txt|  13 ++
 drivers/hwmon/occ/Kconfig  |  14 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/p8_occ_i2c.c | 141 +
 4 files changed, 169 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ibm-occ.txt
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c

diff --git a/Documentation/devicetree/bindings/i2c/i2c-ibm-occ.txt 
b/Documentation/devicetree/bindings/i2c/i2c-ibm-occ.txt
new file mode 100644
index 000..b0d2b36
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-ibm-occ.txt
@@ -0,0 +1,13 @@
+HWMON I2C driver for IBM POWER CPU OCC (On Chip Controller)
+
+Required properties:
+ - compatible: must be "ibm,p8-occ-i2c"
+ - reg: physical address
+
+Example:
+i2c3: i2c-bus@100 {
+   occ@50 {
+   compatible = "ibm,p8-occ-i2c";
+   reg = <0x50>;
+   };
+};
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
index cdb64a7..3a5188f 100644
--- a/drivers/hwmon/occ/Kconfig
+++ b/drivers/hwmon/occ/Kconfig
@@ -13,3 +13,17 @@ menuconfig SENSORS_PPC_OCC
 
  This driver can also be built as a module. If so, the module
  will be called occ.
+
+if SENSORS_PPC_OCC
+
+config SENSORS_PPC_OCC_P8_I2C
+   tristate "POWER8 OCC hwmon support"
+   depends on I2C
+   help
+Provide a hwmon sysfs interface for the POWER8 On-Chip Controller,
+exposing temperature, frequency and power measurements.
+
+This driver can also be built as a module. If so, the module will be
+called p8-occ-i2c.
+
+endif
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
index a6881f9..9294b58 100644
--- a/drivers/hwmon/occ/Makefile
+++ b/drivers/hwmon/occ/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_SENSORS_PPC_OCC) += occ.o occ_sysfs.o
+obj-$(CONFIG_SENSORS_PPC_OCC_P8_I2C) += occ_scom_i2c.o occ_p8.o p8_occ_i2c.o
diff --git a/drivers/hwmon/occ/p8_occ_i2c.c b/drivers/hwmon/occ/p8_occ_i2c.c
new file mode 100644
index 000..0c65894
--- /dev/null
+++ b/drivers/hwmon/occ/p8_occ_i2c.c
@@ -0,0 +1,141 @@
+/*
+ * p8_occ_i2c.c - hwmon OCC driver
+ *
+ * This file contains the i2c layer for accessing the P8 OCC over i2c bus.
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "scom.h"
+#include "occ_scom_i2c.h"
+#include "occ_p8.h"
+#include "occ_sysfs.h"
+
+#define P8_OCC_I2C_NAME"p8-occ-i2c"
+
+static char *caps_sensor_names[] = {
+   "curr_powercap",
+   "curr_powerreading",
+   "norm_powercap",
+   "max_powercap",
+   "min_powercap",
+   "user_powerlimit"
+};
+
+int p8_i2c_getscom(void *bus, u32 address, u64 *data)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_getscom(bus, address, data);
+}
+
+int p8_i2c_putscom(void *bus, u32 address, u32 data0, u32 data1)
+{
+   /* P8 i2c slave requires address to be shifted by 1 */
+   address = address << 1;
+
+   return occ_i2c_putscom(bus, address, data0, data1);
+}
+
+static struct occ_bus_ops p8_bus_ops = {
+   .getscom = p8_i2c_getscom,
+   .putscom = p8_i2c_putscom,
+};
+
+static struct occ_sysfs_config p8_sysfs_config = {
+   .num_caps_fields = ARRAY_SIZE(caps_sensor_names),
+   .caps_names = caps_sensor_names,
+};
+
+static int p8_occ_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   struct occ *occ;
+   struct occ_sysfs *hwmon;
+
+   occ = p8_occ_start(>dev, client, _bus_ops);
+   if (IS_ERR(occ))
+   return PTR_ERR(occ);
+
+   hwmon = occ_sysfs_start(>dev, occ, _sysfs_config);
+   if (IS_ERR(hwmon))
+   return PTR_ERR(hwmon);
+
+   i2c_set_clientdata(client, hwmon);
+
+   return 0;
+}
+
+static int p8_occ_remove(struct i2c_client *client)
+{
+   int rc;
+   struct occ_sysfs *hwmon =

[PATCH linux 0/6] drivers: hwmon: Add On-Chip Controller driver

2016-12-30 Thread eajames . ibm 
From: "Edward A. James" 

This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.

The driver provides an interface on a BMC to poll OCC sensor data, set
user power caps, and perform some basic OCC error handling. It interfaces
with userspace through hwmon.

The driver is currently functional only for the OCC on POWER8 chips.
Communicating with the POWER9 OCC requries FSI support.

Edward A. James (6):
  hwmon: Add core On-Chip Controller support for POWER CPUs
  hwmon: occ: Add sysfs interface
  hwmon: occ: Add I2C transport implementation for SCOM operations
  hwmon: occ: Add callbacks for parsing P8 OCC datastructures
  hwmon: occ: Add hwmon implementation for the P8 OCC
  hwmon: occ: Add callbacks for parsing P9 OCC datastructures

 .../devicetree/bindings/i2c/i2c-ibm-occ.txt|  13 +
 Documentation/hwmon/occ| 100 
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  29 ++
 drivers/hwmon/occ/Makefile |   2 +
 drivers/hwmon/occ/occ.c| 544 +
 drivers/hwmon/occ/occ.h|  86 
 drivers/hwmon/occ/occ_p8.c | 217 
 drivers/hwmon/occ/occ_p8.h |  30 ++
 drivers/hwmon/occ/occ_scom_i2c.c   |  73 +++
 drivers/hwmon/occ/occ_scom_i2c.h   |  26 +
 drivers/hwmon/occ/occ_sysfs.c  | 492 +++
 drivers/hwmon/occ/occ_sysfs.h  |  52 ++
 drivers/hwmon/occ/p8_occ_i2c.c | 141 ++
 drivers/hwmon/occ/p9_occ.c | 243 +
 drivers/hwmon/occ/p9_occ.h |  30 ++
 drivers/hwmon/occ/scom.h   |  47 ++
 18 files changed, 2128 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ibm-occ.txt
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/occ_p8.c
 create mode 100644 drivers/hwmon/occ/occ_p8.h
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.c
 create mode 100644 drivers/hwmon/occ/occ_scom_i2c.h
 create mode 100644 drivers/hwmon/occ/occ_sysfs.c
 create mode 100644 drivers/hwmon/occ/occ_sysfs.h
 create mode 100644 drivers/hwmon/occ/p8_occ_i2c.c
 create mode 100644 drivers/hwmon/occ/p9_occ.c
 create mode 100644 drivers/hwmon/occ/p9_occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

-- 
1.9.1

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