On 02/15/2017 03:07 PM, Greg Kroah-Hartman wrote:
> On Wed, Feb 15, 2017 at 07:50:27PM +, Mark Rutland wrote:
>> On Wed, Feb 15, 2017 at 01:01:59PM -0500, Christopher Covington wrote:
>>> Due to known (although trivial) conflicts in silicon-errata.txt, based on
>>> http://git.kernel.org/cgit/l
On Wed, Feb 15, 2017 at 07:50:27PM +, Mark Rutland wrote:
> On Wed, Feb 15, 2017 at 01:01:59PM -0500, Christopher Covington wrote:
> > The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a
> > custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the
> > BUSY bit
On Wed, Feb 15, 2017 at 01:01:59PM -0500, Christopher Covington wrote:
> The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a
> custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the
> BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1
> an
On 02/15/2017 12:01 PM, Christopher Covington wrote:
Signed-off-by: Christopher Covington
Acked-by: Russell King
Acked-by: Timur Tabi
It would great if we could get this into 4.11. As crazy it sounds, it is the
only critical patch in 4.11 that we need for our platform.
--
Qualcomm Datac
The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a
custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the
BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1
and 2400v1 SoCs.Checking that the Transmit FIFO Empty (TXFE) bit is 0,
instead of
