[PATCH v17 2/6] ARM: socfpga: add bindings document for fpga bridge drivers

2016-02-25 Thread Alan Tull
Add bindings documentation for Altera SOCFPGA bridges: * fpga2sdram * fpga2hps * hps2fpga * lwhps2fpga Signed-off-by: Alan Tull <at...@opensource.altera.com> Signed-off-by: Matthew Gerlach <mgerl...@altera.com> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com>

[PATCH v17 4/6] fpga: add fpga bridge framework

2016-02-25 Thread Alan Tull
* fpga_bridges_put Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v2: Minor cleanup v12: Bump version to line up with simple fpga bus Remove sysfs Improve get/put functions, get the low level driver too. Clean up class implementation Add kernel doc documentation

[PATCH v17 5/6] fpga: fpga-region: device tree control for FPGA

2016-02-25 Thread Alan Tull
FPGA Regions support programming FPGA under control of the Device Tree. Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v9: initial version (this patch added during rest of patchset's v9) v10: request deferral if fpga mgr or bridges not available yet cleanup as fpga manage

[PATCH v17 6/6] ARM: socfpga: fpga bridge driver support

2016-02-25 Thread Alan Tull
during probe. If the property does not exist, the driver will leave the bridge in its current state. Signed-off-by: Alan Tull <at...@opensource.altera.com> Signed-off-by: Matthew Gerlach <mgerl...@altera.com> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com> --- v2:

[PATCH v20 10/10] fpga-manager: Add Socfpga Arria10 support

2016-10-17 Thread Alan Tull
Add low level driver to support reprogramming FPGAs for Altera SoCFPGA Arria10. Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v19: Added to this patchset as has been changed to use fpga image information struct a checkpatch fix of a block comment do not use c

[PATCH v20 04/10] add sysfs document for fpga bridge class

2016-10-17 Thread Alan Tull
Add documentation for new FPGA bridge class's sysfs interface. Signed-off-by: Alan Tull <at...@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fisc...@ettus.com> -- v15: Document added in v15 of patch set v16: No change to this patch in v16 of patch set v17: No change to this

[PATCH v21 1/9] fpga: add bindings document for fpga region

2016-10-25 Thread Alan Tull
New bindings document for FPGA Region to support programming FPGA's under Device Tree control Signed-off-by: Alan Tull <at...@opensource.altera.com> Signed-off-by: Moritz Fischer <moritz.fisc...@ettus.com> Reviewed-by: Rob Herring <r...@kernel.org> --- v9: initial version adde

[PATCH v21 3/9] add sysfs document for fpga bridge class

2016-10-25 Thread Alan Tull
Add documentation for new FPGA bridge class's sysfs interface. Signed-off-by: Alan Tull <at...@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fisc...@ettus.com> -- v15: Document added in v15 of patch set v16: No change to this patch in v16 of patch set v17: No change to this

[PATCH v21 5/9] fpga: add fpga bridge framework

2016-10-25 Thread Alan Tull
* fpga_bridges_put Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v2: Minor cleanup v12: Bump version to line up with simple fpga bus Remove sysfs Improve get/put functions, get the low level driver too. Clean up class implementation Add kernel doc documentation

[PATCH v21 0/9] Device Tree support for FPGA Programming

2016-10-25 Thread Alan Tull
github.com/pantoniou/linux-beagle-track-mainline Alan Alan Tull (9): fpga: add bindings document for fpga region doc: fpga-mgr: add fpga image info to api add sysfs document for fpga bridge class fpga-mgr: add fpga image information struct fpga: add fpga bridge framework fpga: fpga-regi

[PATCH v21 7/9] ARM: socfpga: fpga bridge driver support

2016-10-25 Thread Alan Tull
during probe. If the property does not exist, the driver will leave the bridge in its current state. Signed-off-by: Alan Tull <at...@opensource.altera.com> Signed-off-by: Matthew Gerlach <mgerl...@altera.com> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com> --- v2:

[PATCH v21 4/9] fpga-mgr: add fpga image information struct

2016-10-25 Thread Alan Tull
, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Subsequent patches fix the existing low level FPGA manager drivers. Signed-off-by: Alan Tull <at...@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fisc...@ettus.com> --- v19: Added in v19 of this

[PATCH v21 8/9] fpga: add altera freeze bridge support

2016-10-25 Thread Alan Tull
Add a low level driver for Altera Freeze Bridges to the FPGA Bridge framework. A freeze bridge is a bridge that exists in the FPGA fabric to isolate one region of the FPGA from the busses while that one region is being reprogrammed. Signed-off-by: Alan Tull <at...@opensource.altera.com>

[PATCH v21 9/9] fpga-manager: Add Socfpga Arria10 support

2016-10-25 Thread Alan Tull
Add low level driver to support reprogramming FPGAs for Altera SoCFPGA Arria10. Signed-off-by: Alan Tull <at...@opensource.altera.com> Reviewed-by: Moritz Fischer <moritz.fisc...@ettus.com> --- v19: Added to this patchset as has been changed to use fpga image inform

[PATCH v21 2/9] doc: fpga-mgr: add fpga image info to api

2016-10-25 Thread Alan Tull
times to enable or disable. This patch documents the change in the FPGA Manager API functions, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Signed-off-by: Alan Tull <at...@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fisc...@ettus.com> --

[PATCH v20 06/10] fpga: add fpga bridge framework

2016-10-17 Thread Alan Tull
* fpga_bridges_put Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v2: Minor cleanup v12: Bump version to line up with simple fpga bus Remove sysfs Improve get/put functions, get the low level driver too. Clean up class implementation Add kernel doc documentation

[PATCH v20 07/10] fpga: fpga-region: device tree control for FPGA

2016-10-17 Thread Alan Tull
FPGA Regions support programming FPGA under control of the Device Tree. Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v9: initial version (this patch added during rest of patchset's v9) v10: request deferral if fpga mgr or bridges not available yet cleanup as fpga manage

[PATCH v20 01/10] fpga: add bindings document for fpga region

2016-10-17 Thread Alan Tull
New bindings document for FPGA Region to support programming FPGA's under Device Tree control Signed-off-by: Alan Tull <at...@opensource.altera.com> Signed-off-by: Moritz Fischer <moritz.fisc...@ettus.com> Reviewed-by: Rob Herring <r...@kernel.org> --- v9: initial version adde

[PATCH v20 00/10] Device Tree support for FPGA Programming

2016-10-17 Thread Alan Tull
* Pantelis' configfs interface patches and fixes https://github.com/pantoniou/linux-beagle-track-mainline Alan Alan Tull (10): fpga: add bindings document for fpga region doc: fpga-mgr: add fpga image info to api add bindings document for altera freeze bridge add sysfs document for f

[PATCH v20 02/10] doc: fpga-mgr: add fpga image info to api

2016-10-17 Thread Alan Tull
times to enable or disable. This patch documents the change in the FPGA Manager API functions, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v19: Added in v19 of this patchset v20: No change for this

[PATCH v20 03/10] add bindings document for altera freeze bridge

2016-10-17 Thread Alan Tull
Add bindings document for the Altera Freeze Bridge. A Freeze Bridge is used to gate traffic to/from a region of a FPGA such that that region can be reprogrammed. The Freeze Bridge exist in FPGA fabric that is not currently being reconfigured. Signed-off-by: Alan Tull

[PATCH v20 05/10] fpga-mgr: add fpga image information struct

2016-10-17 Thread Alan Tull
, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Subsequent patches fix the existing low level FPGA manager drivers. Signed-off-by: Alan Tull <at...@opensource.altera.com> --- v19: Added in v19 of this patchset v20: Squashed patches that change API for socfpga an

[PATCH v20 08/10] ARM: socfpga: fpga bridge driver support

2016-10-17 Thread Alan Tull
during probe. If the property does not exist, the driver will leave the bridge in its current state. Signed-off-by: Alan Tull <at...@opensource.altera.com> Signed-off-by: Matthew Gerlach <mgerl...@altera.com> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com> --- v2:

[PATCH v20 09/10] fpga: add altera freeze bridge support

2016-10-17 Thread Alan Tull
Add a low level driver for Altera Freeze Bridges to the FPGA Bridge framework. A freeze bridge is a bridge that exists in the FPGA fabric to isolate one region of the FPGA from the busses while that one region is being reprogrammed. Signed-off-by: Alan Tull <at...@opensource.altera.com>