Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
On 3/6/2025 11:29 PM, Andrew Lunn wrote:
Thanks for the suggestion. Just to clarify, we preferred
u32p_replace_bits() over FIELD_PREP() because the former does
a clear-and-set operation against a given mask, where as with
FIELD_PREP(), we need to clear the bits first before we use the
macro and then set it. Due to this, we preferred using
u32_replace_bits() since it made the macro definitions to modify
the registers simpler. Given this, would it be acceptable to
document u32p_replace_bits() better, as it is already being used
by other drivers as well?
I suggest you submit a patch to those who maintain that file and see
what they say.
But maybe also look at how others are using u32p_replace_bits() and
should it be wrapped up in a macro? FIELD_MOD()? These macros do a lot
of build time checking that you are not overflowing the type. It would
be good to have that to catch bugs at build time, rather than years
later at runtime.
Andrew
OK, understand. I will submit the patch by adding the FIELD_MODIFY()
with required build time checking included.
Below is a draft of the macro, please take a look if possible before
it is posted to maintainers. I will update the driver to use this macro
if it can be accepted. Thanks.
/**
* FIELD_MODIFY() - modify a bitfield element
* @_mask: shifted mask defining the field's length and position
* @_reg_p: point to the memory that should be updated
* @_val: value to store in the bitfield
*
* FIELD_MODIFY() modifies the set of bits in @_reg_p specified
* by @_mask, by replacing them with the bitfield value passed
* in as @_val.
*/
#define FIELD_MODIFY(_mask, _reg_p, _val) \
({ \
__BF_FIELD_CHECK(_mask, *_reg_p, _val, "FIELD_MODIFY:
"); \
*_reg_p &= ~(_mask); \
*_reg_p |= (_val) << __bf_shf(_mask) & (_mask); \
})
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
> Thanks for the suggestion. Just to clarify, we preferred > u32p_replace_bits() over FIELD_PREP() because the former does > a clear-and-set operation against a given mask, where as with > FIELD_PREP(), we need to clear the bits first before we use the > macro and then set it. Due to this, we preferred using > u32_replace_bits() since it made the macro definitions to modify > the registers simpler. Given this, would it be acceptable to > document u32p_replace_bits() better, as it is already being used > by other drivers as well? I suggest you submit a patch to those who maintain that file and see what they say. But maybe also look at how others are using u32p_replace_bits() and should it be wrapped up in a macro? FIELD_MOD()? These macros do a lot of build time checking that you are not overflowing the type. It would be good to have that to catch bugs at build time, rather than years later at runtime. Andrew
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
On 2/20/2025 11:09 PM, Andrew Lunn wrote:
On Thu, Feb 20, 2025 at 10:38:03PM +0800, Jie Luo wrote:
On 2/11/2025 9:22 PM, Andrew Lunn wrote:
+ /* Configure BM flow control related threshold. */
+ PPE_BM_PORT_FC_SET_WEIGHT(bm_fc_val, port_cfg.weight);
+ PPE_BM_PORT_FC_SET_RESUME_OFFSET(bm_fc_val, port_cfg.resume_offset);
+ PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(bm_fc_val, port_cfg.resume_ceil);
+ PPE_BM_PORT_FC_SET_DYNAMIC(bm_fc_val, port_cfg.dynamic);
+ PPE_BM_PORT_FC_SET_REACT_LIMIT(bm_fc_val, port_cfg.in_fly_buf);
+ PPE_BM_PORT_FC_SET_PRE_ALLOC(bm_fc_val, port_cfg.pre_alloc);
...
+#define PPE_BM_PORT_FC_CFG_TBL_ADDR0x601000
+#define PPE_BM_PORT_FC_CFG_TBL_ENTRIES 15
+#define PPE_BM_PORT_FC_CFG_TBL_INC 0x10
+#define PPE_BM_PORT_FC_W0_REACT_LIMIT GENMASK(8, 0)
+#define PPE_BM_PORT_FC_W0_RESUME_THRESHOLD GENMASK(17, 9)
+#define PPE_BM_PORT_FC_W0_RESUME_OFFSETGENMASK(28, 18)
+#define PPE_BM_PORT_FC_W0_CEILING_LOW GENMASK(31, 29)
+#define PPE_BM_PORT_FC_W1_CEILING_HIGH GENMASK(7, 0)
+#define PPE_BM_PORT_FC_W1_WEIGHT GENMASK(10, 8)
+#define PPE_BM_PORT_FC_W1_DYNAMIC BIT(11)
+#define PPE_BM_PORT_FC_W1_PRE_ALLOCGENMASK(22, 12)
+
+#define PPE_BM_PORT_FC_SET_REACT_LIMIT(tbl_cfg, value) \
+ u32p_replace_bits((u32 *)tbl_cfg, value, PPE_BM_PORT_FC_W0_REACT_LIMIT)
+#define PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(tbl_cfg, value)\
+ u32p_replace_bits((u32 *)tbl_cfg, value,
PPE_BM_PORT_FC_W0_RESUME_THRESHOLD)
Where is u32p_replace_bits()?
u32p_replace_bits is defined by the macro __MAKE_OP(32) in the header
file "include/linux/bitfield.h".
Given it is pretty well hidden, and not documented, it makes me think
you should not be using it. The macros you are expected to use from
that file are all well documented.
OK, understand.
This cast does not look good.
Yes, we can remove the cast.
To some extent, this is a symptom. Why is the cast there in the first
place? Cast suggest bad design, not thinking about types, thinking it
is actual O.K. to cast between types. Please look at all the casts you
have. Is it because of bad design? If so, please fix your types to
eliminate the casts.
Sure, this cast is actually redundant, the type of value passed to this
macro is already defined as the type u32. I will review and remove the
remaining casts in the ppe_reg.h file.
And this does not look like anything any
other driver does. I suspect you are not using FIELD_PREP() etc when
you should.
https://elixir.bootlin.com/linux/v6.14-rc2/source/include/linux/bitfield.h
Andrew
The PPE_BM_XXX macros defined here write to either of two different
32bit words in the register table, and the actual word used (0 or 1)
is hidden within the macro. For example, the below macro.
#define PPE_BM_PORT_FC_SET_CEILING_HIGH(tbl_cfg, value) \
u32p_replace_bits((u32 *)(tbl_cfg) + 0x1, value,
PPE_BM_PORT_FC_W1_CEILING_HIGH)
We could have used FIELD_PREP as well for this purpose. However using
u32p_replace_bits() seemed more convenient and cleaner in this case,
since with FIELD_PREP, we would have needed an assignment statement to
be defined in the macro implementation. We also noticed many other
drivers using u32_replace_bits(). Hope this is ok.
Please extend the set of FIELD_{GET,PREP} macros to cover your use
case. Document them to the level of the existing macros. Submit the
patch to:
Yury Norov (maintainer:BITMAP API)
Rasmus Villemoes (reviewer:BITMAP API)
etc
and see what they say about this.
Andrew
Thanks for the suggestion. Just to clarify, we preferred
u32p_replace_bits() over FIELD_PREP() because the former does
a clear-and-set operation against a given mask, where as with
FIELD_PREP(), we need to clear the bits first before we use the
macro and then set it. Due to this, we preferred using
u32_replace_bits() since it made the macro definitions to modify
the registers simpler. Given this, would it be acceptable to
document u32p_replace_bits() better, as it is already being used
by other drivers as well?
If you prefer to use FIELD_PREP() over u32p_replace_bits(), we
can update the driver to change the macros to use FIELD_PREP().
Please note that all our macros for register modifications
operate only on 32bit values. so we do not have any necessity
for casts in the code.
Below is one example per my understanding, implemented for
both cases - u32p_replace_bits() and FIELD_PREP:
#define PPE_BM_PORT_FC_SET_WEIGHT(tbl_cfg, value) \
u32p_replace_bits(tbl_cfg + 0x1, value, PPE_BM_PORT_FC_W1_WEIGHT)
#define PPE_BM_PORT_FC_SET_WEIGHT(tbl_cfg, value) \
do { \
*(tbl_cfg + 0x1) &= ~PPE_BM_PORT_FC_W1_WEIGHT; \
*(tbl_cfg + 0x1) |= FIELD_PREP(PPE_BM_PORT_FC_W1_WEIGHT, value); \
} while (0)
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
On Thu, Feb 20, 2025 at 10:38:03PM +0800, Jie Luo wrote:
>
>
> On 2/11/2025 9:22 PM, Andrew Lunn wrote:
> > > + /* Configure BM flow control related threshold. */
> > > + PPE_BM_PORT_FC_SET_WEIGHT(bm_fc_val, port_cfg.weight);
> > > + PPE_BM_PORT_FC_SET_RESUME_OFFSET(bm_fc_val, port_cfg.resume_offset);
> > > + PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(bm_fc_val, port_cfg.resume_ceil);
> > > + PPE_BM_PORT_FC_SET_DYNAMIC(bm_fc_val, port_cfg.dynamic);
> > > + PPE_BM_PORT_FC_SET_REACT_LIMIT(bm_fc_val, port_cfg.in_fly_buf);
> > > + PPE_BM_PORT_FC_SET_PRE_ALLOC(bm_fc_val, port_cfg.pre_alloc);
> >
> > ...
> >
> > > +#define PPE_BM_PORT_FC_CFG_TBL_ADDR 0x601000
> > > +#define PPE_BM_PORT_FC_CFG_TBL_ENTRIES 15
> > > +#define PPE_BM_PORT_FC_CFG_TBL_INC 0x10
> > > +#define PPE_BM_PORT_FC_W0_REACT_LIMITGENMASK(8, 0)
> > > +#define PPE_BM_PORT_FC_W0_RESUME_THRESHOLD GENMASK(17, 9)
> > > +#define PPE_BM_PORT_FC_W0_RESUME_OFFSET GENMASK(28, 18)
> > > +#define PPE_BM_PORT_FC_W0_CEILING_LOWGENMASK(31, 29)
> > > +#define PPE_BM_PORT_FC_W1_CEILING_HIGH GENMASK(7, 0)
> > > +#define PPE_BM_PORT_FC_W1_WEIGHT GENMASK(10, 8)
> > > +#define PPE_BM_PORT_FC_W1_DYNAMICBIT(11)
> > > +#define PPE_BM_PORT_FC_W1_PRE_ALLOC GENMASK(22, 12)
> > > +
> > > +#define PPE_BM_PORT_FC_SET_REACT_LIMIT(tbl_cfg, value) \
> > > + u32p_replace_bits((u32 *)tbl_cfg, value, PPE_BM_PORT_FC_W0_REACT_LIMIT)
> > > +#define PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(tbl_cfg, value) \
> > > + u32p_replace_bits((u32 *)tbl_cfg, value,
> > > PPE_BM_PORT_FC_W0_RESUME_THRESHOLD)
> >
> > Where is u32p_replace_bits()?
>
> u32p_replace_bits is defined by the macro __MAKE_OP(32) in the header
> file "include/linux/bitfield.h".
Given it is pretty well hidden, and not documented, it makes me think
you should not be using it. The macros you are expected to use from
that file are all well documented.
> > This cast does not look good.
>
> Yes, we can remove the cast.
To some extent, this is a symptom. Why is the cast there in the first
place? Cast suggest bad design, not thinking about types, thinking it
is actual O.K. to cast between types. Please look at all the casts you
have. Is it because of bad design? If so, please fix your types to
eliminate the casts.
> > And this does not look like anything any
> > other driver does. I suspect you are not using FIELD_PREP() etc when
> > you should.
> >
> > https://elixir.bootlin.com/linux/v6.14-rc2/source/include/linux/bitfield.h
> >
> > Andrew
>
> The PPE_BM_XXX macros defined here write to either of two different
> 32bit words in the register table, and the actual word used (0 or 1)
> is hidden within the macro. For example, the below macro.
>
> #define PPE_BM_PORT_FC_SET_CEILING_HIGH(tbl_cfg, value) \
> u32p_replace_bits((u32 *)(tbl_cfg) + 0x1, value,
> PPE_BM_PORT_FC_W1_CEILING_HIGH)
>
> We could have used FIELD_PREP as well for this purpose. However using
> u32p_replace_bits() seemed more convenient and cleaner in this case,
> since with FIELD_PREP, we would have needed an assignment statement to
> be defined in the macro implementation. We also noticed many other
> drivers using u32_replace_bits(). Hope this is ok.
Please extend the set of FIELD_{GET,PREP} macros to cover your use
case. Document them to the level of the existing macros. Submit the
patch to:
Yury Norov (maintainer:BITMAP API)
Rasmus Villemoes (reviewer:BITMAP API)
etc
and see what they say about this.
Andrew
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
On 2/11/2025 9:22 PM, Andrew Lunn wrote: + /* Configure BM flow control related threshold. */ + PPE_BM_PORT_FC_SET_WEIGHT(bm_fc_val, port_cfg.weight); + PPE_BM_PORT_FC_SET_RESUME_OFFSET(bm_fc_val, port_cfg.resume_offset); + PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(bm_fc_val, port_cfg.resume_ceil); + PPE_BM_PORT_FC_SET_DYNAMIC(bm_fc_val, port_cfg.dynamic); + PPE_BM_PORT_FC_SET_REACT_LIMIT(bm_fc_val, port_cfg.in_fly_buf); + PPE_BM_PORT_FC_SET_PRE_ALLOC(bm_fc_val, port_cfg.pre_alloc); ... +#define PPE_BM_PORT_FC_CFG_TBL_ADDR0x601000 +#define PPE_BM_PORT_FC_CFG_TBL_ENTRIES 15 +#define PPE_BM_PORT_FC_CFG_TBL_INC 0x10 +#define PPE_BM_PORT_FC_W0_REACT_LIMIT GENMASK(8, 0) +#define PPE_BM_PORT_FC_W0_RESUME_THRESHOLD GENMASK(17, 9) +#define PPE_BM_PORT_FC_W0_RESUME_OFFSETGENMASK(28, 18) +#define PPE_BM_PORT_FC_W0_CEILING_LOW GENMASK(31, 29) +#define PPE_BM_PORT_FC_W1_CEILING_HIGH GENMASK(7, 0) +#define PPE_BM_PORT_FC_W1_WEIGHT GENMASK(10, 8) +#define PPE_BM_PORT_FC_W1_DYNAMIC BIT(11) +#define PPE_BM_PORT_FC_W1_PRE_ALLOCGENMASK(22, 12) + +#define PPE_BM_PORT_FC_SET_REACT_LIMIT(tbl_cfg, value) \ + u32p_replace_bits((u32 *)tbl_cfg, value, PPE_BM_PORT_FC_W0_REACT_LIMIT) +#define PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(tbl_cfg, value)\ + u32p_replace_bits((u32 *)tbl_cfg, value, PPE_BM_PORT_FC_W0_RESUME_THRESHOLD) Where is u32p_replace_bits()? u32p_replace_bits is defined by the macro __MAKE_OP(32) in the header file "include/linux/bitfield.h". This cast does not look good. Yes, we can remove the cast. And this does not look like anything any other driver does. I suspect you are not using FIELD_PREP() etc when you should. https://elixir.bootlin.com/linux/v6.14-rc2/source/include/linux/bitfield.h Andrew The PPE_BM_XXX macros defined here write to either of two different 32bit words in the register table, and the actual word used (0 or 1) is hidden within the macro. For example, the below macro. #define PPE_BM_PORT_FC_SET_CEILING_HIGH(tbl_cfg, value) \ u32p_replace_bits((u32 *)(tbl_cfg) + 0x1, value, PPE_BM_PORT_FC_W1_CEILING_HIGH) We could have used FIELD_PREP as well for this purpose. However using u32p_replace_bits() seemed more convenient and cleaner in this case, since with FIELD_PREP, we would have needed an assignment statement to be defined in the macro implementation. We also noticed many other drivers using u32_replace_bits(). Hope this is ok.
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
On 2/11/2025 9:14 PM, Andrew Lunn wrote: +/* Assign the share buffer number 1550 to group 0 by default. */ +static const int ipq9574_ppe_bm_group_config = 1550; To a large extent, the comment is useless. What should be in the comment is why, not what. Andrew OK, I will improve the comment to describe it better. There are total 2048 buffers available in PPE, out of which some buffers are reserved for some specific purposes. The rest of the pool of 1550 buffers are assigned to the general 'group0' which is shared among all ports of the PPE.
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
> + /* Configure BM flow control related threshold. */ > + PPE_BM_PORT_FC_SET_WEIGHT(bm_fc_val, port_cfg.weight); > + PPE_BM_PORT_FC_SET_RESUME_OFFSET(bm_fc_val, port_cfg.resume_offset); > + PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(bm_fc_val, port_cfg.resume_ceil); > + PPE_BM_PORT_FC_SET_DYNAMIC(bm_fc_val, port_cfg.dynamic); > + PPE_BM_PORT_FC_SET_REACT_LIMIT(bm_fc_val, port_cfg.in_fly_buf); > + PPE_BM_PORT_FC_SET_PRE_ALLOC(bm_fc_val, port_cfg.pre_alloc); ... > +#define PPE_BM_PORT_FC_CFG_TBL_ADDR 0x601000 > +#define PPE_BM_PORT_FC_CFG_TBL_ENTRIES 15 > +#define PPE_BM_PORT_FC_CFG_TBL_INC 0x10 > +#define PPE_BM_PORT_FC_W0_REACT_LIMITGENMASK(8, 0) > +#define PPE_BM_PORT_FC_W0_RESUME_THRESHOLD GENMASK(17, 9) > +#define PPE_BM_PORT_FC_W0_RESUME_OFFSET GENMASK(28, 18) > +#define PPE_BM_PORT_FC_W0_CEILING_LOWGENMASK(31, 29) > +#define PPE_BM_PORT_FC_W1_CEILING_HIGH GENMASK(7, 0) > +#define PPE_BM_PORT_FC_W1_WEIGHT GENMASK(10, 8) > +#define PPE_BM_PORT_FC_W1_DYNAMICBIT(11) > +#define PPE_BM_PORT_FC_W1_PRE_ALLOC GENMASK(22, 12) > + > +#define PPE_BM_PORT_FC_SET_REACT_LIMIT(tbl_cfg, value) \ > + u32p_replace_bits((u32 *)tbl_cfg, value, PPE_BM_PORT_FC_W0_REACT_LIMIT) > +#define PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(tbl_cfg, value) \ > + u32p_replace_bits((u32 *)tbl_cfg, value, > PPE_BM_PORT_FC_W0_RESUME_THRESHOLD) Where is u32p_replace_bits()? This cast does not look good. And this does not look like anything any other driver does. I suspect you are not using FIELD_PREP() etc when you should. https://elixir.bootlin.com/linux/v6.14-rc2/source/include/linux/bitfield.h Andrew
Re: [PATCH net-next v3 04/14] net: ethernet: qualcomm: Initialize PPE buffer management for IPQ9574
> +/* Assign the share buffer number 1550 to group 0 by default. */ > +static const int ipq9574_ppe_bm_group_config = 1550; To a large extent, the comment is useless. What should be in the comment is why, not what. Andrew
