於 五，2013-08-30 於 19:41 -0400，Josh Boyer 提到：
On Fri, Aug 30, 2013 at 01:46:30PM -0700, H. Peter Anvin wrote:
On 08/29/2013 11:37 AM, Josh Boyer wrote:
setup_efi_pci(boot_params);
diff --git a/arch/x86/include/uapi/asm/bootparam.h
b/arch/x86/include/uapi/asm/bootparam.h
On Wed, Sep 4, 2013 at 6:51 AM, joeyli j...@suse.com wrote:
於 五，2013-08-30 於 19:41 -0400，Josh Boyer 提到：
On Fri, Aug 30, 2013 at 01:46:30PM -0700, H. Peter Anvin wrote:
On 08/29/2013 11:37 AM, Josh Boyer wrote:
setup_efi_pci(boot_params);
diff --git
於 三，2013-09-04 於 08:01 -0400，Josh Boyer 提到：
On Wed, Sep 4, 2013 at 6:51 AM, joeyli j...@suse.com wrote:
於 五，2013-08-30 於 19:41 -0400，Josh Boyer 提到：
On Fri, Aug 30, 2013 at 01:46:30PM -0700, H. Peter Anvin wrote:
On 08/29/2013 11:37 AM, Josh Boyer wrote:
On Wed, Sep 4, 2013 at 11:53 AM, Kees Cook keesc...@chromium.org wrote:
On Tue, Sep 3, 2013 at 4:50 PM, Matthew Garrett
matthew.garr...@nebula.com wrote:
We have two in-kernel mechanisms for restricting module loading - disabling
it entirely, or limiting it to the loading of modules signed
On Tue, Sep 3, 2013 at 4:50 PM, Matthew Garrett
matthew.garr...@nebula.com wrote:
We have two in-kernel mechanisms for restricting module loading - disabling
it entirely, or limiting it to the loading of modules signed with a trusted
key. These can both be configured in such a way that even
On Tue, 2013-09-03 at 19:50 -0400, Matthew Garrett wrote:
Any hardware that can potentially generate DMA has to be locked down from
userspace in order to avoid it being possible for an attacker to modify
kernel code, allowing them to circumvent disabled module loading or module
signing.
On Wed, 2013-09-04 at 19:58 +0100, David Woodhouse wrote:
On Wed, 2013-09-04 at 17:04 +, Matthew Garrett wrote:
How does virt passthrough work in this case? The current situation
appears to be that qemu just passes the BARs through to the guest, and
it's the guest that sets things up.
On Wed, 2013-09-04 at 17:04 +, Matthew Garrett wrote:
Do we have in-kernel API to guarantee that a given PCI device is
actively isolated by an IOMMU such that it can't modify any host kernel
pages that aren't explicitly intended to be writable by the device? That
seems to be the biggest
On Wed, 2013-09-04 at 19:01 +, Matthew Garrett wrote:
But presumably the guest's view of RAM is what gets written to the BARs?
You're talking about the MMIO BARs of the devices which are given to the
guest, right? The register into which we write the 'ring buffer
address', and for that
On Wed, Sep 4, 2013 at 4:09 PM, jerry.hoem...@hp.com wrote:
On Tue, Sep 03, 2013 at 07:50:15PM -0400, Matthew Garrett wrote:
kexec permits the loading and execution of arbitrary code in ring 0, which
is something that module signing enforcement is meant to prevent. It makes
sense to disable
於 二，2013-09-03 於 19:50 -0400，Matthew Garrett 提到：
Provide a single call to allow kernel code to determine whether the system
has been configured to either disable module loading entirely or to load
only modules signed with a trusted key.
Signed-off-by: Matthew Garrett
於 二，2013-09-03 於 19:50 -0400，Matthew Garrett 提到：
UEFI Secure Boot provides a mechanism for ensuring that the firmware will
only load signed bootloaders and kernels. Certain use cases may also
require that all kernel modules also be signed. Add a configuration option
that enforces this
於 二，2013-09-03 於 19:50 -0400，Matthew Garrett 提到：
uswsusp allows a user process to dump and then restore kernel state, which
makes it possible to avoid module loading restrictions. Prevent this when
any restrictions have been imposed on loading modules.
Signed-off-by: Matthew Garrett
On 09/03/2013 04:50 PM, Matthew Garrett wrote:
IO port access would permit users to gain access to PCI configuration
registers, which in turn (on a lot of hardware) give access to MMIO register
space. This would potentially permit root to trigger arbitrary DMA, so lock
it down by default.
On Wed, 2013-09-04 at 20:52 -0700, H. Peter Anvin wrote:
On 09/03/2013 04:50 PM, Matthew Garrett wrote:
IO port access would permit users to gain access to PCI configuration
registers, which in turn (on a lot of hardware) give access to MMIO register
space. This would potentially permit
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