On Tue, Apr 11, 2017 at 06:37:54PM +0100, Ard Biesheuvel wrote:
> On 11 April 2017 at 11:20, Gary Lin wrote:
> > This commit adds the new config options to allow the user to modify the
> > following fields in the PE-COFF header.
> >
> > UINT16 MajorOperatingSystemVersion
> > UINT16
On 11 April 2017 at 11:20, Gary Lin wrote:
> This commit adds the new config options to allow the user to modify the
> following fields in the PE-COFF header.
>
> UINT16 MajorOperatingSystemVersion
> UINT16 MinorOperatingSystemVersion
> UINT16 MajorImageVersion
> UINT16
On Tue, Mar 28, 2017 at 01:30:31PM -0600, Tyler Baicar wrote:
> A RAS (Reliability, Availability, Serviceability) controller
> may be a separate processor running in parallel with OS
> execution, and may generate error records for consumption by
> the OS. If the RAS controller produces multiple
On 11 April 2017 at 14:16, Lorenzo Pieralisi wrote:
> On Mon, Apr 10, 2017 at 06:29:27PM +0100, Ard Biesheuvel wrote:
>
> [...]
>
>> >>> So before starting the next round of hacking to work around this, I
>> >>> would like rekindle the discussion regarding the way we
On Mon, Apr 10, 2017 at 06:29:27PM +0100, Ard Biesheuvel wrote:
[...]
> >>> So before starting the next round of hacking to work around this, I
> >>> would like rekindle the discussion regarding the way we blindly
> >>> reassign all resources on ACPI/arm64 systems, and whether there is a
> >>>
This commit adds the new config options to allow the user to modify the
following fields in the PE-COFF header.
UINT16 MajorOperatingSystemVersion
UINT16 MinorOperatingSystemVersion
UINT16 MajorImageVersion
UINT16 MinorImageVersion
Those fields are mainly for the executables or libraries in
Claiming the BAR that matches the framebuffer base address in a PCI
header fixup quirk only works as expected when the PCI device is on
bus 0. If not, it will produce the following error:
pci :01:01.0: can't claim BAR 0 [mem 0x1000-0x10ff pref]: