On Wed, 2015-02-04 at 14:30 +0100, Linus Walleij wrote:
On Tue, Feb 3, 2015 at 8:49 AM, Ken Xue ken@amd.com wrote:
KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM.
Current driver patch only support GPIO in x86.
Signed-off-by: Ken Xue ken@amd.com
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
---
arch/arm/boot/dts/r8a73a4-ape6evm.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
index 5baada97bc715838..81a38ceee098087e 100644
---
Rob, Mark,
On Mon, 23 Feb 2015 10:50:26 -0600, Rob Herring wrote:
On Mon, Feb 23, 2015 at 10:00 AM, Gregory CLEMENT
Not exactly, stdout-path allows for removing console from the
command line. earlyprintk is a debug/developer option, so it should
not be in a default command line IMO.
So
The switches on r8a73a4/ape6evm do not have pull-up registers. The
schematics say: Need to use APE6 internal PullUp, hence enable pull-up
using pinctrl.
Without this, the switches don't really work, as the GPIO inputs are
more likely to pick up ghost signals through capacitive coupling than
As register and field widths and offsets are in the range 0..32, use
unsigned int (mostly replacing unsigned long) to store them in local
variables and for passing them around.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
---
drivers/pinctrl/sh-pfc/core.c | 25
After the last user of the in_pd/in_pu bias parameters of the _PCRH()
macro was removed in commit 80da8e02d22caaef (sh-pfc: r8a7740: Add bias
(pull-up/down) pinconf support), bias parameters are supposed to be
configured using the generic pinctl mechanism, which calls the
.set_bias() method.
As PFC registers are either 8, 16, or 32 bits wide, use u32 (mostly
replacing unsigned long) to store (parts of) register values and masks.
Switch the shadow register operations from {set,clear}_bit() to plain C
bit operations, as the former can operate on long data only.
Signed-off-by: Geert
Register and field widths are in the range 1..32. Storing them in the
pinctrl data in (arrays of) unsigned long wastes space.
This decreases the size of a (32-bit) shmobile_defconfig kernel
supporting 7 SoCs by 26460 bytes.
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
---
Hi,
This patch series fixes bias (pull up/down) for Renesas R-Mobile and
SH-Mobile SoCs, and does some code (type) cleanups.
- Patch 1 fixes the overwriting of the bias field in the port control
register when configuring a pin for GPIO,
- Patch 2 changes the types used for
Gregory,
On Mon, 23 Feb 2015 16:27:02 +0100, Gregory CLEMENT wrote:
I already submitted this fix as part of the fixes and improvements for
SDHCI series.
Ok, I will drop this patch from my series. Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android
On Thu, Feb 26, 2015 at 11:27 AM, Alexandre Courbot gnu...@gmail.com wrote:
On Fri, Feb 20, 2015 at 1:52 AM, Linus Walleij linus.wall...@linaro.org
wrote:
On Thu, Feb 19, 2015 at 9:53 AM, folkert folk...@vanheusden.com wrote:
I also think that this interface is cumbersome. I did not measure
On Thu, 26 Feb 2015, Alexandre Courbot wrote:
On Mon, Jan 26, 2015 at 2:16 AM, Andreas Bofjall andr...@gazonk.org wrote:
this series adds support for the gpio pins on the Fintek F71869 and F71869A
SuperI/O chips to the gpio-f7188x driver. The chips are used on for example
Jetway motherboards.
The pin array handled by sh_pfc_map_pins() may contain holes representing non-
existing pins. We have to first count the valid pins in order to calculate the
size of the memory to be allocated, then to skip over the non-existing pins
when initializing the allocated arrays, and then to return
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