Quoting Nicolin Chen :
On Wed, Oct 24, 2018 at 06:01:16PM -0700, Nicolin Chen wrote:
On Thu, Oct 25, 2018 at 12:13:01AM +, li...@roeck-us.net wrote:
> > + if (dev) {
> > + hdev->driver = dev->driver;
> > + hdev->power = dev->power;
> > +
On 10/24/2018 10:30 PM, Lee Jones wrote:
On Wed, 24 Oct 2018, Jae Hyun Yoo wrote:
On 10/24/2018 3:59 AM, Lee Jones wrote:
On Tue, 18 Sep 2018, Jae Hyun Yoo wrote:
This commit adds PECI client MFD driver.
[...]
+bool peci_temp_need_update(struct temp_data *temp)
+{
+ if
On Thu, Oct 25, 2018 at 06:55:31AM +, li...@roeck-us.net wrote:
> > won't work then. I guess it'd be safer to ignore the problem of
> > the power node, i.e. using parent dev pointer for pm runtime.
> >
> It might be worthwhile looking up how other virtal devices handle
> this problem. Maybe
This series patches implement PM runtime feature in the ina3221 hwmon
driver (PATCH-5). However, PATCH-[1:4] are required to make sure that
the PM runtime feature would be functional and safe.
Changelog
v3->v4:
* Added generic pm runtime functions to hwmon class (PATCH-1)
* Updated to pass pm
The hwmon core generates an extra child dev pointer for every
registered hwmon driver so as to link the new device to hwmon
class, and it exposes this new dev in /sys/class/hwmon/hwmon*/
directory including a power directory for pm runtime. However,
there is currently no way for hwmon drivers to
If all three channels are disabled via in[123]_enable ABI,
the driver could suspend the chip for power saving purpose.
So this patch adds the PM runtime support in order to gain
more power control than system suspend and resume use case.
For PM runtime, there are a few related changes happening:
This change adds a mutex to serialize accesses of sysfs attributes.
This is required when polling CVRF bit of the MASK/ENABLE register
because this bit is cleared on a read of this MASK/ENABLE register
or a write to CONFIG register, which means that this bit might be
accidentally cleared by
