On Tue, Jun 14, 2011 at 03:17:05PM +0800, Eric Miao wrote:
The original algorithm doesn't perform very well in some cases, e.g.
When the source clock of the I2C controller is 66MHz, and the
requested rate is 100KHz, it gives a divider of 768 instead of
the better 640.
Choose a
Sorry forgot to include Ben.
Ben, any ideas?
On Tue, Jun 14, 2011 at 3:17 PM, Eric Miao eric.m...@linaro.org wrote:
The original algorithm doesn't perform very well in some cases, e.g.
When the source clock of the I2C controller is 66MHz, and the
requested rate is 100KHz, it gives a
The original algorithm doesn't perform very well in some cases, e.g.
When the source clock of the I2C controller is 66MHz, and the
requested rate is 100KHz, it gives a divider of 768 instead of
the better 640.
Choose a better clock divider so the final clock rate is closer to
the requested
