Re: [PATCH 2/4] i2c: at91: update bindings documention

[Rob Herring]

On Wed, Dec 02, 2015 at 11:39:05AM +0100, Ludovic Desroches wrote:
> The i2c-sda-hold-time-ns property is supported from atmel,sama5d4-i2c.
> 
> Signed-off-by: Ludovic Desroches 

Acked-by: Rob Herring 

> ---
>  Documentation/devicetree/bindings/i2c/i2c-at91.txt | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt 
> b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
> index 6e81dc1..67c6f2e 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-at91.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
> @@ -3,7 +3,7 @@ I2C for Atmel platforms
>  Required properties :
>  - compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
>   "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", 
> "atmel,at91sam9g10-i2c",
> - "atmel,at91sam9x5-i2c" or "atmel,sama5d2-i2c"
> + "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c"
>  - reg: physical base address of the controller and length of memory mapped
>   region.
>  - interrupts: interrupt number to the cpu.
> @@ -17,6 +17,7 @@ Optional properties:
>  - dma-names: should contain "tx" and "rx".
>  - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for 
> FIFO
>capable I2C controllers.
> +- i2c-sda-hold-time-ns: TWD hold time, only available from 
> "atmel,sama5d4-i2c".
>  - Child nodes conforming to i2c bus binding
>  
>  Examples :
> @@ -52,6 +53,7 @@ i2c0: i2c@f8034600 {
>   #size-cells = <0>;
>   clocks = <>;
>   atmel,fifo-size = <16>;
> + i2c-sda-hold-time-ns = <336>;
>  
>   wm8731: wm8731@1a {
>   compatible = "wm8731";
> -- 
> 2.5.0
> 
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Re: [PATCH v3] arm64: dts: add all hi6220 i2c nodes

[Xinwei Kong]

On 2015/12/2 15:34, Shawn Guo wrote:
> On Wed, Dec 02, 2015 at 02:29:09PM +0800, Xinwei Kong wrote:
>> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
>> use this I2C IP of Synopsys Designware for HiKey board.
>>
>> Signed-off-by: Xinwei Kong 
>> ---
>>  arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 31 
>> +++
>>  1 file changed, 31 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi 
>> b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> index 82d2488..6eae673 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
>> @@ -208,5 +208,36 @@
>>  clock-names = "uartclk", "apb_pclk";
>>  status = "disabled";
>>  };
>> +
>> +i2c0: i2c@f710 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf710 0x0 0x1000>;
>> +interrupts = <0 44 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
> 
> You got me wrong.  I was asking you to drop property 'clock-names' only,
> not 'clocks' together.  I do not think it works if you drop property
> 'clocks', because I see that dw_i2c_plat_probe() will fail if
> devm_clk_get() fails.  Did you test the patch before posting it out?

I am sorry that my Hikey board don't work well. I will fix my board and test
it.

Thank you very much.
xinwei

> 
> Shawn
> 
>> +};
>> +
>> +i2c1: i2c@f7101000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7101000 0x0 0x1000>;
>> +interrupts = <0 45 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>> +i2c2: i2c@f7102000 {
>> +compatible = "snps,designware-i2c";
>> +reg = <0x0 0xf7102000 0x0 0x1000>;
>> +interrupts = <0 46 4>;
>> +i2c-sda-hold-time-ns = <300>;
>> +pinctrl-names = "default";
>> +pinctrl-0 = <_pmx_func _cfg_func>;
>> +status = "disabled";
>> +};
>> +
>>  };
>>  };
>> -- 
>> 1.9.1
>>
>>
>>
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> 
> .
> 

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Re: [PATCH v2 16/16] i2c: designware: Convert to use unified device property API

[Andy Shevchenko]

On Wed, 2015-12-02 at 02:28 +0100, Rafael J. Wysocki wrote:
> On Tuesday, December 01, 2015 12:33:51 PM Andy Shevchenko wrote:
> > On Mon, 2015-11-30 at 20:58 +0100, Wolfram Sang wrote:
> > > On Mon, Nov 30, 2015 at 05:11:44PM +0200, Andy Shevchenko wrote:



> > > What is the bug fix here described in the cover letter?
> > 
> > The cover letter mentioned 'last part' which I refer to as patches
> > 14,
> > 15 (though this is for UART), and 16.
> 
> Hmm.
> 
> So may I assume that patches [1-13/16] are for me and the rest is to
> be applied
> by the other respective maintainers?
> 
> That should be easiest logistically IMHO.

Have no objections.

-- 
Andy Shevchenko 
Intel Finland Oy

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Re: [PATCH V3] Intel Lewisburg device IDs for SMBus

[Alexandra Yates]

Hi,

On 11/20/2015 07:22 AM, Wolfram Sang wrote:

i2c: i801: "


I'll keep this in mind.  Thank you.

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Re: [PATCH v2 16/16] i2c: designware: Convert to use unified device property API

[Mika Westerberg]

On Wed, Dec 02, 2015 at 11:23:40AM +0200, Andy Shevchenko wrote:
> On Wed, 2015-12-02 at 02:28 +0100, Rafael J. Wysocki wrote:
> > On Tuesday, December 01, 2015 12:33:51 PM Andy Shevchenko wrote:
> > > On Mon, 2015-11-30 at 20:58 +0100, Wolfram Sang wrote:
> > > > On Mon, Nov 30, 2015 at 05:11:44PM +0200, Andy Shevchenko wrote:
> 
> 
> 
> > > > What is the bug fix here described in the cover letter?
> > > 
> > > The cover letter mentioned 'last part' which I refer to as patches
> > > 14,
> > > 15 (though this is for UART), and 16.
> > 
> > Hmm.
> > 
> > So may I assume that patches [1-13/16] are for me and the rest is to
> > be applied
> > by the other respective maintainers?
> > 
> > That should be easiest logistically IMHO.
> 
> Have no objections.

Unfortunately the patches (except this one) depend on each other so they
cannot be applied separately.
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[RESEND PATCH v2 7/9] eeprom: at24: add the at24cs series to the list of supported devices

[Bartosz Golaszewski]

The infrastructure for reading of the factory-programmed serial number
for at24cs EEPROM series is now in place. Add the chips that are actually
equipped with the serial number memory area to the list of supported
devices.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/misc/eeprom/at24.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index d474b6d..6e28b02 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -117,16 +117,25 @@ static const struct i2c_device_id at24_ids[] = {
{ "24c00",  AT24_DEVICE_MAGIC(128 / 8,  AT24_FLAG_TAKE8ADDR) },
/* old variants can't be handled with this generic entry! */
{ "24c01",  AT24_DEVICE_MAGIC(1024 / 8, 0) },
+   { "24cs01", AT24_DEVICE_MAGIC(1024 / 8, AT24_FLAG_SERIAL) },
{ "24c02",  AT24_DEVICE_MAGIC(2048 / 8, 0) },
+   { "24cs02", AT24_DEVICE_MAGIC(2048 / 8, AT24_FLAG_SERIAL) },
/* spd is a 24c02 in memory DIMMs */
{ "spd",AT24_DEVICE_MAGIC(2048 / 8,
AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
{ "24c04",  AT24_DEVICE_MAGIC(4096 / 8, 0) },
+   { "24cs04", AT24_DEVICE_MAGIC(4096 / 8, AT24_FLAG_SERIAL) },
/* 24rf08 quirk is handled at i2c-core */
{ "24c08",  AT24_DEVICE_MAGIC(8192 / 8, 0) },
+   { "24cs08", AT24_DEVICE_MAGIC(8192 / 8, AT24_FLAG_SERIAL) },
{ "24c16",  AT24_DEVICE_MAGIC(16384 / 8,0) },
+   { "24cs16", AT24_DEVICE_MAGIC(16384 / 8,AT24_FLAG_SERIAL) },
{ "24c32",  AT24_DEVICE_MAGIC(32768 / 8,AT24_FLAG_ADDR16) },
+   { "24cs32", AT24_DEVICE_MAGIC(32768 / 8,
+   AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL) },
{ "24c64",  AT24_DEVICE_MAGIC(65536 / 8,AT24_FLAG_ADDR16) },
+   { "24cs64", AT24_DEVICE_MAGIC(65536 / 8,
+   AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL) },
{ "24c128", AT24_DEVICE_MAGIC(131072 / 8,   AT24_FLAG_ADDR16) },
{ "24c256", AT24_DEVICE_MAGIC(262144 / 8,   AT24_FLAG_ADDR16) },
{ "24c512", AT24_DEVICE_MAGIC(524288 / 8,   AT24_FLAG_ADDR16) },
-- 
2.1.4

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[RESEND PATCH v2 6/9] eeprom: at24: improve the device_id table readability

[Bartosz Golaszewski]

Improve the readability of the device table by separating columns with
tabs.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/misc/eeprom/at24.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 65fca1e..d474b6d 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -114,23 +114,23 @@ MODULE_PARM_DESC(write_timeout, "Time (in ms) to try 
writes (default 25)");
 
 static const struct i2c_device_id at24_ids[] = {
/* needs 8 addresses as A0-A2 are ignored */
-   { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
+   { "24c00",  AT24_DEVICE_MAGIC(128 / 8,  AT24_FLAG_TAKE8ADDR) },
/* old variants can't be handled with this generic entry! */
-   { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
-   { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
+   { "24c01",  AT24_DEVICE_MAGIC(1024 / 8, 0) },
+   { "24c02",  AT24_DEVICE_MAGIC(2048 / 8, 0) },
/* spd is a 24c02 in memory DIMMs */
-   { "spd", AT24_DEVICE_MAGIC(2048 / 8,
-   AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
-   { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
+   { "spd",AT24_DEVICE_MAGIC(2048 / 8,
+   AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
+   { "24c04",  AT24_DEVICE_MAGIC(4096 / 8, 0) },
/* 24rf08 quirk is handled at i2c-core */
-   { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
-   { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
-   { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
-   { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
-   { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
-   { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
-   { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
-   { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
+   { "24c08",  AT24_DEVICE_MAGIC(8192 / 8, 0) },
+   { "24c16",  AT24_DEVICE_MAGIC(16384 / 8,0) },
+   { "24c32",  AT24_DEVICE_MAGIC(32768 / 8,AT24_FLAG_ADDR16) },
+   { "24c64",  AT24_DEVICE_MAGIC(65536 / 8,AT24_FLAG_ADDR16) },
+   { "24c128", AT24_DEVICE_MAGIC(131072 / 8,   AT24_FLAG_ADDR16) },
+   { "24c256", AT24_DEVICE_MAGIC(262144 / 8,   AT24_FLAG_ADDR16) },
+   { "24c512", AT24_DEVICE_MAGIC(524288 / 8,   AT24_FLAG_ADDR16) },
+   { "24c1024",AT24_DEVICE_MAGIC(1048576 / 8,  AT24_FLAG_ADDR16) },
{ "at24", 0 },
{ /* END OF LIST */ }
 };
-- 
2.1.4

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[RESEND PATCH v2 5/9] eeprom: at24: export the serial number through sysfs

[Bartosz Golaszewski]

The at24 driver is now capable of reading the serial number from at24cs
EEPROM chips. Export the serial number through sysfs.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/misc/eeprom/at24.c | 44 
 1 file changed, 40 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 6182f47..65fca1e 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -65,6 +65,7 @@ struct at24_data {
 */
struct mutex lock;
struct bin_attribute bin;
+   struct bin_attribute *bin_serial;
 
u8 *writebuf;
unsigned write_max;
@@ -103,6 +104,7 @@ MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes 
(default 25)");
 
 #define AT24_BITMASK(x) (BIT(x) - 1)
 
+#define AT24CS_SERIAL_SIZE 16
 #define AT24CS_SERIAL_ADDR(addr) (addr + 0x08)
 
 /* create non-zero magic value for given eeprom parameters */
@@ -163,10 +165,8 @@ static struct i2c_client *at24_translate_offset(struct 
at24_data *at24,
return at24->client[i];
 }
 
-static int __attribute__((unused)) at24cs_eeprom_serial_read(
-   struct at24_data *at24,
-   char *buf, unsigned offset,
-   size_t count)
+static int at24cs_eeprom_serial_read(struct at24_data *at24, char *buf,
+unsigned offset, size_t count)
 {
unsigned long timeout, read_time;
struct i2c_client *client;
@@ -234,6 +234,16 @@ static int __attribute__((unused)) 
at24cs_eeprom_serial_read(
return -ETIMEDOUT;
 }
 
+static ssize_t at24cs_bin_serial_read(struct file *filp, struct kobject *kobj,
+ struct bin_attribute *attr,
+ char *buf, loff_t off, size_t count)
+{
+   struct at24_data *at24;
+
+   at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
+   return at24cs_eeprom_serial_read(at24, buf, off, count);
+}
+
 static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
unsigned offset, size_t count)
 {
@@ -658,6 +668,30 @@ static int at24_probe(struct i2c_client *client, const 
struct i2c_device_id *id)
at24->bin.read = at24_bin_read;
at24->bin.size = chip.byte_len;
 
+   if (at24->chip.flags & AT24_FLAG_SERIAL) {
+   /*
+* For EEPROMs containing the serial number export an
+* additional file allowing allowing convenvient access
+* to it from user-space.
+*/
+   at24->bin_serial = devm_kzalloc(>dev,
+   sizeof(struct bin_attribute),
+   GFP_KERNEL);
+   if (!at24->bin_serial)
+   return -ENOMEM;
+
+   sysfs_bin_attr_init(at24->bin_serial);
+   at24->bin_serial->attr.name = "serial";
+   at24->bin_serial->attr.mode = S_IRUSR;
+   at24->bin_serial->read = at24cs_bin_serial_read;
+   at24->bin_serial->size = AT24CS_SERIAL_SIZE;
+
+   err = sysfs_create_bin_file(>dev.kobj,
+   at24->bin_serial);
+   if (err)
+   goto err_clients;
+   }
+
at24->macc.read = at24_macc_read;
 
writable = !(chip.flags & AT24_FLAG_READONLY);
@@ -757,6 +791,8 @@ static int at24_remove(struct i2c_client *client)
 
at24 = i2c_get_clientdata(client);
sysfs_remove_bin_file(>dev.kobj, >bin);
+   if (at24->bin_serial)
+   sysfs_remove_bin_file(>dev.kobj, at24->bin_serial);
 
for (i = 1; i < at24->num_addresses; i++)
i2c_unregister_device(at24->client[i]);
-- 
2.1.4

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[RESEND PATCH v2 9/9] eeprom: at24: readability tweaks

[Bartosz Golaszewski]

Move the macro definitions above the struct definitions and add some
tabs for better readability.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/misc/eeprom/at24.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 1288193..3238bf6 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -53,6 +53,14 @@
  * which won't work on pure SMBus systems.
  */
 
+#define AT24_SIZE_BYTELEN  5
+#define AT24_SIZE_FLAGS8
+
+#define AT24_BITMASK(x)(BIT(x) - 1)
+
+#define AT24CS_SERIAL_SIZE 16
+#define AT24CS_SERIAL_ADDR(addr)   (addr + 0x08)
+
 struct at24_data {
struct at24_platform_data chip;
struct memory_accessor macc;
@@ -99,14 +107,6 @@ static unsigned write_timeout = 25;
 module_param(write_timeout, uint, 0);
 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
 
-#define AT24_SIZE_BYTELEN 5
-#define AT24_SIZE_FLAGS 8
-
-#define AT24_BITMASK(x) (BIT(x) - 1)
-
-#define AT24CS_SERIAL_SIZE 16
-#define AT24CS_SERIAL_ADDR(addr) (addr + 0x08)
-
 /* create non-zero magic value for given eeprom parameters */
 #define AT24_DEVICE_MAGIC(_len, _flags)\
((1 << AT24_SIZE_FLAGS | (_flags))  \
-- 
2.1.4

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[PATCH RESEND] i2c: Remove setting for 1 second timeout from adapter drivers

[Jarkko Nikula]

I2C adapter drivers that are using 1 second timeout can leave the timeout
unset and let the i2c-core.c: i2c_register_adapter() to set it instead.

Signed-off-by: Jarkko Nikula 
---
 drivers/i2c/busses/i2c-ibm_iic.c  | 1 -
 drivers/i2c/busses/i2c-iop3xx.c   | 1 -
 drivers/i2c/busses/i2c-mpc.c  | 1 -
 drivers/i2c/busses/i2c-mv64xxx.c  | 5 -
 drivers/i2c/busses/i2c-pca-platform.c | 1 -
 5 files changed, 9 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index ab492301581a..5dc0bb7e5dbc 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -748,7 +748,6 @@ static int iic_probe(struct platform_device *ofdev)
i2c_set_adapdata(adap, dev);
adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
adap->algo = _algo;
-   adap->timeout = HZ;
 
ret = i2c_add_adapter(adap);
if (ret  < 0) {
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 72d6161cf77c..c4ed8281bec2 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -479,7 +479,6 @@ iop3xx_i2c_probe(struct platform_device *pdev)
/*
 * Default values...should these come in from board code?
 */
-   new_adapter->timeout = HZ;
new_adapter->algo = _i2c_algo;
 
init_waitqueue_head(_data->waitq);
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 48ecffecc0ed..b4bb64ffe3cd 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -640,7 +640,6 @@ static const struct i2c_algorithm mpc_algo = {
 static struct i2c_adapter mpc_ops = {
.owner = THIS_MODULE,
.algo = _algo,
-   .timeout = HZ,
 };
 
 static const struct of_device_id mpc_i2c_of_match[];
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 43207f52e5a3..eaef7763f5fc 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -839,11 +839,6 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
reset_control_deassert(drv_data->rstc);
}
 
-   /* Its not yet defined how timeouts will be specified in device tree.
-* So hard code the value to 1 second.
-*/
-   drv_data->adapter.timeout = HZ;
-
device = of_match_device(mv64xxx_i2c_of_match_table, dev);
if (!device)
return -ENODEV;
diff --git a/drivers/i2c/busses/i2c-pca-platform.c 
b/drivers/i2c/busses/i2c-pca-platform.c
index 3bd2e7d06e4b..2b930df0e6b5 100644
--- a/drivers/i2c/busses/i2c-pca-platform.c
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -183,7 +183,6 @@ static int i2c_pca_pf_probe(struct platform_device *pdev)
i2c->algo_data.i2c_clock = platform_data->i2c_clock_speed;
i2c->gpio = platform_data->gpio;
} else {
-   i2c->adap.timeout = HZ;
i2c->algo_data.i2c_clock = 59000;
i2c->gpio = -1;
}
-- 
2.6.2

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Re: [PATCH 4/4] ARM: at91/dt: sama5d2 Xplained: pmic needs a specific sda hold time

[Nicolas Ferre]

Le 02/12/2015 11:39, Ludovic Desroches a écrit :
> Data have to been hold longer for the PMIC device.

s/been/be/

It can also be interesting to know where the value comes from...


> Signed-off-by: Ludovic Desroches 
> ---
>  arch/arm/boot/dts/at91-sama5d2_xplained.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts 
> b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
> index ad6de73..9bced00 100644
> --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
> +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
> @@ -129,6 +129,7 @@
>   dmas = <0>, <0>;
>   pinctrl-names = "default";
>   pinctrl-0 = <_i2c0_default>;
> + i2c-sda-hold-time-ns = <350>;
>   status = "okay";
>  
>   pmic: act8865@5b {
> 


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[Patch V1] imx: i2c: fix i2c resource leak with dma transfer

[Gao Pan]

In i2c_imx_dma_xfer(), when dmaengine_prep_slave_single() returns
NULL, the context goto label err_desc and then return. However,
the memory allocated by dmaengine_prep_slave_single() has not been
freed yet, which leads to resource leak.

(reported by coverity check)

Signed-off-by: Gao Pan 
Signed-off-by: Fugang Duan 
---
 drivers/i2c/busses/i2c-imx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 0ab8424..6dcfff5 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -397,6 +397,7 @@ static int i2c_imx_dma_xfer(struct imx_i2c_struct *i2c_imx,
 
 err_submit:
 err_desc:
+   dmaengine_terminate_all(dma->chan_using);
dma_unmap_single(chan_dev, dma->dma_buf,
dma->dma_len, dma->dma_data_dir);
 err_map:
-- 
1.9.1

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[RESEND PATCH v2 8/9] eeprom: at24: remove a reduntant if

[Bartosz Golaszewski]

It seems as if the second check for I2C_FUNC_I2C functionality had been
introduced accidentally during a merge. Tt's reduntant, so remove it.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/misc/eeprom/at24.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 6e28b02..1288193 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -634,10 +634,7 @@ static int at24_probe(struct i2c_client *client, const 
struct i2c_device_id *id)
} else {
return -EPFNOSUPPORT;
}
-   }
 
-   /* Use I2C operations unless we're stuck with SMBus extensions. */
-   if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
if (i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
-- 
2.1.4

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[RESEND PATCH v2 3/9] eeprom: at24: tie up an additional address for at24cs series

[Bartosz Golaszewski]

The at24cs series EEPROM chips have an additional read-only memory area,
that is visible on a different i2c slave address. Tie it up with a dummy
device.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/misc/eeprom/at24.c | 30 ++
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 5d7c090..08cc327 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -103,6 +103,8 @@ MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes 
(default 25)");
 
 #define AT24_BITMASK(x) (BIT(x) - 1)
 
+#define AT24CS_SERIAL_ADDR(addr) (addr + 0x08)
+
 /* create non-zero magic value for given eeprom parameters */
 #define AT24_DEVICE_MAGIC(_len, _flags)\
((1 << AT24_SIZE_FLAGS | (_flags))  \
@@ -558,6 +560,8 @@ static int at24_probe(struct i2c_client *client, const 
struct i2c_device_id *id)
 
if (chip.flags & AT24_FLAG_TAKE8ADDR)
num_addresses = 8;
+   else if (chip.flags & AT24_FLAG_SERIAL)
+   num_addresses = 2;
else
num_addresses = DIV_ROUND_UP(chip.byte_len,
(chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
@@ -616,12 +620,30 @@ static int at24_probe(struct i2c_client *client, const 
struct i2c_device_id *id)
at24->client[0] = client;
 
/* use dummy devices for multiple-address chips */
-   for (i = 1; i < num_addresses; i++) {
-   at24->client[i] = i2c_new_dummy(client->adapter,
+   if (at24->chip.flags & AT24_FLAG_TAKE8ADDR) {
+   for (i = 1; i < num_addresses; i++) {
+   at24->client[i] = i2c_new_dummy(client->adapter,
+   client->addr + i);
+   if (!at24->client[i]) {
+   dev_err(>dev,
+   "address 0x%02x unavailable\n",
client->addr + i);
-   if (!at24->client[i]) {
+   err = -EADDRINUSE;
+   goto err_clients;
+   }
+   }
+   }
+
+   /*
+* at24cs series tie up an additional address for the memory area
+* contining the serial number
+*/
+   if (at24->chip.flags & AT24_FLAG_SERIAL) {
+   at24->client[1] = i2c_new_dummy(client->adapter,
+   AT24CS_SERIAL_ADDR(client->addr));
+   if (!at24->client[1]) {
dev_err(>dev, "address 0x%02x unavailable\n",
-   client->addr + i);
+   AT24CS_SERIAL_ADDR(client->addr));
err = -EADDRINUSE;
goto err_clients;
}
-- 
2.1.4

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[PATCH 1/4] i2c: at91: add upport for the HOLD field

[Ludovic Desroches]

The hold field allows to configure the data hold time which can be set
with the help of the generic binding 'i2c-sda-hold-time-ns'. This
feature has been introduced with SAMA5D4 SoC family.

Signed-off-by: Ludovic Desroches 
---
 drivers/i2c/busses/i2c-at91.c | 54 ---
 1 file changed, 51 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 10835d1..09e1690 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -64,6 +64,7 @@
 #defineAT91_TWI_IADR   0x000c  /* Internal Address Register */
 
 #defineAT91_TWI_CWGR   0x0010  /* Clock Waveform Generator Reg 
*/
+#defineAT91_TWI_CWGR_HOLD(x)   (((x) & 0x1f) << 24)
 
 #defineAT91_TWI_SR 0x0020  /* Status Register */
 #defineAT91_TWI_TXCOMP BIT(0)  /* Transmission Complete */
@@ -110,6 +111,7 @@ struct at91_twi_pdata {
unsigned clk_offset;
bool has_unre_flag;
bool has_alt_cmd;
+   bool has_hold_field;
struct at_dma_slave dma_slave;
 };
 
@@ -187,10 +189,13 @@ static void at91_init_twi_bus(struct at91_twi_dev *dev)
  */
 static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
 {
-   int ckdiv, cdiv, div;
+   int ckdiv, cdiv, div, hold = 0;
struct at91_twi_pdata *pdata = dev->pdata;
int offset = pdata->clk_offset;
int max_ckdiv = pdata->clk_max_div;
+   u32 twd_hold_time_ns = 0;
+
+#define MAX_HOLD 31
 
div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
   2 * twi_clk) - offset);
@@ -204,8 +209,33 @@ static void at91_calc_twi_clock(struct at91_twi_dev *dev, 
int twi_clk)
cdiv = 255;
}
 
-   dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
-   dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
+   if (pdata->has_hold_field) {
+   of_property_read_u32(dev->dev->of_node, "i2c-sda-hold-time-ns",
+_hold_time_ns);
+
+   /*
+* hold time = HOLD + 3 x T_peripheral_clock
+* Use clk rate in kHz to prevent overflows when computing
+* hold.
+*/
+   hold = DIV_ROUND_UP(twd_hold_time_ns
+   * (clk_get_rate(dev->clk) / 1000), 100);
+   hold -= 3;
+   if (hold < 0)
+   hold = 0;
+   if (hold > MAX_HOLD) {
+   dev_warn(dev->dev,
+"HOLD field set to its maximum value (%d 
instead of %d)\n",
+MAX_HOLD, hold);
+   hold = MAX_HOLD;
+   }
+   }
+
+   dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv
+   | AT91_TWI_CWGR_HOLD(hold);
+
+   dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns)\n",
+   cdiv, ckdiv, hold, twd_hold_time_ns);
 }
 
 static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
@@ -797,6 +827,7 @@ static struct at91_twi_pdata at91rm9200_config = {
.clk_offset = 3,
.has_unre_flag = true,
.has_alt_cmd = false,
+   .has_hold_field = false,
 };
 
 static struct at91_twi_pdata at91sam9261_config = {
@@ -804,6 +835,7 @@ static struct at91_twi_pdata at91sam9261_config = {
.clk_offset = 4,
.has_unre_flag = false,
.has_alt_cmd = false,
+   .has_hold_field = false,
 };
 
 static struct at91_twi_pdata at91sam9260_config = {
@@ -811,6 +843,7 @@ static struct at91_twi_pdata at91sam9260_config = {
.clk_offset = 4,
.has_unre_flag = false,
.has_alt_cmd = false,
+   .has_hold_field = false,
 };
 
 static struct at91_twi_pdata at91sam9g20_config = {
@@ -818,6 +851,7 @@ static struct at91_twi_pdata at91sam9g20_config = {
.clk_offset = 4,
.has_unre_flag = false,
.has_alt_cmd = false,
+   .has_hold_field = false,
 };
 
 static struct at91_twi_pdata at91sam9g10_config = {
@@ -825,6 +859,7 @@ static struct at91_twi_pdata at91sam9g10_config = {
.clk_offset = 4,
.has_unre_flag = false,
.has_alt_cmd = false,
+   .has_hold_field = false,
 };
 
 static const struct platform_device_id at91_twi_devtypes[] = {
@@ -854,6 +889,15 @@ static struct at91_twi_pdata at91sam9x5_config = {
.clk_offset = 4,
.has_unre_flag = false,
.has_alt_cmd = false,
+   .has_hold_field = false,
+};
+
+static struct at91_twi_pdata sama5d4_config = {
+   .clk_max_div = 7,
+   .clk_offset = 4,
+   .has_unre_flag = false,
+   .has_alt_cmd = false,
+   .has_hold_field = true,
 };
 
 static struct at91_twi_pdata sama5d2_config = {
@@ -861,6 +905,7 @@ static struct at91_twi_pdata sama5d2_config = {
.clk_offset = 4,
.has_unre_flag = 

Re: [PATCH 2/4] i2c: at91: update bindings documention

[Nicolas Ferre]

Le 02/12/2015 11:39, Ludovic Desroches a écrit :
> The i2c-sda-hold-time-ns property is supported from atmel,sama5d4-i2c.
> 
> Signed-off-by: Ludovic Desroches 
> ---
>  Documentation/devicetree/bindings/i2c/i2c-at91.txt | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt 
> b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
> index 6e81dc1..67c6f2e 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-at91.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
> @@ -3,7 +3,7 @@ I2C for Atmel platforms
>  Required properties :
>  - compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
>   "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", 
> "atmel,at91sam9g10-i2c",
> - "atmel,at91sam9x5-i2c" or "atmel,sama5d2-i2c"
> + "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c"
>  - reg: physical base address of the controller and length of memory mapped
>   region.
>  - interrupts: interrupt number to the cpu.
> @@ -17,6 +17,7 @@ Optional properties:
>  - dma-names: should contain "tx" and "rx".
>  - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for 
> FIFO
>capable I2C controllers.
> +- i2c-sda-hold-time-ns: TWD hold time, only available from 
> "atmel,sama5d4-i2c".

Yep, but you must make it clearer that sama5d2 also has this property
available: people usually don't know that sama5d2 comes after sama5d4
over time...

Bye,

>  - Child nodes conforming to i2c bus binding
>  
>  Examples :
> @@ -52,6 +53,7 @@ i2c0: i2c@f8034600 {
>   #size-cells = <0>;
>   clocks = <>;
>   atmel,fifo-size = <16>;
> + i2c-sda-hold-time-ns = <336>;
>  
>   wm8731: wm8731@1a {
>   compatible = "wm8731";
> 


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Re: [PATCH] i2c: emev2: add slave support

[Wolfram Sang]

On Mon, Nov 30, 2015 at 01:15:57AM +0100, Niklas Söderlund wrote:
> Add i2c slave support to EMEV2.
> 
> Tested using a EMEV2, BeagleBone Black and a 24c02 eeprom. While the
> EMEV2 provided a emulated eeprom on iic0 using slave-24c02 iic0 the Bone
> could talk to both the physical and the emulated eeprom. The EMEV2 could
> talk to the physical eeprom while still provide the emulated eeprom.

Yay, good testing here.

Which board did you use? KZM9D? Do you have pin descriptions for the
connectors, if so? I am looking for these for quite some time.

Thanks,

   Wolfram



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[RESEND PATCH v2 1/9] eeprom: at24: platform_data: use BIT() macro

[Bartosz Golaszewski]

Use BIT() macro to replace the 0xXX constants in platform_data flags
definitions.

Signed-off-by: Bartosz Golaszewski 
---
 include/linux/platform_data/at24.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/linux/platform_data/at24.h 
b/include/linux/platform_data/at24.h
index c42aa89..8d90f52 100644
--- a/include/linux/platform_data/at24.h
+++ b/include/linux/platform_data/at24.h
@@ -43,10 +43,10 @@ struct at24_platform_data {
u32 byte_len;   /* size (sum of all addr) */
u16 page_size;  /* for writes */
u8  flags;
-#define AT24_FLAG_ADDR16   0x80/* address pointer is 16 bit */
-#define AT24_FLAG_READONLY 0x40/* sysfs-entry will be read-only */
-#define AT24_FLAG_IRUGO0x20/* sysfs-entry will be 
world-readable */
-#define AT24_FLAG_TAKE8ADDR0x10/* take always 8 addresses (24c00) */
+#define AT24_FLAG_ADDR16   BIT(7)  /* address pointer is 16 bit */
+#define AT24_FLAG_READONLY BIT(6)  /* sysfs-entry will be read-only */
+#define AT24_FLAG_IRUGOBIT(5)  /* sysfs-entry will be 
world-readable */
+#define AT24_FLAG_TAKE8ADDRBIT(4)  /* take always 8 addresses (24c00) */
 
void(*setup)(struct memory_accessor *, void *context);
void*context;
-- 
2.1.4

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[RESEND PATCH v2 2/9] eeprom: at24: new flag in platform_data

[Bartosz Golaszewski]

In preparation for supporting the at24cs EEPROM series add a new flag to
platform data. When set, it should tell the driver that the chip has an
additional read-only memory area that holds a factory pre-programmed serial
number.

Signed-off-by: Bartosz Golaszewski 
---
 include/linux/platform_data/at24.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/platform_data/at24.h 
b/include/linux/platform_data/at24.h
index 8d90f52..5686f91 100644
--- a/include/linux/platform_data/at24.h
+++ b/include/linux/platform_data/at24.h
@@ -47,6 +47,7 @@ struct at24_platform_data {
 #define AT24_FLAG_READONLY BIT(6)  /* sysfs-entry will be read-only */
 #define AT24_FLAG_IRUGOBIT(5)  /* sysfs-entry will be 
world-readable */
 #define AT24_FLAG_TAKE8ADDRBIT(4)  /* take always 8 addresses (24c00) */
+#define AT24_FLAG_SERIAL   BIT(3)  /* factory-programmed serial number */
 
void(*setup)(struct memory_accessor *, void *context);
void*context;
-- 
2.1.4

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[PATCH 3/4] ARM: at91/dt: sama5d4: update i2c compatible string

[Ludovic Desroches]

A new compatible string has been introduced: atmel,sama5d4-i2c. It
allows to use the i2c-sda-hold-time-ns property if needed.

Signed-off-by: Ludovic Desroches 
---
 arch/arm/boot/dts/sama5d4.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 2193637..83d7e7c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -916,7 +916,7 @@
};
 
i2c0: i2c@f8014000 {
-   compatible = "atmel,at91sam9x5-i2c";
+   compatible = "atmel,sama5d4-i2c";
reg = <0xf8014000 0x4000>;
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <
@@ -935,7 +935,7 @@
};
 
i2c1: i2c@f8018000 {
-   compatible = "atmel,at91sam9x5-i2c";
+   compatible = "atmel,sama5d4-i2c";
reg = <0xf8018000 0x4000>;
interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <
@@ -975,7 +975,7 @@
};
 
i2c2: i2c@f8024000 {
-   compatible = "atmel,at91sam9x5-i2c";
+   compatible = "atmel,sama5d4-i2c";
reg = <0xf8024000 0x4000>;
interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <
-- 
2.5.0

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[PATCH 2/4] i2c: at91: update bindings documention

[Ludovic Desroches]

The i2c-sda-hold-time-ns property is supported from atmel,sama5d4-i2c.

Signed-off-by: Ludovic Desroches 
---
 Documentation/devicetree/bindings/i2c/i2c-at91.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt 
b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
index 6e81dc1..67c6f2e 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-at91.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
@@ -3,7 +3,7 @@ I2C for Atmel platforms
 Required properties :
 - compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
  "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c",
- "atmel,at91sam9x5-i2c" or "atmel,sama5d2-i2c"
+ "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c"
 - reg: physical base address of the controller and length of memory mapped
  region.
 - interrupts: interrupt number to the cpu.
@@ -17,6 +17,7 @@ Optional properties:
 - dma-names: should contain "tx" and "rx".
 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for 
FIFO
   capable I2C controllers.
+- i2c-sda-hold-time-ns: TWD hold time, only available from "atmel,sama5d4-i2c".
 - Child nodes conforming to i2c bus binding
 
 Examples :
@@ -52,6 +53,7 @@ i2c0: i2c@f8034600 {
#size-cells = <0>;
clocks = <>;
atmel,fifo-size = <16>;
+   i2c-sda-hold-time-ns = <336>;
 
wm8731: wm8731@1a {
compatible = "wm8731";
-- 
2.5.0

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[PATCH 4/4] ARM: at91/dt: sama5d2 Xplained: pmic needs a specific sda hold time

[Ludovic Desroches]

Data have to been hold longer for the PMIC device.

Signed-off-by: Ludovic Desroches 
---
 arch/arm/boot/dts/at91-sama5d2_xplained.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts 
b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index ad6de73..9bced00 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -129,6 +129,7 @@
dmas = <0>, <0>;
pinctrl-names = "default";
pinctrl-0 = <_i2c0_default>;
+   i2c-sda-hold-time-ns = <350>;
status = "okay";
 
pmic: act8865@5b {
-- 
2.5.0

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Re: [PATCH 1/4] i2c: at91: add upport for the HOLD field

[Nicolas Ferre]

Le 02/12/2015 11:39, Ludovic Desroches a écrit :
> The hold field allows to configure the data hold time which can be set
> with the help of the generic binding 'i2c-sda-hold-time-ns'. This
> feature has been introduced with SAMA5D4 SoC family.
> 
> Signed-off-by: Ludovic Desroches 
> ---
>  drivers/i2c/busses/i2c-at91.c | 54 
> ---
>  1 file changed, 51 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
> index 10835d1..09e1690 100644
> --- a/drivers/i2c/busses/i2c-at91.c
> +++ b/drivers/i2c/busses/i2c-at91.c
> @@ -64,6 +64,7 @@
>  #define  AT91_TWI_IADR   0x000c  /* Internal Address Register */
>  
>  #define  AT91_TWI_CWGR   0x0010  /* Clock Waveform Generator Reg 
> */
> +#define  AT91_TWI_CWGR_HOLD(x)   (((x) & 0x1f) << 24)

I would have defined MAX_HOLD here and used it in the mask above...


>  
>  #define  AT91_TWI_SR 0x0020  /* Status Register */
>  #define  AT91_TWI_TXCOMP BIT(0)  /* Transmission Complete */
> @@ -110,6 +111,7 @@ struct at91_twi_pdata {
>   unsigned clk_offset;
>   bool has_unre_flag;
>   bool has_alt_cmd;
> + bool has_hold_field;
>   struct at_dma_slave dma_slave;
>  };
>  
> @@ -187,10 +189,13 @@ static void at91_init_twi_bus(struct at91_twi_dev *dev)
>   */
>  static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
>  {
> - int ckdiv, cdiv, div;
> + int ckdiv, cdiv, div, hold = 0;
>   struct at91_twi_pdata *pdata = dev->pdata;
>   int offset = pdata->clk_offset;
>   int max_ckdiv = pdata->clk_max_div;
> + u32 twd_hold_time_ns = 0;
> +
> +#define MAX_HOLD 31

Instead of here ^^

>  
>   div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
>  2 * twi_clk) - offset);
> @@ -204,8 +209,33 @@ static void at91_calc_twi_clock(struct at91_twi_dev 
> *dev, int twi_clk)
>   cdiv = 255;
>   }
>  
> - dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
> - dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
> + if (pdata->has_hold_field) {
> + of_property_read_u32(dev->dev->of_node, "i2c-sda-hold-time-ns",
> +  _hold_time_ns);
> +
> + /*
> +  * hold time = HOLD + 3 x T_peripheral_clock
> +  * Use clk rate in kHz to prevent overflows when computing
> +  * hold.
> +  */
> + hold = DIV_ROUND_UP(twd_hold_time_ns
> + * (clk_get_rate(dev->clk) / 1000), 100);
> + hold -= 3;
> + if (hold < 0)
> + hold = 0;
> + if (hold > MAX_HOLD) {
> + dev_warn(dev->dev,
> +  "HOLD field set to its maximum value (%d 
> instead of %d)\n",
> +  MAX_HOLD, hold);
> + hold = MAX_HOLD;
> + }
> + }
> +
> + dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv
> + | AT91_TWI_CWGR_HOLD(hold);
> +
> + dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns)\n",
> + cdiv, ckdiv, hold, twd_hold_time_ns);
>  }
>  
>  static void at91_twi_dma_cleanup(struct at91_twi_dev *dev)
> @@ -797,6 +827,7 @@ static struct at91_twi_pdata at91rm9200_config = {
>   .clk_offset = 3,
>   .has_unre_flag = true,
>   .has_alt_cmd = false,
> + .has_hold_field = false,
>  };
>  
>  static struct at91_twi_pdata at91sam9261_config = {
> @@ -804,6 +835,7 @@ static struct at91_twi_pdata at91sam9261_config = {
>   .clk_offset = 4,
>   .has_unre_flag = false,
>   .has_alt_cmd = false,
> + .has_hold_field = false,
>  };
>  
>  static struct at91_twi_pdata at91sam9260_config = {
> @@ -811,6 +843,7 @@ static struct at91_twi_pdata at91sam9260_config = {
>   .clk_offset = 4,
>   .has_unre_flag = false,
>   .has_alt_cmd = false,
> + .has_hold_field = false,
>  };
>  
>  static struct at91_twi_pdata at91sam9g20_config = {
> @@ -818,6 +851,7 @@ static struct at91_twi_pdata at91sam9g20_config = {
>   .clk_offset = 4,
>   .has_unre_flag = false,
>   .has_alt_cmd = false,
> + .has_hold_field = false,
>  };
>  
>  static struct at91_twi_pdata at91sam9g10_config = {
> @@ -825,6 +859,7 @@ static struct at91_twi_pdata at91sam9g10_config = {
>   .clk_offset = 4,
>   .has_unre_flag = false,
>   .has_alt_cmd = false,
> + .has_hold_field = false,
>  };
>  
>  static const struct platform_device_id at91_twi_devtypes[] = {
> @@ -854,6 +889,15 @@ static struct at91_twi_pdata at91sam9x5_config = {
>   .clk_offset = 4,
>   .has_unre_flag = false,
>   .has_alt_cmd = false,
> + .has_hold_field = false,
> +};
> +
> +static struct at91_twi_pdata sama5d4_config = {
> + .clk_max_div = 7,
> + .clk_offset = 4,
> +   

Re: [PATCH 3/4] ARM: at91/dt: sama5d4: update i2c compatible string

[Nicolas Ferre]

Le 02/12/2015 11:39, Ludovic Desroches a écrit :
> A new compatible string has been introduced: atmel,sama5d4-i2c. It
> allows to use the i2c-sda-hold-time-ns property if needed.
> 
> Signed-off-by: Ludovic Desroches 

Acked-by: Nicolas Ferre 

Ok, we'll need to synchronize with Wolfram for the 2 remaining ones of
this series.


> ---
>  arch/arm/boot/dts/sama5d4.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
> index 2193637..83d7e7c 100644
> --- a/arch/arm/boot/dts/sama5d4.dtsi
> +++ b/arch/arm/boot/dts/sama5d4.dtsi
> @@ -916,7 +916,7 @@
>   };
>  
>   i2c0: i2c@f8014000 {
> - compatible = "atmel,at91sam9x5-i2c";
> + compatible = "atmel,sama5d4-i2c";
>   reg = <0xf8014000 0x4000>;
>   interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
>   dmas = <
> @@ -935,7 +935,7 @@
>   };
>  
>   i2c1: i2c@f8018000 {
> - compatible = "atmel,at91sam9x5-i2c";
> + compatible = "atmel,sama5d4-i2c";
>   reg = <0xf8018000 0x4000>;
>   interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
>   dmas = <
> @@ -975,7 +975,7 @@
>   };
>  
>   i2c2: i2c@f8024000 {
> - compatible = "atmel,at91sam9x5-i2c";
> + compatible = "atmel,sama5d4-i2c";
>   reg = <0xf8024000 0x4000>;
>   interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
>   dmas = <
> 


-- 
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Re: [PATCH v4] arm64: dts: add all hi6220 i2c nodes

[Shawn Guo]

On Wed, Dec 02, 2015 at 06:13:21PM +0800, Xinwei Kong wrote:
> This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc
> use this I2C IP of Synopsys Designware for HiKey board.
> 
> Signed-off-by: Xinwei Kong 
> Signed-off-by: Chen Feng 

Reviewed-by: Shawn Guo 
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Re: Handling clocks on external busses

[Mark Brown]

On Wed, Dec 02, 2015 at 12:58:55PM +, Charles Keepax wrote:

> So after a bit more digging it seems this has been mitigated slightly
> as a lot of SPI driver have been updated to execute transfers in
> thread rather than from a worker thread and it seems the clock
> framework lets you re-enter the locked sections if called from the
> same thread.

No, this isn't something the drivers support (it's a framework feature)
and it isn't something that we're guaranteed to do, if the bus is busy
we defer to the thread and it's possible the drivers might do something
multi-threaded themselves.  It might work a lot of the time but it's
never going to be guaranteed to work.


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Re: Handling clocks on external busses

[Charles Keepax]

On Tue, Nov 24, 2015 at 05:37:18PM +, Charles Keepax wrote:
> Hi,
> 
> When a clock driver is controlling a clock that is controlled
> over I2C / SPI, we need to perform a write on that bus to enable
> the clock. However, such busses often have their own clocks that
> must be enabled. Since all clock prepares are controlled under
> one large mutex this easily causes deadlock. The device is
> waiting for the I2C / SPI write to complete and the I2C / SPI
> driver is waiting for the clock prepare lock to be released so it
> can enable its own clock.
> 
> I have had a bit of a search and it seems the only really advice
> kicking about is that all I2C / SPI drivers should leave the
> clock prepared all the time. Is that intended to be the long term
> solution, should I treat not leaving the clock prepared as a bug?
> 
> Thanks,
> Charles

Adding a few more people for visibility.

So after a bit more digging it seems this has been mitigated slightly
as a lot of SPI driver have been updated to execute transfers in
thread rather than from a worker thread and it seems the clock
framework lets you re-enter the locked sections if called from the
same thread.

I am looking at moving some (in mainline) clocking code into an actual
clocking driver (for a SPI/I2C audio CODEC) but I am rather nervous
about this causing problems for customers with random deadlocks.

I guess the naive solution looks like individual locks per clock, but
from what I have been able to google it looks like there are some
challenges with that approach, does anyone have any links to previous
discussions on that? And any suggestions on how I might approach
this?

Thanks,
Charles
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