This patch adds libata support for the Freescale MPC5200 IDE
controller.
Signed-off-by: Sylvain Munaut [EMAIL PROTECTED]
---
Hello Jeff,
This patch has been posted a few weeks ago and didn't receive
major critics so, If it's ok by you I'd like to see it merged for
2.6.20.
In the mean time it
On Mon, 04 Dec 2006 09:15:10 +0100
Sylvain Munaut [EMAIL PROTECTED] wrote:
This patch adds libata support for the Freescale MPC5200 IDE
controller.
nit timings to PIO0 */
urce(op-node, 0, res_mem);
Acked-by: Alan Cox [EMAIL PROTECTED]
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On Mon, 4 Dec 2006 01:34:42 +0100
Uwe Koziolek [EMAIL PROTECTED] wrote:
The SiS966/966L has different PCI-IDs for native mode and AHCI mode.
The SiS966 supports four SATA ports only in native mode.
Added additional PCI-ID 0x0183 for SiS965/965L.
this patch is based on the code from David
On Mon, 04 Dec 2006 01:50:19 +0100
Uwe Koziolek [EMAIL PROTECTED] wrote:
One port is PATA, the other port is SATA, they have the same PCI
resources. It is possible to configure
the controller to use both ports in SATA mode without slave. Then the
PATA part of the controller is not
reachable.
the hald media changed polling does really confuse things.
noone knows why the delays are needed, but they give us access to
the CD.
Signed-off-by: Olaf Hering [EMAIL PROTECTED]
---
drivers/scsi/pata_sl82c105.c |3 +++
1 file changed, 3 insertions(+)
--- a/drivers/scsi/pata_sl82c105.c
Please make this run on pSeries only; on a PowerMac for
example, it's totally normal that the first PCI legacy I/O
BAR in the system gets assigned 0.
What do you mean by legacy I/O BAR?
Any PCI BAR with bits 1:0 == 0b01.
If you mean IDE controller, that would drive IDE core mad like
On Mon, 4 Dec 2006 13:40:26 +0100 (MET)
Olaf Hering [EMAIL PROTECTED] wrote:
the hald media changed polling does really confuse things.
noone knows why the delays are needed, but they give us access to
the CD.
Can you tell me what happens if you completely pull the reset out of the
Hello.
Segher Boessenkool wrote:
Please make this run on pSeries only; on a PowerMac for
example, it's totally normal that the first PCI legacy I/O
BAR in the system gets assigned 0.
What do you mean by legacy I/O BAR?
Any PCI BAR with bits 1:0 == 0b01.
If you mean IDE controller,
On Mon, Dec 04, Segher Boessenkool wrote:
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -1234,6 +1234,14 @@ static void __devinit fixup_resource(str
struct pci_controller *hose = pci_bus_to_host(dev-bus);
unsigned long start, end, mask, offset;
+/*
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -1234,6 +1234,14 @@ static void __devinit fixup_resource(str
struct pci_controller *hose = pci_bus_to_host(dev-bus);
unsigned long start, end, mask, offset;
+ /*
+* tell the core code that this
On Mon, Dec 04, Alan wrote:
On Mon, 4 Dec 2006 13:40:26 +0100 (MET)
Olaf Hering [EMAIL PROTECTED] wrote:
the hald media changed polling does really confuse things.
noone knows why the delays are needed, but they give us access to
the CD.
Can you tell me what happens if you
On Mon, 04 Dec 2006 16:08:46 +0300
Sergei Shtylyov [EMAIL PROTECTED] wrote:
W82C105_IDE: inconsistent baseregs (BIOS) for port 0, skipping
So that needs fixing too, then.
Both PCI core and IDE interpret a zero length resource as unassigned.
That is probably better than clearing the flags in
setup-pci is for SFF8038i devices. It therefore knows that for
assigned
resources they must be I/O. It also assumes that zero is not a
valid I/O
port just like zero is not a valid IRQ. Stick a real IDE resource
at zero
and drivers/ide can't cope.
But 0 _is_ a valid PCI I/O address. Do we
Hello.
Alan wrote:
W82C105_IDE: inconsistent baseregs (BIOS) for port 0, skipping
So that needs fixing too, then.
Both PCI core and IDE interpret a zero length resource as unassigned.
This is not about 0-length resource, this is about 0-address. Look at
ide_hwif_confiure() in
On 12/4/06, Alan [EMAIL PROTECTED] wrote:
The nIEN bit in the device registers control interrupt generation on ATA
devices. However ATA devices don't generate interrupts except on command
completion or during command processing so if you have no I/O outstanding
you won't have any interrupts
On Mon, 4 Dec 2006 14:25:04 +0100
Segher Boessenkool [EMAIL PROTECTED] wrote:
But 0 _is_ a valid PCI I/O address. Do we now have to start
using virtual I/O addresses, analogue to the IRQ situation,
or can these bad assumptions be fixed instead?
Send patches to Bartlomiej now he is back in
On Mon, 04 Dec 2006 16:27:47 +0300
Sergei Shtylyov [EMAIL PROTECTED] wrote:
Both PCI core and IDE interpret a zero length resource as unassigned.
This is not about 0-length resource, this is about 0-address. Look at
ide_hwif_confiure() in drivers/ide/setup-pci.c...
The discussion I was
On Mon, 4 Dec 2006 15:34:09 +0200
Thinus Viljoen [EMAIL PROTECTED] wrote:
How do I go about setting/clearing this nIEN bit from my own module?
Open a handle to /dev/sda and calling some or other IOCTL, perhaps? (
I haven't accessed the HDD on this low level before, so I would
appreciate some
Hello.
Alan wrote:
When Linus remaps IRQ0 on x86, I'll follow that code as a testament. Until
this happens, I consider is just an opinion. Forcing every arch but x86 to
remap IRQ0 is an example of the double standards.
Yawn.. x86 does not expose IRQ 0 outside of arch specific code.
Resend the patch.
The content of memory map io of BAR5 have been change from MCP65 then sata_nv
can't work fine on the platform based on MCP65 and MCP67,so move their IDs from
sata_nv.c to ahci.c.
Please check attachment for new patch,thanks.
Signed-off-by: Peer Chen [EMAIL PROTECTED]
his patch adds VT6421 PATA support to sata_via.
If we don't want to enable PATA support, nothing is changed in sata_via
driver:
M VIA SATA support
[ ] VT6421 PATA support (HIGHLY EXPERIMENTAL)
The patch is based on the patch from VIA, it applies to 2.6.19.
--
Tomasz Chmielewski
On Mon, 04 Dec 2006 15:26:02 +0100
Tomasz Chmielewski [EMAIL PROTECTED] wrote:
his patch adds VT6421 PATA support to sata_via.
NAK
This shouldn't be compile time
It doesn't handle MWDMA properly
It uses the old error/reset code
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Wants testing... so test and report
Signed-off-by: Alan Cox [EMAIL PROTECTED]
--- linux.vanilla-2.6.19-rc6-mm1/drivers/ata/sata_via.c 2006-11-24
13:58:05.0 +
+++ linux-2.6.19-rc6-mm1/drivers/ata/sata_via.c 2006-12-04 14:57:34.719099648
+
@@ -59,11 +59,14 @@
Our company has recently purchased two Acer 5632WSMi laptops and we're
running Gentoo x86 unstable on them. The most hindering problem that's
currently plaguing us is the IDE chipset.
Without the combined_mode=libata on the command line, DMA is disabled
and the hard drive just uses PIO. With
Sylvain Munaut wrote:
This patch adds libata support for the Freescale MPC5200 IDE
controller.
Signed-off-by: Sylvain Munaut [EMAIL PROTECTED]
ACK patch, but does not apply to current #upstream
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the body of a message to
This patch adds initial libata support for the Freescale
MPC5200 integrated IDE controller.
Signed-off-by: Sylvain Munaut [EMAIL PROTECTED]
---
Sorry about the previous patch, I didn't think of using #upstream as a base.
---
drivers/ata/Kconfig|9 +
drivers/ata/Makefile |
One port is PATA, the other port is SATA, they have the same PCI
resources. It is possible to configure
the controller to use both ports in SATA mode without slave. Then the
PATA part of the controller is not
reachable.
Ok so if the pata_sis driver exports
sis_info133
is that sufficient for you to attach the PATA port to the PATA methods
for this chipset ?
Alan
It should be sufficient .
Consider it done
Signed-off-by: Alan Cox [EMAIL PROTECTED]
Please push with the SATA driver changes to use it.
diff -u --new-file --recursive --exclude-from
On 12/1/06, Jeff Garzik [EMAIL PROTECTED] wrote:
I just rebased all branches of libata-dev.git, and there was a bit of
fallout:
1) Dan, I'll have to ask you to resend your sata_vsc MSI patch yet
again, this time against 2.6.19. Since it was against
drivers/scsi/sata_vsc.c, that caused some
The ESB2 appears to emit spurious DMA interrupts when configured for
native mode and handling ATAPI devices. Stratus were able to pin this bug
down and produce a patch. This is a rework which applies the fixup only
to the ESB2 (for now). We can apply it to other chips later if the same
problem is
Alan wrote:
Wants testing... so test and report
Signed-off-by: Alan Cox [EMAIL PROTECTED]
--- linux.vanilla-2.6.19-rc6-mm1/drivers/ata/sata_via.c 2006-11-24
13:58:05.0 +
+++ linux-2.6.19-rc6-mm1/drivers/ata/sata_via.c 2006-12-04 14:57:34.719099648
+
PATA works fine with
Add a driver for the IT8213 which is a single channel ICH-ish PATA
controller. As it is very different to the IT8211/2 it gets its own
driver. There is a legacy drivers/ide driver also available and I'll post
that once I get time to test it all out (probably early January). If
anyone else needs
On Mon, 4 Dec 2006 16:49:31 +
Alan [EMAIL PROTECTED] wrote:
Add a driver for the IT8213 which is a single channel ICH-ish PATA
controller. As it is very different to the IT8211/2 it gets its own
driver. There is a legacy drivers/ide driver also available and I'll post
that once I get time
Was the duplication of timings[] deliberate?
It's actually duplicated in all the PIIX/ICH-alike drivers. I could move
it in them all. Jeff - its copied from your piix driver - shall I move
them all ?
diff -puN
include/linux/pci_ids.h~pata_it8213-add-new-driver-for-the-it8213-card-tidy
Alan wrote:
Was the duplication of timings[] deliberate?
It's actually duplicated in all the PIIX/ICH-alike drivers. I could move
it in them all. Jeff - its copied from your piix driver - shall I move
them all ?
Please do...
Jeff
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Darrick J. Wong wrote:
The Quantum GoVault SATAPI removable disk device returns ATA_ERR in
response to a REPORT LUNS packet. If this happens to an ATAPI device
that is attached to a SAS controller (this is the case with sas_ata),
the device does not load because SCSI won't touch a SCSI device
On Mon, 2006-12-04 at 14:22 +, Alan wrote:
The discussion I was having was about sl82cxx and handling unassigned
resources. The zero address isn't relevant to that.
Well, actually, it's unclear to me wether the resource is unassigned or
has been assigned to 0 :-) And in the later case, why
On Mon, 2006-12-04 at 21:53 +0100, Guennadi Liakhovetski wrote:
On Mon, 4 Dec 2006, Sergei Shtylyov wrote:
When Linus remaps IRQ0 on x86, I'll follow that code as a testament.
Until
this happens, I consider is just an opinion. Forcing every arch but x86
to
remap IRQ0 is an
On Mon, 04 Dec 2006 23:56:42 -0500
Jeff Garzik [EMAIL PROTECTED] wrote:
Andrew Morton wrote:
via-pata-controller-xfer-fixes.patch
via-pata-controller-xfer-fixes-fix.patch
Tejun's 3d3cca37559e3ab2b574eda11ed5207ccdb8980a has been ack'd by the
reporter as fixing things, so these two
Hi all,
I get an oops during initialisation of the pata_pdc2027x module on a
POWER 285 machine. This is on a very recent Linus kernel tree
(ff51a98799931256b555446b2f5675db08de6229) with Paulus' powerpc tree
(that has now been merged). The oops looks like this:
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