Hi All,
I've implemented the Linux PCI support for a new architecture, and
have run into what appears to be a bug in libata, but I don't
understand why it wouldn't have been seen on other architectures.
The processor is a Tile64, which is a 64 core, 64 bit VLIW processor
with non-coherent DMA -
Alan Cox [EMAIL PROTECTED] wrote:
Has anyone else reported a problem like this? It requires
non-coherent DMA, and a lack of a cache invalidate instruction, and
one of the drivers that has this problem (it looks like sata_qstor
does too, I haven't looked at others), so maybe that doesn't
Alan Cox [EMAIL PROTECTED] wrote:
Has anyone else reported a problem like this? It requires
non-coherent DMA, and a lack of a cache invalidate instruction, and
one of the drivers that has this problem (it looks like sata_qstor
does too, I haven't looked at others), so maybe that doesn't
Alan Cox [EMAIL PROTECTED] wrote:
O I'm counting on kmalloc to return a cache aligned buffer. I found
some reason to think it does, but I don't remember offhand what that
Its defined to
reason was, or if it's configurable per-architecture. The buffer has
to be both physically and
