Re: libata/sata_sil24 cache alignment problem?

2008-02-13 Thread Mark Mason
Alan Cox [EMAIL PROTECTED] wrote: Has anyone else reported a problem like this? It requires non-coherent DMA, and a lack of a cache invalidate instruction, and one of the drivers that has this problem (it looks like sata_qstor does too, I haven't looked at others), so maybe that doesn't

Re: libata/sata_sil24 cache alignment problem?

2008-02-13 Thread Mark Mason
Alan Cox [EMAIL PROTECTED] wrote: Has anyone else reported a problem like this? It requires non-coherent DMA, and a lack of a cache invalidate instruction, and one of the drivers that has this problem (it looks like sata_qstor does too, I haven't looked at others), so maybe that doesn't

Re: libata/sata_sil24 cache alignment problem?

2008-02-13 Thread Alan Cox
O I'm counting on kmalloc to return a cache aligned buffer. I found some reason to think it does, but I don't remember offhand what that Its defined to reason was, or if it's configurable per-architecture. The buffer has to be both physically and virtually contiguous, I was tempted to just

Re: libata/sata_sil24 cache alignment problem?

2008-02-13 Thread Mark Mason
Alan Cox [EMAIL PROTECTED] wrote: O I'm counting on kmalloc to return a cache aligned buffer. I found some reason to think it does, but I don't remember offhand what that Its defined to reason was, or if it's configurable per-architecture. The buffer has to be both physically and

Re: libata/sata_sil24 cache alignment problem?

2008-02-13 Thread Alan Cox
I hadn't considered that approach due to the way the ata_port is allocated: libata-core.c: host = scsi_host_alloc(ent-sht, sizeof(struct ata_port)); hosts.c: struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize) { shost =

Re: libata/sata_sil24 cache alignment problem?

2008-02-13 Thread Tejun Heo
Alan Cox wrote: I hadn't considered that approach due to the way the ata_port is allocated: libata-core.c: host = scsi_host_alloc(ent-sht, sizeof(struct ata_port)); hosts.c: struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *sht, int privsize) { shost =

Re: libata/sata_sil24 cache alignment problem?

2008-02-12 Thread Alan Cox
I tell you what ... find me a parisc box that actually has IDE and we might have told you ... The NS87415 variant IDE has been tested on parisc and didn't blow up - must just be lucky. (actually, the pa8800's have IDE CD's on a cmd640 chip, but that oopses on boot for no reason we've tracked

Re: libata/sata_sil24 cache alignment problem?

2008-02-12 Thread James Bottomley
On Wed, 2008-02-13 at 02:13 +, Alan Cox wrote: I tell you what ... find me a parisc box that actually has IDE and we might have told you ... The NS87415 variant IDE has been tested on parisc and didn't blow up - must just be lucky. Actually, it's only a specific class of machines:

Re: libata/sata_sil24 cache alignment problem?

2008-02-12 Thread Alan Cox
Has anyone else reported a problem like this? It requires non-coherent DMA, and a lack of a cache invalidate instruction, and one of the drivers that has this problem (it looks like sata_qstor does too, I haven't looked at others), so maybe that doesn't cover any other architectures. Nobody

Re: libata/sata_sil24 cache alignment problem?

2008-02-12 Thread Thomas Evans
I wonder if this may be what I am seeing with the Si3124 on my Alpha based setup. I'm not sure if Alpha meets all the criteria, but the thing refuses to recognize any drivers when they are connected and I see what are supposed pci parity failures. maybe not ... ...tom Mark Mason wrote: