TVout hardware block is responsible to dispatch the data flow coming
from compositor block to any of the output (HDMI or Analog TV).
It control when output are start/stop and configure according the
require flow path.
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/Makefile| 3 +-
> The TPS65917 chip is a power management IC for Portable Navigation Systems
> and Tablet Computing devices. It contains the following components:
>
> - Regulators.
> - Over Temperature warning and Shut down.
>
> This patch adds support for tps65917 mfd device. At this time only
> the
Compositor control all the input sub-devices and the mixer.
It is the main entry point for composition.
Layer interface is used to control the layer.
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/Kconfig | 1 +
drivers/gpu/drm/sti/Makefile | 2 +
Greg,
On Wednesday 23 April 2014 07:46 PM, Santosh Shilimkar wrote:
> Here is an updated version of the Keystone Navigator drivers after
> addressing comments from earlier version [1].
>
> The QMSS found on Keystone SOCs is one of the main hardware sub
> system which forms the backbone of the
Make mixer driver more verbose
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/sti_mixer.c | 164
drivers/gpu/drm/sti/sti_mixer.h | 2 +
2 files changed, 166 insertions(+)
diff --git a/drivers/gpu/drm/sti/sti_mixer.c
Make VIdeo plug more verbose on what is on going
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/sti_vid.c | 121 ++
drivers/gpu/drm/sti/sti_vid.h | 1 +
2 files changed, 122 insertions(+)
diff --git a/drivers/gpu/drm/sti/sti_vid.c
Add I2C client driver to retrieve EDID.
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/Makefile | 3 ++-
drivers/gpu/drm/sti/sti_ddc.c | 56 +++
2 files changed, 58 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/sti/sti_ddc.c
Make the link between all the hardware drivers and DRM/KMS interface.
Create the driver itself and make it register all the sub-components.
Use GEM CMA helpers for buffer allocation.
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/Kconfig | 8 +
Use debugfs to dump information about TVout
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/sti_tvout.c | 181
1 file changed, 181 insertions(+)
diff --git a/drivers/gpu/drm/sti/sti_tvout.c b/drivers/gpu/drm/sti/sti_tvout.c
index
Clean up a few more things in skein to get it closer to mainline
inclusion. The first may be questionable (so I probably should have
put it last -- oh well, I can always respin), but it seemed like
putting all of the threefish block functions in one file, like the
skein block functions are all
> From: Joerg Roedel [mailto:j...@8bytes.org]
> Sent: Tuesday, May 20, 2014 08:33
>
> On Wed, May 14, 2014 at 11:38:25AM +, Cornwall, Jay wrote:
> > Hi,
> >
> > I'm not sure why you're submitting this, Suravee?
> >
> > We already agreed that we need the extra mmu_notifier point, proposed
> >
On Tue, May 20, 2014 at 02:34:20PM +0200, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> Few minor issues below..
>
> On Tuesday, May 20, 2014 11:04:29 AM Antoine Ténart wrote:
> > The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
> >
> > The mode selection can let us think
On Tuesday 20 May 2014 09:44 AM, Arnd Bergmann wrote:
> On Tuesday 20 May 2014 16:16:08 Ivan Khoronzhuk wrote:
>> Thank for the reply
>>
>> The reset driver uses two ranges:
>> - RSTYPE, RSTCTRL,RSTCFG, RSISO (Reset Main PLL Controller)
>> - RESETMUX8-10 registers
>>
>> The content of these
On Tue, May 20, 2014 at 01:40:40AM +0100, Dave Airlie wrote:
>
> cc'ing dri-devel.
It looks pretty simple and correct . I can test it tomorrow and make sure it
works
right.
>
> > >From d0d57745ba23faf605b0f249b57d283fe1a8ee60 Mon Sep 17 00:00:00 2001
> > From: Tetsuo Handa
> > Date: Mon, 19
On Tue, 2014-05-20 at 09:12 -0400, Richard Guy Briggs wrote:
> The purpose is to track namespaces in use by logged processes from the
> perspective of init_*_ns.
>
> 1/6 defines a function to generate them and assigns them.
>
> Use a serial number per namespace (unique across one boot of one
On Tuesday 20 May 2014 16:16:08 Ivan Khoronzhuk wrote:
> Thank for the reply
>
> The reset driver uses two ranges:
> - RSTYPE, RSTCTRL,RSTCFG, RSISO (Reset Main PLL Controller)
> - RESETMUX8-10 registers
>
> The content of these register ranges are completely used by the reset
> driver.
>
On Tue, May 20, 2014 at 09:19:27AM -0400, Vince Weaver wrote:
> On Tue, 20 May 2014, Peter Zijlstra wrote:
>
> > > +#define PERF_PMU_NO_INTERRUPT1
> >
> > Are you ok with me making that:
> >
> > #define PERF_PMU_CAP_NO_INTERRUPT 0x01
>
> sounds good. All my recent
Patch adds DT entries for clockgen A0/1/10/11/12
Signed-off-by: Pankaj Dev
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih416-clock.dtsi | 475 +++
arch/arm/boot/dts/stih416.dtsi | 10 +-
include/dt-bindings/clock/stih416-clks.h | 15 +
3
Patch adds DT entries for clockgen A0/1/10/11/12
Signed-off-by: Pankaj Dev
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih415-clock.dtsi | 475 +++
arch/arm/boot/dts/stih415.dtsi | 10 +-
include/dt-bindings/clock/stih415-clks.h | 15 +
3
On 20 May 2014 17:35, Viresh Kumar wrote:
> Though after more thought into this I feel this must also be done:
>
> diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
> index bdf09f5..3f540d8 100644
> --- a/drivers/base/power/opp.c
> +++ b/drivers/base/power/opp.c
> @@ -453,9 +453,13
CLK_S_GMAC0_PHY & CLK_S_ETH1_PH clocks are no longer used.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih416-clock.dtsi | 14 --
1 file changed, 14 deletions(-)
diff --git a/arch/arm/boot/dts/stih416-clock.dtsi
b/arch/arm/boot/dts/stih416-clock.dtsi
index
On 20 May 2014 18:02, Nishanth Menon wrote:
>> + if (new_opp->u_volt == opp->u_volt)
>> + ret = -EEXIST;
As I mentioned in the other mail in same thread, I screwed up
again. I meant a s/==/!= here..
In words:
- If we are adding duplicate OPPs (both freq/volt
On 05/20/2014 08:31 AM, Viresh Kumar wrote:
> On 20 May 2014 17:35, Viresh Kumar wrote:
>> Though after more thought into this I feel this must also be done:
>>
>> diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
>> index bdf09f5..3f540d8 100644
>> --- a/drivers/base/power/opp.c
On Tuesday 20 May 2014 15:17:43 Thierry Reding wrote:
> On Tue, May 20, 2014 at 02:41:18PM +0200, Arnd Bergmann wrote:
> > On Tuesday 20 May 2014 14:02:43 Thierry Reding wrote:
> [...]
> > > Couldn't a single-master IOMMU be windowed?
> >
> > Ah, yes. That would actually be like an IBM pSeries,
On Wed, May 14, 2014 at 11:38:25AM +, Cornwall, Jay wrote:
> Hi,
>
> I'm not sure why you're submitting this, Suravee?
>
> We already agreed that we need the extra mmu_notifier point, proposed
> by Joerg back in 2011, to eliminate the race. I had thought we were
> waiting on that to be
On Tuesday 20 May 2014 14:07:09 Dave Martin wrote:
> On Tue, May 20, 2014 at 12:08:44PM +0200, Arnd Bergmann wrote:
> > On Monday 19 May 2014 22:32:33 Thierry Reding wrote:
> > > On Mon, May 19, 2014 at 06:22:31PM +0100, Dave Martin wrote:
> > > > On Mon, May 19, 2014 at 01:53:37PM +0100, Thierry
On 20 May 2014 18:15, Rafael J. Wysocki wrote:
> int ret = new_opp->u_volt == opp->u_volt ? -EEXIST : 0;
>
> would be slightly simpler IMO.
Much better :)
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
Patch adds DT entries for clockgen A9
Signed-off-by: Pankaj Dev
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih415-clock.dtsi | 48 +---
1 file changed, 39 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/stih415-clock.dtsi
CLK_S_ICN_REG_0 clock is no longer used.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih416-clock.dtsi | 11 ---
1 file changed, 11 deletions(-)
diff --git a/arch/arm/boot/dts/stih416-clock.dtsi
b/arch/arm/boot/dts/stih416-clock.dtsi
index c4e5d42..600aeef 100644
---
CLK_S_GMAC0_PHY & CLK_S_ETH1_PH clocks are no longer used.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih415-clock.dtsi | 14 --
1 file changed, 14 deletions(-)
diff --git a/arch/arm/boot/dts/stih415-clock.dtsi
b/arch/arm/boot/dts/stih415-clock.dtsi
index
all-caps node name is not very usual.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih415-clock.dtsi | 2 +-
arch/arm/boot/dts/stih415.dtsi | 8
arch/arm/boot/dts/stih416-clock.dtsi | 5 +++--
arch/arm/boot/dts/stih416.dtsi | 8
4 files changed, 12
Patch adds DT entries for clockgen A9/DDR/GPU
Signed-off-by: Pankaj Dev
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih416-clock.dtsi | 79
1 file changed, 70 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/stih416-clock.dtsi
Implement the clk->determine_rate method for Broadcom Kona peripheral
clocks. This allows a peripheral clock to be re-parented in order to
satisfy a rate change request. This takes the place of the previous
kona_peri_clk_round_rate() functionality, though that function remains
because it is used
Interconnect clocks are not yet managed at the init, then
we have to start the kernel with clk_ignore_unused.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih41x-b2000.dtsi | 2 +-
arch/arm/boot/dts/stih41x-b2020.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff
Changes in v2:
- cosmetic changes (lower case of clock nodes and names)
Changes in v2:
- move stih415-clks.h & stih416-clks.h to include/dt-bindings/clock/
- add clk_ignore_unused to bootargs. Interconnect clocks are not yet
managed at the init, then we have to start the kernel with
CLK_S_ICN_REG_0 clock is no longer used.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih415-clock.dtsi | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/boot/dts/stih415-clock.dtsi
b/arch/arm/boot/dts/stih415-clock.dtsi
index 3016e53..b36a92c 100644
---
Patch adds DT entries for clockgen B/C/D/E/F
Signed-off-by: Pankaj Dev
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih416-clock.dtsi | 189 +++
1 file changed, 189 insertions(+)
diff --git a/arch/arm/boot/dts/stih416-clock.dtsi
On Tue, 2014-05-20 at 10:09 +0900, Greg KH wrote:
> On Mon, May 19, 2014 at 10:57:08PM +0300, Dan Carpenter wrote:
> > On Mon, May 19, 2014 at 09:42:22AM -0500, Romer, Benjamin M wrote:
> > > On Sun, 2014-05-18 at 09:49 -0700, Greg KH wrote:
> > > > Also, why are these entries moving to debugfs at
On Tue, May 20, 2014 at 02:41:18PM +0200, Arnd Bergmann wrote:
> On Tuesday 20 May 2014 14:02:43 Thierry Reding wrote:
[...]
> > Couldn't a single-master IOMMU be windowed?
>
> Ah, yes. That would actually be like an IBM pSeries, which has a windowed
> IOMMU but uses one window per virtual
B2120 HDK is the reference board for STiH407 SoC.
It has the following characteristics:
- 1GB DDR3
- 8GB eMMC / SD-Card slot
- 32MB NOR Flash
- 1 x Gbit Ethernet
- 1 x USB 3.0 port
- 1 x Mini-PCIe
- 1 x SATA
- 1 x HDMI output
- 1 x HDMI input
- 1 x SPDIF
This patch only introduces basic
The compatible strings have to be ordered from specific to generic.
This patch fixes this for STi boards, which did the exact opposite.
Cc: Olof Johansson
Acked-by: Lee Jones
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/stih415-b2000.dts | 2 +-
arch/arm/boot/dts/stih415-b2020.dts | 2
This series adds basic support to the STMicroelectronics STiH407 SoC and its
B2120 reference board. The STiH407 is a dual-core ARM Cortex-A9 CPU aimed at
STB market.
Changes since v6:
-
- No more uppercase and camelcase in DT labels and node names
Changes since v5:
The boards have to be sorted in alphanumerical order in the Makefile.
Cc: Olof Johansson
Acked-by: Lee Jones
Signed-off-by: Maxime Coquelin
---
arch/arm/boot/dts/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/Makefile
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Acked-by: Giuseppe Cavallaro
Acked-by: Lee Jones
Acked-by: Patrice Chotard
Signed-off-by: Giuseppe Cavallaro
Signed-off-by: Maxime Coquelin
---
On 05/19/2014 08:47 PM, Arnd Bergmann wrote:
On Monday 19 May 2014 11:07:24 Santosh Shilimkar wrote:
On Monday 19 May 2014 06:25 AM, Ivan Khoronzhuk wrote:
These patches introduce keystone reset driver.
The keystone SoC can be rebooted in several ways. By external reset
pin, by soft and by
On Tue, May 20, 2014 at 02:05:32PM +0100, David Howells wrote:
> Peter Zijlstra wrote:
>
> > +#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op)
>
> Can ATOMIC_OP() just be an alias for ATOMIC_OP_RETURN() where that is
> appropriate? I suspect several arches (MN10300 included) are going
On Tue, 20 May 2014, Sebastian Ott wrote:
> On Mon, 19 May 2014, Benjamin LaHaise wrote:
> > It is entirely possible the bug isn't
> > caused by the referenced commit, as the commit you're pointing to merely
> > makes io_destroy() syscall wait for all aio outstanding to complete
> > before
On Mon, May 19, 2014 at 10:30:05AM -0700, bseg...@google.com wrote:
> Peter Zijlstra writes:
>
> > On Fri, May 16, 2014 at 12:38:21PM +0400, Roman Gushchin wrote:
> >
> >> I still think, there is a deadlock. I'll try to explain.
> >> Three CPUs must be involved:
> >> CPU0
On Tue, 20 May 2014, Peter Zijlstra wrote:
> > +#define PERF_PMU_NO_INTERRUPT 1
>
> Are you ok with me making that:
>
> #define PERF_PMU_CAP_NO_INTERRUPT 0x01
sounds good. All my recent fuzzing has made me paranoid enough to
double check that yes indeed we don't need
Log the namespace serial numbers of a task in audit_log_task_info() which
is used by syscall audits, among others..
Idea first presented:
https://www.redhat.com/archives/linux-audit/2013-March/msg00020.html
Typical output format would look something like:
type=SYSCALL
Expose ns_entries so subsystems other than proc can use this set of namespace
operations.
Signed-off-by: Richard Guy Briggs
---
fs/proc/namespaces.c|2 +-
include/linux/proc_ns.h |1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/fs/proc/namespaces.c
Expose the namespace instance serial number for each namespace type in the proc
namespace operations structure to make it available for the proc filesystem.
Signed-off-by: Richard Guy Briggs
---
fs/namespace.c |7 +++
include/linux/proc_ns.h |1 +
ipc/namespace.c
Log the creation and deletion of namespace instances in all 6 types of
namespaces.
Two new audit message types have been introduced:
AUDIT_NS_INIT 1329
AUDIT_NS_DEL1330
The output format should look roughly:
type=NS_INIT msg=audit(1400217435.706:94): pid=524 uid=0
Expose the namespace instace serial numbers in the proc filesystem at
/proc//ns/_snum. The link text gives the serial number in hex.
"snum" was chosen instead of "seq" for consistency with inum and there are a
number of other uses of "seq" in the namespace code.
Suggested-by: Serge E. Hallyn
Generate and assign a serial number per namespace instance since boot.
Use a serial number per namespace (unique across one boot of one kernel)
instead of the inode number (which is claimed to have had the right to change
reserved and is not necessarily unique if there is more than one proc fs)
The purpose is to track namespaces in use by logged processes from the
perspective of init_*_ns.
1/6 defines a function to generate them and assigns them.
Use a serial number per namespace (unique across one boot of one kernel)
instead of the inode number (which is claimed to have had the right
From: Johannes Berg
Prior to
commit 4266129964b8238526936d723de65b419d8069c6
Author: Mauro Carvalho Chehab
Date: Tue May 31 16:27:44 2011 -0300
[media] DocBook: Move all media docbook stuff into its own directory
it was possible to build only a single (or more)
book(s) by calling, for
Use acpi_bus_attach_private_data() to attach private data
instead of acpi_attach_data().
Reviewed-by: Mika Westerberg
Signed-off-by: Lan Tianyu
---
drivers/acpi/thermal.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/acpi/thermal.c
On 05/20/2014 02:17 PM, Lee Jones wrote:
The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Acked-by: Giuseppe Cavallaro
Acked-by: Lee Jones
Acked-by: Patrice Chotard
Signed-off-by: Giuseppe Cavallaro
Signed-off-by: Maxime
On Tue, May 20, 2014 at 12:08:44PM +0200, Arnd Bergmann wrote:
> On Monday 19 May 2014 22:32:33 Thierry Reding wrote:
> > On Mon, May 19, 2014 at 06:22:31PM +0100, Dave Martin wrote:
> > > On Mon, May 19, 2014 at 01:53:37PM +0100, Thierry Reding wrote:
> > [...]
> > > > My understanding here is
On Wed 14-05-14 16:46:32, Rogier Wolff wrote:
[...]
> Kernel: from Ubuntu 14.04, 3.13.0-19-generic
The kernel is 64b right?
> 32-bit userspace
> 16Gb RAM installed.
> Disks: 3x 3T in RAID5
>
> ganglia shows the server memory graph as follows:
> http://prive.bitwizard.nl/server_mem.png
This
Peter Zijlstra wrote:
> +#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op)
Can ATOMIC_OP() just be an alias for ATOMIC_OP_RETURN() where that is
appropriate? I suspect several arches (MN10300 included) are going to return
the value *anyway*.
David
--
To unsubscribe from this list:
On 05/20/2014 07:04 AM, Peter Zijlstra wrote:
> On Mon, May 19, 2014 at 10:05:31PM -0400, Sasha Levin wrote:
>> ping? It seems to be easy enough to reproduce on -next, I'd be happy to try
>> debug patches/fixes.
>
> Does this fuzzing you do also include hotplug? If so, does disabling
> that make
ACPI 5.0 spec(5.5.2.4.5) defines GenericSerialBus(i2c, spi, uart) operation
region. It allows ACPI aml code able to access such kind of devices to
implement some ACPI standard method.
On the Asus T100TA, Bios use GenericSerialBus operation region to access
i2c device to get battery info. So
On Tue, May 20, 2014 at 11:37:16AM +0200, Jiri Kosina wrote:
> On Fri, 16 May 2014, Josh Poimboeuf wrote:
>
> > > Consider this scenario:
> > >
> > > void foo()
> > > {
> > > for (i=0; i<1; i++) {
> > > bar(i);
> > > something_else(i);
> > >
Clean up ACPI related code in the i2c core and add CONFIG_I2C_ACPI
to enable I2C ACPI code.
Current there is a race between removing I2C ACPI operation region
and ACPI AML code accessing. So make i2c core built-in if CONFIG_I2C_ACPI
is set.
Reviewed-by: Mika Westerberg
Signed-off-by: Lan Tianyu
The acpi_buffer_to_resource is needed in i2c module
to convert aml buffer to struct acpi_resource
Reviewed-by: Mika Westerberg
Signed-off-by: Lan Tianyu
---
drivers/acpi/acpica/rscreate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/acpi/acpica/rscreate.c
ACPI 5.0 spec(5.5.2.4.5) defines GenericSerialBus(i2c, spi, uart) operation
region.
It allows ACPI aml code able to access such kind of devices to implement
some ACPI standard method.
ACPI Spec defines some access attribute to associate with i2c protocol.
AttribQuick
There is already acpi_bus_get_private_data() to get ACPI handle data
which is associated with acpi_bus_private_data_handler(). This patch
is to add acpi_bus_attach_private_data() to make a pair and facilitate
to attach and get data to/from ACPI handle.
Reviewed-by: Mika Westerberg
Signed-off-by:
Add a flag that tracks whether a clock has already been initialized.
This will be used by the next patch to avoid initializing a clock
more than once when it's listed as a prerequisite.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona.c | 17 +++--
drivers/clk/bcm/clk-kona.h |
Add bus clock support. A bus clock has a subset of the components
present in a peripheral clock (again, all optional): a gate; CCU
policy management bits; and if needed, bits to control hysteresis.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona-setup.c | 96
Currently only peripheral clocks are supported for Broadcom platforms
that use Kona style CCUs for clocking. This series adds support for
bus clocks as well.
One motivation for doing this is that there exist peripheral clocks
that cannot be configured without having first enabled a related
bus
Allow a clock to specify a "prerequisite" clock. The prerequisite
clock must be initialized before the clock that depends on it. A
prerequisite clock is defined initially by its name; as that clock
gets initialized the name gets replaced with a pointer to its clock
structure pointer. In order
On Tue, 2014-05-20 at 09:40 -0300, Emilio López wrote:
> El 24/04/14 11:22, Maxime Ripard escribió:
> > The Allwinner A31 has a 16 channels DMA controller that it shares with the
> > newer A23. Although sharing some similarities with the DMA controller of the
> > older Allwinner SoCs, it's
Define the bus clock "bsc3_apb". This bus clock has to be managed
using the CCU policy mechanism, so add the definitions required for
that to the clock and its CCU.
This one bus clock in particular is defined because it is needed
by peripheral clock "bsc3". Our boot loader does not properly
Am 20.05.2014 13:41, schrieb Dan Carpenter:
> Those concerns are valid but the code was like that in the original so
> we should merge this patch as is and hope some volunteer will fix things
> up in a follow on patch.
>
> Fixing them in this patch would be a mistake anyway because of the one
>
Update the addresses and names to match current silicon.
The WM8997 regmap tables have been adjusted to match the new
names.
Missing registers have been added to WM5110 default value table.
Signed-off-by: Richard Fitzgerald
---
drivers/mfd/wm5102-tables.c |2 ++
Use list_for_each_entry_safe() instead of list_entry()
to simplify code.
Signed-off-by: Yijing Wang
---
drivers/iommu/intel-iommu.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index f256ffc..e020dcf
On Tuesday 20 May 2014 14:02:43 Thierry Reding wrote:
> On Tue, May 20, 2014 at 01:15:48PM +0200, Arnd Bergmann wrote:
> > On Tuesday 20 May 2014 13:05:37 Thierry Reding wrote:
> > > On Tue, May 20, 2014 at 12:04:54PM +0200, Arnd Bergmann wrote:
> > > > On Monday 19 May 2014 22:59:46 Thierry
Hi Maxime,
El 24/04/14 11:22, Maxime Ripard escribió:
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to
Move up the no_iommu and dmar_disabled check, avoid the
useless initialization for dmar.
Signed-off-by: Yijing Wang
---
drivers/iommu/intel-iommu.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index
Use inline function dma_pte_superpage() instead of macro for
better readability.
Signed-off-by: Yijing Wang
---
drivers/iommu/intel-iommu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d1d6636..455896c
__dmar_enable_qi() will initialize free_head,free_tail and
free_cnt for q_inval. Remove the redundant initialization
in dmar_enable_qi().
Signed-off-by: Yijing Wang
---
drivers/iommu/dmar.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/dmar.c
Alloc_domain() will initialize domain->nid to -1. So the
initialization for domain->nid in md_domain_init() is redundant,
clear it.
Signed-off-by: Yijing Wang
---
drivers/iommu/intel-iommu.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c
Decrease the device reference count avoid memory leak.
Signed-off-by: Yijing Wang
---
drivers/iommu/intel-iommu.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 455896c..a78a824 100644
---
Some cleanup patches for iommu/vt-d.
Yijing Wang (6):
iommu/vt-d: Use list_for_each_safe() to simplify code
iommu/vt-d: move up no_iommu and dmar_disabled check
iommu/vt-d: clear the redundant assignment in dmar_enable_qi
iommu/vt-d: clear the redundant assignment for domain->nid
Add the missing closing angle bracket to Vince Bridgers' email address
in MAINTAINERS.
Cc: Vince Bridgers
Signed-off-by: Tobias Klauser
---
MAINTAINERS |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b3ee6e..fe421e7 100644
---
Hi,
Few minor issues below..
On Tuesday, May 20, 2014 11:04:29 AM Antoine Ténart wrote:
> The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
>
> The mode selection can let us think this PHY can be configured to fit
> other purposes. But there are reasons to think the SATA
On Tue, May 20, 2014 at 7:05 AM, Viresh Kumar wrote:
> On 20 May 2014 16:56, Viresh Kumar wrote:
>> But we aren't talking about failure here. Its not failure. The operation
>> we are trying to do is already done and nothing should break if the
>> OPP was already there or its added now. Its all
On Tuesday, May 20, 2014 09:27:58 AM Kukjin Kim wrote:
> Rafael J. Wysocki wrote:
> >
> > On Monday, May 19, 2014 12:51:24 PM Stephen Rothwell wrote:
> > >
> > > --Sig_/n+GoYBpTr9ERl.sTIEYr/Og
> > > Content-Type: text/plain; charset=US-ASCII
> > > Content-Transfer-Encoding: quoted-printable
> > >
On Tuesday, May 20, 2014 05:35:04 PM Viresh Kumar wrote:
> On 20 May 2014 16:56, Viresh Kumar wrote:
> > But we aren't talking about failure here. Its not failure. The operation
> > we are trying to do is already done and nothing should break if the
> > OPP was already there or its added now. Its
Hi Grant,
On May 20, 2014, at 8:50 AM, Grant Likely wrote:
> On Fri, 16 May 2014 13:52:42 +0200, Geert Uytterhoeven
> wrote:
>> Hi Grant,
>>
>> On Fri, May 16, 2014 at 12:58 PM, Grant Likely
>> wrote:
>>> On Thu, 15 May 2014 09:20:24 +0200, Geert Uytterhoeven
>>> wrote:
On Thu, May
On Monday, May 19, 2014 08:43:02 PM Dmitry Torokhov wrote:
> Hi Dudley,
>
> On Wed, Apr 16, 2014 at 08:39:34AM +, Dudley Du wrote:
> > Rely on EV_SW and SW_LID bits to identify a LID device, and hook
> > up our filter to listen for SW_LID events to enable/disable touchpad when
> > LID is
Hello.
On 20-05-2014 1:56, Rickard Strandqvist wrote:
Hi Sergei
I did not put the assignment in the if statement.
You didn't but you changed the line it's on (which wasn't required BTW).
Is it meant for me
to change all the code around the parts I fix?
No, the patch just needs
On Tue, 20 May 2014, Maxime COQUELIN wrote:
> B2120 HDK is the reference board for STiH407 SoC.
> It has the following characteristics:
> - 1GB DDR3
> - 8GB eMMC / SD-Card slot
> - 32MB NOR Flash
> - 1 x Gbit Ethernet
> - 1 x USB 3.0 port
> - 1 x Mini-PCIe
> - 1 x SATA
> - 1 x HDMI output
On Tue, 20 May 2014, Maxime COQUELIN wrote:
> The boards have to be sorted in alphanumerical order in the Makefile.
>
> Cc: Olof Johansson
> Signed-off-by: Maxime Coquelin
> ---
> arch/arm/boot/dts/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Lee Jones
--
Lee
On Tuesday, May 20, 2014 03:39:41 PM Lv Zheng wrote:
> ACPICA doesn't include protections around address space checking, Linux
> build tests always complain increased sparse warnings around ACPICA
> internal acpi_os_map/unmap_memory() invocations. This patch tries to fix
> this issue permanently.
On Tue, 20 May 2014, Maxime COQUELIN wrote:
> The compatible strings have to be ordered from specific to generic.
> This patch fixes this for STi boards, which did the exact opposite.
>
> Cc: Olof Johansson
> Signed-off-by: Maxime Coquelin
> ---
> arch/arm/boot/dts/stih415-b2000.dts | 2 +-
>
> The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
> and 1.5-GHz ARM Cortex-A9 SMP CPU.
>
> Acked-by: Giuseppe Cavallaro
> Acked-by: Lee Jones
> Acked-by: Patrice Chotard
> Signed-off-by: Giuseppe Cavallaro
> Signed-off-by: Maxime Coquelin
> ---
>
> The TPS658640 has a different set of output voltage for most LDO and
> the RTC LDO isn't settable. This chip also report 2 different version
> ID, as the datasheet doesn't list the possible values the second ID
> has simply been named TPS658640v2.
>
> Signed-off-by: Alban Bedel
> ---
> v2:
501 - 600 of 1666 matches
Mail list logo
