On Tue, Jul 22, 2014 at 4:41 PM, Lee Jones wrote:
> This is part of an effort to clean-up the MFD subsystem.
>
> max77686->rtc_regmap = devm_regmap_init_i2c(max77686->rtc,
Which kernel are you on? Because 3.16.rc6 does not match with these
lines. Its something like this:
'max776
On Tue, Jul 22, 2014 at 03:30:16PM +0400, Kirill Tkhai wrote:
>
> This is new on_rq state for the cases when task is migrating
> from one src_rq to another dst_rq, and locks of the both RQs
> are unlocked.
>
> We will use the state this way:
>
> raw_spin_lock(&src_rq->lock);
> dequeu
On Mon, Jul 21, 2014 at 08:41:24PM +0800, Herbert Xu wrote:
> On Mon, Jul 21, 2014 at 08:11:16AM -0400, Jason Cooper wrote:
> >
> > > @@ -136,15 +137,6 @@ static int probe_common(struct virtio_device *vdev)
> > > return err;
> > > }
> > >
> > > - err = hwrng_register(&vi->hwrng);
> >
On Tuesday 22 July 2014 12:11:09 Lee Jones wrote:
> --- a/drivers/mfd/tps80031.c
> +++ b/drivers/mfd/tps80031.c
> @@ -334,6 +334,7 @@ static bool rd_wr_reg_id1(struct device *dev, unsigned
> int reg)
> case TPS80031_PREQ1_RES_ASS_A ... TPS80031_PREQ3_RES_ASS_C:
> case TPS80031_SMPS
Hi Namhyung,
On 07/21/2014 08:31 AM, Namhyung Kim wrote:
Hi Hemant,
On Thu, 17 Jul 2014 11:25:12 +0530, Hemant Kumar wrote:
This patch enables perf to list the SDT markers present in a system. It looks
in dsos given by ldconfig --print-cache and for other binaries, it looks into
the PATH envir
On 07/22/2014 01:25 PM, Jiri Olsa wrote:
> I've got it running... make LIBBABELTRACE_DIR=/opt/libbabeltrace/ ugh ;-)
>
> [jolsa@krava perf]$ LD_LIBRARY_PATH=/opt/libbabeltrace/lib
> /opt/libbabeltrace/bin/babeltrace ./ctf-data/
>
> [04:41:11.445378840] (+?.?) sched:sched_switch: { }, {
Keep on_rq = ONRQ_MIGRATING, while task is migrating, instead.
Signed-off-by: Kirill Tkhai
---
kernel/sched/fair.c | 84 +--
1 file changed, 54 insertions(+), 30 deletions(-)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index cf2d2eb.
Use task_queued() everywhere instead of raw .on_rq check.
No functional changes.
The only exception is we do not use wrapper in check_for_tasks()
of file kernel/cpu.c, because it requires export of task_queued()
in global header files. Next patch in series would return it back,
so it doesn't matt
Bad situation:
double_lock_balance() drops busiest_rq lock. The busiest_rq is *busiest*,
and a lot of tasks and context switches there. We are dropping the lock
and waiting for it again.
Let's just detach the task and once finally unlock it!
Warning: this admits unlocked using of can_migrate_ta
This series aims to get rid of some places where locks of two RQs are held
at the same time.
Patch [1/5] is a preparation/cleanup. It replaces old (.on_rq == 1) with new
(.on_rq == ONRQ_QUEUED) everywhere. No functional changes.
Patch [2/5] is main in the series. It introduces new state: ONRQ_MI
This is new on_rq state for the cases when task is migrating
from one src_rq to another dst_rq, and locks of the both RQs
are unlocked.
We will use the state this way:
raw_spin_lock(&src_rq->lock);
dequeue_task(src_rq, p, 0);
p->on_rq = ONRQ_MIGRATING;
set_task_cp
Let's use ONRQ_MIGRATING instead.
Signed-off-by: Kirill Tkhai
---
kernel/sched/core.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 78388b0..4d62deb 100644
--- a/kernel/sched/core.c
+++ b/kernel/sche
On 07/22/2014 06:32 PM, Arnd Bergmann wrote:
> On Sunday 20 July 2014 17:45:40 Chen Gang wrote:
>>>
>>> Next, I shall:
>>>
>>> - Remove HAS_IOMEM and NO_IOMEM from kernel, firstly.
>>>
>>> - Try to make dummy IOMEM functions for score architecture.
>>>
>>> - Continue discussing with UML for it
On Tue, Jul 22, 2014 at 08:58:17AM +0200, Sebastian Andrzej Siewior wrote:
> On 07/21/2014 08:35 PM, Jiri Olsa wrote:
> > On Mon, Jul 21, 2014 at 07:11:51PM +0200, Sebastian Andrzej Siewior wrote:
> >
> > heya,
> > I've got following build error:
> >
> > CC util/data-bt.o
> > util/data-bt
On 07/22/2014 04:01 AM, Klemen Jan Enova wrote:
> At the start of the intcall function, the %al register is compared to
> 0x3f. If it does not equal 0x3f it is equated to it. Instruction flow
> continues in both cases from the label 1. The comparison is therefore
> unneeded.
>
> Testing data is ap
On 07/22/2014 05:04 AM, Petr Mládek wrote:
> On Mon 2014-07-21 08:02:34, Alex Elder wrote:
>> Each log record has a "flags" field. The flags keep track of, for
>> instance, whether the record was saved in its entirety (as opposed
>> to being one of multiple records that should be merged as a singl
I'm going through the subsystem rectifying all of the warnings/errors
checkpatch finds. Please review as appropriate.
Lee Jones (19):
mfd: max77686: Fix 'line over 80 chars' warning
mfd: max8925-i2c: Fix 'blank line after declarations' warning
mfd: tps80031: Fix 'missing break or fall-throu
This is part of an effort to clean-up the MFD subsystem.
+WARNING: line over 80 characters
+ &max77686_rtc_regmap_config);
total: 0 errors, 1 warnings, 299 lines checked
Signed-off-by: Lee Jones
---
drivers/mfd/max77686.c | 2 +-
1 file changed, 1 insertion
This is part of an effort to clean-up the MFD subsystem.
WARNING: Missing a blank line after declarations
+ int ret;
+ ret = i2c_add_driver(&max8925_driver);
total: 0 errors, 1 warnings, 275 lines checked
Signed-off-by: Lee Jones
---
drivers/mfd/max8925-i2c.c | 2 ++
1 file changed
This is part of an effort to clean-up the MFD subsystem.
WARNING: line over 80 characters
+ wm8350->irq_base = irq_alloc_descs(irq_base, 0,
ARRAY_SIZE(wm8350_irqs), 0);
total: 0 errors, 1 warnings, 552 lines checked
Signed-off-by: Lee Jones
---
drivers/mfd/wm8350-irq.c | 3 ++-
1 file c
This is part of an effort to clean-up the MFD subsystem.
WARNING: Possible switch case/default not preceeded by break or fallthrough
comment
+ case TPS80031_BACKUP_REG:
total: 0 errors, 1 warnings, 573 lines checked
Signed-off-by: Lee Jones
---
drivers/mfd/tps80031.c | 1 +
1 file chang
On Tue, Jul 22, 2014 at 12:52:43PM +0300, Oded Gabbay wrote:
> On 22/07/14 12:21, Daniel Vetter wrote:
> >On Tue, Jul 22, 2014 at 10:19 AM, Oded Gabbay wrote:
> >>>Exactly, just prevent userspace from submitting more. And if you have
> >>>misbehaving userspace that submits too much, reset the gpu
This is part of an effort to clean-up the MFD subsystem.
WARNING: please, no spaces at the start of a line
+ { "wm8350", 0 },$
WARNING: please, no spaces at the start of a line
+ { "wm8351", 0 },$
WARNING: please, no spaces at the start of a line
+ { "wm8352", 0 },$
WARNING: p
This is part of an effort to clean-up the MFD subsystem.
WARNING: Prefer pr_warn(... to pr_warning(...
+ pr_warning("twl4030: I2C error %d reading PIH ISR\n", ret);
WARNING: sizeof buf should be sizeof(buf)
+ memset(buf, 0xff, sizeof buf);
WARNING: sizeof *agent should be siz
This is part of an effort to clean-up the MFD subsystem.
WARNING: Missing a blank line after declarations
+ u32 flags;
+ void (*callback)(void *, u16[]);
WARNING: sizeof t should be sizeof(t)
+ memset(&t, 0, sizeof t);
WARNING: void function return statements are not generally
This is part of an effort to clean-up the MFD subsystem.
ERROR: space required after that ',' (ctx:VxV)
+#define MSP_GPIO(bit,reg) ((DM355EVM_MSP_ ## reg) << 3 | (bit))
^
total: 1 errors, 0 warnings, 437 lines checked
Signed-off-by: Lee Jones
---
drivers/mfd/dm355evm_
This is part of an effort to clean-up the MFD subsystem.
WARNING: Missing a blank line after declarations
+ const struct of_device_id *match;
+ match = of_match_node(sec_dt_match, i2c->dev.of_node);
total: 0 errors, 1 warnings, 494 lines checked
Signed-off-by: Lee Jon
This is part of an effort to clean-up the MFD subsystem.
ERROR: space required after that ',' (ctx:VxO)
+ 0, &twl6040_irq_chip,&twl6040->irq_data);
^
ERROR: space required before that '&' (ctx:OxV)
+
This is part of an effort to clean-up the MFD subsystem.
WARNING: line over 80 characters
+struct si476x_rsq_status_args *rsqargs,
WARNING: line over 80 characters
+struct si476x_rsq_status_report *report)
WARNING: Unnecessary space before function
This is part of an effort to clean-up the MFD subsystem.
WARNING: braces {} are not necessary for single statement blocks
+ if (!iomem) {
+ return -EINVAL;
+ }
WARNING: sizeof *tc6387xb should be sizeof(*tc6387xb)
+ tc6387xb = kzalloc(sizeof *tc6387xb, GFP_KERNEL);
WARNING: line over 80 characters
+module_param_string(force_device_id, force_device_id, sizeof(force_device_id),
0);
WARNING: msleep < 20ms can sleep for up to 20ms; see
Documentation/timers/timers-howto.txt
+ msleep(1);
WARNING: __initdata should be placed after kempld_dmi_table[
This is part of an effort to clean-up the MFD subsystem.
WARNING: Missing a blank line after declarations
+ struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
+ max8925_irqs[data->irq - chip->irq_base].enable
WARNING: Missing a blank line after declarations
+ struct m
This is part of an effort to clean-up the MFD subsystem.
WARNING: please, no space before tabs
+^IRSV_INTR_OFFSET, ^I/* Bit 12^IReserved^I^I*/$
WARNING: Missing a blank line after declarations
+ u8 unmask_value;
+ ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
WARNING: Missing
This is part of an effort to clean-up the MFD subsystem.
ERROR: space required before the open parenthesis '('
+ if(!micro->msg)
WARNING: unnecessary whitespace before a quoted newline
+ dev_dbg(micro->dev, "key message ignored, no handle
\n");
WARNIN
This is part of an effort to clean-up the MFD subsystem.
WARNING: Missing a blank line after declarations
+ unsigned long flags;
+ spin_lock_irqsave(&mcp->lock, flags);
total: 0 errors, 1 warnings, 238 lines checked
Signed-off-by: Lee Jones
---
drivers/mfd/mcp-core.c | 1 +
1 file
This is part of an effort to clean-up the MFD subsystem.
WARNING: Missing a blank line after declarations
+ struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data);
+ irqd->enabled[data->hwirq] = 1;
WARNING: Missing a blank line after declarations
+ struct lp8788_irq_dat
This is part of an effort to clean-up the MFD subsystem.
WARNING: line over 80 characters
+ { 0x0068, 0x01FF },/* R104 - Always On Triggers Sequence
Select 3 */
WARNING: line over 80 characters
+ { 0x0069, 0x01FF },/* R105 - Always On Triggers Sequence
Select 4 *
Looks like the default location for TI firmware is inside the ti-connectivity
directory, to be coherent with other firmware request used by TI drivers, load
the TIInit firmware from this directory instead of /lib/firmware directly.
Signed-off-by: Enric Balletbo i Serra
---
drivers/misc/ti-st/st_
On Tue, Jul 22, 2014 at 12:52:40AM -0400, Pranith Kumar wrote:
> Doh! I figured it out *after* I sent out the mail. Sorry for the noise!
I know that feeling! ;-)
Thanx, Paul
> On Tue, Jul 22, 2014 at 12:35 AM, Pranith Kumar wrote:
> > Hi
On Tue, Jul 22, 2014 at 12:35:57AM -0400, Pranith Kumar wrote:
> Hi Paul,
>
> I was going through this code and found a few inconsistencies. I git blamed it
> and found that it was this recent commit and thought I could ask a few
> questions. I am dropping the CC's as I am not sure since it is pre
From: Kamil Debski
The Exynos4412 USB 2.0 PHY hardware differs from the description provided
in the documentation. Some register bits have different function. This
patch fixes the defines of register bits and changes the way how phys are
powered on and off.
Signed-off-by: Kamil Debski
Tested-by
From: Jiancheng Xue
Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue
Signed-off-by: Zhangfei Gao
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/Kconfig|8 ++
drivers/phy/Makefile |1 +
drivers/phy/phy-hix5hd2-sata.c | 19
From: Lee Jones
This provides the shared header file which will be reference from both
the MiPHY365x driver and its associated Device Tree node(s).
Cc: Kishon Vijay Abraham I
Acked-by: Mark Rutland
Acked-by: Alexandre Torgue
Signed-off-by: Lee Jones
Signed-off-by: Kishon Vijay Abraham I
---
From: Sachin Kamat
PTR_ERR_OR_ZERO simplifies the code.
Signed-off-by: Sachin Kamat
Cc: Jingoo Han
Acked-by: Hans de Goede
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-exynos-dp-video.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/phy-
8-bit delay value (0xF1) is required for GEN2 devices to be enumerated
consistently. Added an API to be called from PHY drivers to set this delay
value and called it from PIPE3 driver to set the delay value.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Roger Quadros
---
Documentation/devi
PCIe PHY uses an external pll instead of the internal pll used by SATA
and USB3. So added support in pipe3 PHY to use external pll.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Roger Quadros
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 11 ++-
drivers/phy/phy-ti-pipe3.c
From: Sachin Kamat
PTR_ERR_OR_ZERO simplifies the code.
Signed-off-by: Sachin Kamat
Cc: Maxime Ripard
Acked-by: Hans de Goede
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-sun4i-usb.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/phy-sun
From: Jiancheng Xue
Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
Signed-off-by: Jiancheng Xue
Signed-off-by: Zhangfei Gao
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/hix5hd2-phy.txt| 22
1 file changed, 22 ins
On Thu, 17 Jul 2014, Stanimir Varbanov wrote:
> From: Josh Cartwright
>
> The Qualcomm SPMI PMIC chips are components used with the
> Snapdragon 800 series SoC family. This driver exists
> largely as a glue mfd component, it exists to be an owner
> of an SPMI regmap for children devices describ
From: Jingoo Han
Make local functions static, because these are used only in this
file.
Signed-off-by: Jingoo Han
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-exynos5-usbdrd.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/phy-exynos5-usb
From: Sachin Kamat
USB DWC3 driver on Exynos platform does not work without its
corresponding phy driver. Hence make the PHY driver depend on
Exynos DWC3 driver and default it to yes to make things easier
for the end user.
Signed-off-by: Sachin Kamat
Reviewed-by: Jingoo Han
Tested-by: Vivek Ga
At the start of the intcall function, the %al register is compared to
0x3f. If it does not equal 0x3f it is equated to it. Instruction flow
continues in both cases from the label 1. The comparison is therefore
unneeded.
Testing data is appended.
Signed-off-and-tested-by: Klemen Jan Enova
---
From: Srinivas Kandagatla
Add a PHY driver for uses with AHCI based SATA controller driver on the
APQ8064 family of SoCs.
This patch is a forward port from Qualcomm's v3.4 andriod kernel.
Tested on IFC6410 board.
CC: Sujit Reddy Thumma
Tested-by: Kiran Padwal
Signed-off-by: Srinivas Kandagat
From: Andrew Lunn
mach-kirkwood has been removed, now that kirkwood lives in mach-mvebu.
Depend on MACH_KIRKWOOD, which will be set when these SoCs are built
as part of mach-mvebv.
Signed-off-by: Andrew Lunn
Cc: Kishon Vijay Abraham I
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/Kco
From: Roger Quadros
phy-supply is a phandle to the regulator that provides power to the
PHY. This regulator is managed during the PHY power on/off sequence
by the phy core driver.
Signed-off-by: Roger Quadros
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/phy-bindings.t
From: Antoine Ténart
The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.
The mode selection can let us think this PHY can be configured to fit
other purposes. But there are reasons to think the SATA mode will be
the only one usable: the PHY registers are only accessible indirec
From: Srinivas Kandagatla
This patch adds binding spec for Qualcomm AP8064 SATA PHY.
Signed-off-by: Srinivas Kandagatla
Tested-by: Kiran Padwal
Signed-off-by: Kishon Vijay Abraham I
---
.../bindings/phy/qcom-apq8064-sata-phy.txt | 24
1 file changed, 24 inserti
From: Roger Quadros
Some PHYs can be powered by an external power regulator.
e.g. USB_HS PHY on DRA7 SoC. Make the PHY core support a
power regulator.
Signed-off-by: Roger Quadros
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-core.c | 26 ++
include/linu
Fixed of_phy_provider_lookup to return 'phy_provider' if _of_phy_get
passes the node pointer of the sub-node of phy provider node. This is
needed when phy provider implements multiple PHYs and each PHY is
modelled as the sub-node of PHY provider device node.
Signed-off-by: Kishon Vijay Abraham I
From: Kumar Gala
Add a PHY driver for uses with AHCI based SATA controller driver on the
IPQ806x family of SoCs.
Signed-off-by: Kumar Gala
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/Kconfig |7 ++
drivers/phy/Makefile|1 +
drivers/phy/phy-qco
From: Kumar Gala
Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on
the IPQ806x family of SoCs.
Signed-off-by: Kumar Gala
Signed-off-by: Kishon Vijay Abraham I
---
.../bindings/phy/qcom-ipq806x-sata-phy.txt | 23
1 file changed, 23 insertions(
From: Lee Jones
This has the added advantages of being able to enable/disable each
of the channels as simply as enabling/disabling the DT node.
Suggested-by: Kishon Vijay Abraham I
Signed-off-by: Lee Jones
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-miphy365x.c | 256 +
From: Srinivas Kandagatla
This patch fixes a possible timeout in poll loop without actually
checking the register before return. In theory the there is a possibility
of loop being scheduled after a long lock/delay, which would then force
the loop to exit without actually checking the register.
R
From: Antoine Ténart
The Berlin SATA PHY drives the PHY related to the SATA interface. Add
the corresponding documentation.
Signed-off-by: Antoine Ténart
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/berlin-sata-phy.txt| 34
1 file changed, 3
From: Lee Jones
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Mark Rutland
Signed-off-by: Alexandre Torgue
Signed-off-by: Lee Jones
Signed-off-by: Kis
In case of multi-phy PHY providers, each PHY should be modeled as a sub
node of the PHY provider. Then each PHY will have a different node pointer
(node pointer of sub node) than that of PHY provider. Added this provision
in the PHY core.
Also fixed all drivers to use the updated API.
Signed-off-b
On Tue 2014-07-22 12:34:44, Joerg Roedel wrote:
> On Tue, Jul 22, 2014 at 02:41:29AM +0200, Rafael J. Wysocki wrote:
> > It looks like some specific need motivated the Joerg's work, however,
> > so let's just not dismiss the use case lightly without knowing it.
>
> The motivation was to optimize t
From: Lee Jones
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: Mark Rutland
Acked-by: Alexandre Torgue
Signed-off-by: Lee Jones
Signed-off-by: Kishon V
From: Sachin Kamat
Since the USB 2.0 PHYs are required with EHCI/OHCI USB drivers and
USB gadget controller supported by the DWC2 gadget driver, make it
depend on them and default to ARCH_EXYNOS as they are meant for
Exynos platforms. Also, make the sub-drivers silent options enabling
them based
Hi Greg,
Here's the PULL Request for 3.17 merge window. It adds regulator
support in PHY core and adds better support for multi-phy PHY providers.
It includes a bunch of new PHY drivers and some misc cleanups and fixes.
Let me know if I have to change something.
Cheers
Kishon
The following chan
From: Marek Szyprowski
This patch adds support for Exynos3250 SoC to Exynos2USB PHY driver.
Although Exynos3250 has only one device phy interface, the register
layout and all operations that are required to get it enabled are almost
same as on Exynos4x12. The only different is one more register
(
From: Sachin Kamat
PTR_ERR_OR_ZERO simplifies the code.
Signed-off-by: Sachin Kamat
Cc: Sylwester Nawrocki
Acked-by: Hans de Goede
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-exynos-mipi-video.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/driver
On Tue 2014-07-22 12:34:44, Joerg Roedel wrote:
> On Tue, Jul 22, 2014 at 02:41:29AM +0200, Rafael J. Wysocki wrote:
> > It looks like some specific need motivated the Joerg's work, however,
> > so let's just not dismiss the use case lightly without knowing it.
>
> The motivation was to optimize t
>From c8a190816725dd6586bc9de997bf8e50416da428 Mon Sep 17 00:00:00 2001
From: Yuan Juntao
Date: Tue, 22 Jul 2014 18:16:34 +0800
Subject: [PATCH] Add SDR12 & SDR25 support for sdio cards.
According to SDIO simplified specification v3.0, a card should also
support SDR25 & SDR12 if one of the DDR50,
Different playback and capture bits-per-sample
are not supported on the AIFs
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/wm8997.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c
index bb9b47b..ab33fe5 1006
Different playback and capture bits-per-sample
are not supported on the AIFs
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/wm5102.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c
index fa24d55..f602349 100
Different playback and capture bits-per-sample
are not supported on the AIFs
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/wm5110.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c
index 62ef544..2f2ec26 100
Goede dag,
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per post advertentie. Wij bieden verschillende soorten leningen (korte
en lange termijn leningen, persoonlijke leningen, leningen aan
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Am Dienstag, 22. Juli 2014, 10:39:38 schrieb Arnd Bergmann:
> On Tuesday 22 July 2014 11:11:14 Chanwoo Choi wrote:
> > This patch add support for s3c2410/s3c2416/s3c2440/s3c2443 ADC. The
> > s3c24xx
> > is alomost same as ADCv1. But, There are a little difference as following:
> > - ADCMUX register
Changes to the AIF configuration registers only take
effect when the AIF is disabled. If the configuration
is being changed from the previous setup, temporarily
disable the AIF.
Signed-off-by: Dimitris Papastamos
Signed-off-by: Richard Fitzgerald
---
sound/soc/codecs/arizona.c | 87 ++
On Tue, Jul 22, 2014 at 11:47:40AM +0200, Peter Zijlstra wrote:
> On Mon, Jul 21, 2014 at 06:52:12PM +0200, Peter Zijlstra wrote:
> > On Mon, Jul 21, 2014 at 11:35:28AM -0500, Bruno Wolff III wrote:
> > > Is there more I can do to help with this now? Or should I just wait for
> > > patches to test?
On Tue, Jul 22, 2014 at 02:41:29AM +0200, Rafael J. Wysocki wrote:
> It looks like some specific need motivated the Joerg's work, however,
> so let's just not dismiss the use case lightly without knowing it.
The motivation was to optimize the data structures for machines with
large amounts of RAM
On Thu, 17 Jul 2014, Stanimir Varbanov wrote:
> The pm8921-core driver presently supports pm8921 and pm8058
> Qualcomm PMICs. To avoid confusion with new generation PMICs
> (like pm8941) rename the pm8921-core driver to more
> appropriate name pm8xxx-ssbi, which reflects better that
> those chips
On Sunday 20 July 2014 17:45:40 Chen Gang wrote:
> >
> > Next, I shall:
> >
> > - Remove HAS_IOMEM and NO_IOMEM from kernel, firstly.
> >
> > - Try to make dummy IOMEM functions for score architecture.
> >
> > - Continue discussing with UML for it.
> >
>
> Oh, sorry, I forgot, after remove
On Tue, 2014-07-22 at 09:50 +0800, Ethan Zhao wrote:
> There is global funcion pci_vfs_assigned(), so use it instead of
> composing
> local one.
>
> Signed-off-by: Ethan Zhao
> ---
> drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 31
> +---
> 1 files changed, 1 insertions
On 21/07/14 17:46, Russell King - ARM Linux wrote:
> On Mon, Jul 21, 2014 at 03:47:16PM +0100, Daniel Thompson wrote:
>> From: Marek Vasut
>>
>> Add new device type, MT_DEVICE_NS. This type sets the NS bit in L1 PTE [1].
>> Accesses to a memory region which is mapped this way generate non-secure
>
> Thanks for reviewing, see my comments inline below: -
In future, it's best to only reply to questions, or review comments
that you disagree with. Anything that you will action or agree with
can be snipped along with any irrelevant code from your reply and
replaced with "" or "[...]". If you ar
On Thursday 17 July 2014 01:19 PM, Tony Lindgren wrote:
> We seem to have this layout WR_SOFT_RESET and WR_CONTROL in the TRM:
>
> WR_SOFT_RESET
> [0] SOFT_RESET
>
> WR_CONTROL
> [3:2] MMR_STDBYMODE 0 = force-idle, 1 = no-standby
> [1:0] MMR_IDLEMODE0 = force-idle, 1 = no-idle
>
> And
kfree.cocci currently triggers on constructs like
(resending with proper CC list and subject line)
drivers/staging/rts5208/spi.c
596if (retval < 0) {
597kfree(buf);
598rtsx_clear_spi_error(chip);
599spi_set_err_code(chip, SPI_HW_ERR);
600TRACE_R
Hi Arnd, Kevin, Olof,
On Fri, 2014-07-11 at 16:06 +0100, Pawel Moll wrote:
> Driver providing perf backend for ARM Cache Coherent Network
> interconnect. Supports counting all hardware events and crosspoint
> watchpoints.
>
> Currently works with CCN-504 only, although there should be
> no chang
Hi Brian,
On Mon, Jul 14, 2014 at 12:19:47PM -0700, Brian Norris wrote:
> Hi Michael,
>
> On Fri, Jun 27, 2014 at 12:38:44PM +0200, Michael Grzeschik wrote:
> > The current approach of the read_page function is to iterate over all
> > subpages and call the correct_data function. The correct_data
Hi,
Do you know if all these timings will be used by the nand drivers ?
I did a similar patch [1] (that wasn't merged :( ), and I used reduced
timing info.
I also have support for the omap driver
(http://article.gmane.org/gmane.linux.ports.arm.omap/88606/match=) and
a controller we use in our c
On 07/22/2014 10:07 AM, Hugh Dickins wrote:
On Mon, 21 Jul 2014, Sasha Levin wrote:
On 07/19/2014 07:44 PM, Hugh Dickins wrote:
Otherwise, I've been unable to reproduce the shmem_fallocate hang.
Great. Andrew, I think we can say that it's now safe to send
1/2 shmem: fix faulting into a hole,
On Mon 2014-07-21 08:02:34, Alex Elder wrote:
> Each log record has a "flags" field. The flags keep track of, for
> instance, whether the record was saved in its entirety (as opposed
> to being one of multiple records that should be merged as a single
> unit). A log record's flags field alone is
On 07/22/2014 02:38 PM, Subbaraya Sundeep Bhatta wrote:
+#include
+#include
+#include
+#include "gadget_chips.h"
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
Normally we will put the includes in alphabetical because it looks
Hi Gu,
Investigation shows, that f2fs_evict_inode, when called for 'meta_inode', uses
invalidate_mapping_pages() for 'node_inode'.
But 'node_inode' is deleted before 'meta_inode' in f2fs_put_super via iput().
It seems that in common usage scenario this use-after-free is benign, because
'node_
On Tue, 2014-07-08 at 14:06 +0100, Pawel Moll wrote:
> On Tue, 2014-06-24 at 12:55 +0100, Pawel Moll wrote:
> > This patch adds basic DT bindings for the PL11x CLCD cells
> > and make their fbdev driver use them.
> >
> > Signed-off-by: Pawel Moll
>
> As two weeks passed without any further comme
On Tue, 22 Jul 2014, Peter Zijlstra wrote:
> On Tue, Jul 22, 2014 at 10:39:17AM +0200, Thomas Gleixner wrote:
> > On Tue, 22 Jul 2014, Peter Zijlstra wrote:
> > > Anyway, there is one big fail in the entire futex stack that we 'need'
> > > to sort some day and that is NUMA. Some people (again datab
Am 2014-07-22 04:22, schrieb Shawn Guo:
> On Fri, Jul 18, 2014 at 07:01:37PM +0200, Stefan Agner wrote:
>> This adds USB PHY and USB controller nodes. Vybrid SoCs have two
>> independent USB cores which each supports DR (dual role). However,
>> real OTG is not supported since the OTG ID pin is not
On 22/07/14 12:21, Daniel Vetter wrote:
On Tue, Jul 22, 2014 at 10:19 AM, Oded Gabbay wrote:
Exactly, just prevent userspace from submitting more. And if you have
misbehaving userspace that submits too much, reset the gpu and tell it
that you're sorry but won't schedule any more work.
I'm not
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