2014-10-22 21:03 GMT-07:00 Guenter Roeck li...@roeck-us.net:
Add support for reading switch registers with 'ethtool -d'.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
[snip]
+static int dsa_slave_get_regs_len(struct net_device *dev)
+{
+ struct dsa_slave_priv *p =
On 2014/10/23 12:25, Bjorn Helgaas wrote:
On Wed, Oct 15, 2014 at 11:06:50AM +0800, Yijing Wang wrote:
Commit 0e4ccb1505a9 (PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq())
introduced two __weak arch functions arch_msix_mask_irq() and
arch_msi_mask_irq() to work around a bug when running
2014-10-22 21:03 GMT-07:00 Guenter Roeck li...@roeck-us.net:
Patch 01/14 addresses an annoying and unhelpful log message.
Patches 02/14 and 03/14 are minor enhancements, adding support for
known switch revisions.
Patches 04/14 and 05/14 add support for MV88E6352 and MV88E6176.
Patch 06/14
Hi Namhyng,
(2014/10/23 0:15), Namhyung Kim wrote:
The perf probe has some exclusive options. Use new PARSE_OPT_EXCLUSIVE
flag to simplify the code and show more compact usage.
$ perf probe -l -a foo
Error: switch `a' cannot be used with switch `l'
usage: perf probe [options]
(2014/10/23 0:15), Namhyung Kim wrote:
Some options cannot be used at the same time. To handle such options
add a new PARSE_OPT_EXCLUSIVE flag and show error message if more than
one of them is used.
Looks useful for me :)
Reviewed-by: Masami Hiramatsu masami.hiramatsu...@hitachi.com
I just
kcmp.h appears to be part of the API, it's documented in kcmp(2), and
the selftests/kcmp code uses it. So move it to uapi so it's actually
exported.
Signed-off-by: Michael Ellerman m...@ellerman.id.au
---
include/linux/kcmp.h | 13 +
include/uapi/linux/Kbuild | 1 +
On 10/22/2014 09:37 PM, Florian Fainelli wrote:
2014-10-22 21:03 GMT-07:00 Guenter Roeck li...@roeck-us.net:
Some Marvell switches provide chip temperature data.
Add support for reporting it to the dsa infrastructure.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
[snip]
+/* hwmon
Don't prevent the test building on non-x86. Just try and build it and
let the chips fall where they may.
Signed-off-by: Michael Ellerman m...@ellerman.id.au
---
tools/testing/selftests/kcmp/Makefile | 14 --
1 file changed, 14 deletions(-)
diff --git
The kcmp test mucks with the include path to bring in the kernel
headers, and x86 headers too for reasons that are not clear.
Now that kcmp.h is exported none of that should be necessary.
Signed-off-by: Michael Ellerman m...@ellerman.id.au
---
tools/testing/selftests/kcmp/Makefile | 4
1
On Mon, Oct 20, 2014 at 7:19 PM, Octavian Purdila
octavian.purd...@intel.com wrote:
On Mon, Oct 20, 2014 at 8:08 AM, Alexandre Courbot gnu...@gmail.com wrote:
On Wed, Oct 15, 2014 at 11:48 PM, Octavian Purdila
octavian.purd...@intel.com wrote:
Some GPIO chips (e.g. the DLN2 USB adapter) have
On 二, 2014-10-21 at 09:49 -0400, Eduardo Valentin wrote:
Hello Rui,
Here are a couple of changes that are in my tree. They include:
- a few code refactoring improving the Exynos code base;
- new feature on the Exynos code base (TRIMINFO and TRIMRELOAD);
- a documentation of RCAR thermal;
On Wed, Oct 15, 2014 at 11:06:53AM +0800, Yijing Wang wrote:
Save msi chip in pci_sys_data instead of assign
msi chip to every pci bus in .add_bus().
Signed-off-by: Yijing Wang wangyij...@huawei.com
---
drivers/pci/host/pci-tegra.c | 13 +++--
1 files changed, 3 insertions(+),
On 10/22/2014 09:40 PM, Florian Fainelli wrote:
2014-10-22 21:03 GMT-07:00 Guenter Roeck li...@roeck-us.net:
Add support for reading switch registers with 'ethtool -d'.
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
[snip]
+static int dsa_slave_get_regs_len(struct net_device *dev)
+{
On 10/22/2014 09:45 PM, Florian Fainelli wrote:
2014-10-22 21:03 GMT-07:00 Guenter Roeck li...@roeck-us.net:
Patch 01/14 addresses an annoying and unhelpful log message.
Patches 02/14 and 03/14 are minor enhancements, adding support for
known switch revisions.
Patches 04/14 and 05/14 add
splash
screen).
It was working pretty fine with next-20140926.
I've also tested with next-20141022 and v3.18-rc1 and no luck.
git bisect pointed me to the commit below [1]. My wireless card is a
RTL8191SEvA [2].
Mine is RTL8191SEvB.
I was going to bisect RTL8191SE regression when I
On 10/22/2014 03:11 PM, Masami Hiramatsu wrote:
(2014/10/22 17:20), Hemant Kumar wrote:
From file_sdt_ent we will find out the file name.
Convert this sdt note into a perf event and then write this into uprobe_events
file to be able to record the event.
Then, corresponding entries are added
On Wed, Oct 15, 2014 at 11:06:52AM +0800, Yijing Wang wrote:
Saving msi chip in pci_sys_data can make pci bus and
devices don't need to know msi chip detail, it also
make pci enumeration code be decoupled from msi chip.
In fact, all pci devices under the same pci hostbridge
share same msi
On Wed, Oct 15, 2014 at 11:06:57AM +0800, Yijing Wang wrote:
MSI chip will be saved in pci_sys_data, now we can
clean up pcibios_add_bus() and pcibios_remove_bus()
in arm, and use pci_find_msi_chip() to get msi chip
in core MSI code.
Signed-off-by: Yijing Wang wangyij...@huawei.com
---
On Wed, Oct 15, 2014 at 11:06:58AM +0800, Yijing Wang wrote:
Now msi chip is saved in pci_sys_data in arm,
we could clean the bus-msi assignment in
pci core.
Signed-off-by: Yijing Wang wangyij...@huawei.com
CC: Thierry Reding thierry.red...@gmail.com
CC: Thomas Petazzoni
On Wed, Oct 15, 2014 at 11:06:48AM +0800, Yijing Wang wrote:
Now there are a lot of weak arch functions in MSI code.
Thierry Reding Introduced MSI chip framework to configure MSI/MSI-X in arm,
that's a better solution than overriding lots of existing weak arch
functionsin.
This series use
On Wed, Oct 22, 2014 at 12:17:33PM +0200, Paolo Bonzini wrote:
On 10/22/2014 11:35 AM, Chao Peng wrote:
Expose Intel AVX-512 feature bits to guest. Also add checks for
xcr0 AVX512 related bits according to spec:
Hi Laurent,
Thank you for reviewing,
2014-10-23 1:53 GMT+02:00 Laurent Pinchart laurent.pinch...@ideasonboard.com:
Hi Jean-Michel,
Thank you for the patch.
On Wednesday 22 October 2014 17:34:21 Jean-Michel Hautbois wrote:
This patch adds support for DT parsing of ADV7604 as well as
* Masami Hiramatsu masami.hiramatsu...@hitachi.com [2014-10-22 18:41:58]:
(2014/10/22 17:20), Hemant Kumar wrote:
From file_sdt_ent we will find out the file name.
Convert this sdt note into a perf event and then write this into
uprobe_events
file to be able to record the event.
Then,
* Robert Bragg rob...@sixbynine.org wrote:
[...]
I'd be interested to hear whether is sounds reasonable to
others for us to expose gpu device metrics via a perf pmu and
whether adding the PERF_PMU_CAP_IS_DEVICE flag as in my
following patch could be acceptable.
I think it's perfectly
On Fri, 2014-10-10 at 14:03 +0800, Chen Yucong wrote:
From: Chen Yucong sla...@gmail.com
dram_ce_error() stems from Boris's patch set. Thanks!
Link: http://lkml.org/lkml/2014/7/1/545
Uncorrected no action required (UCNA) - is a UCR error that is not
signaled via a machine check exception
On Wed, 22 Oct 2014, Masami Hiramatsu wrote:
Add a function that allows external users (such as live patching
mechanisms) to check whether a given function (identified by symbol name)
has a kprobe installed in it.
Actually, we've already exported the list of kprobes with probe points
This series demonstrates cpu frequency scaling via a simple policy
driven by the scheduler. Specifically the policy evaluates cpu frequency
when cpu utilization is updated from enqueue_task_fair and
dequeue_task_fair. The policy itself uses a simple up/down threshold
scheme using the same 80%/20%
Building on top of the scale invariant capacity patches and earlier
patches in this series that prepare CFS for scaling cpu frequency, this
patch implements a simple, naive ondemand-like cpu frequency scaling
policy that is driven by enqueue_task_fair and dequeue_tassk_fair. This
new policy is
It seems useful~!
I'd like to do some test with it~
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Please read the FAQ at http://www.tux.org/lkml/
capacity_of is useful for cpu frequency scaling policies. Share it via
sched.h so that selectable cpu frequency scaling policies can make use
of it.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
kernel/sched/fair.c | 7 +--
kernel/sched/sched.h | 2 ++
2 files changed, 7
Signed-off-by: Mike Turquette mturque...@linaro.org
---
kernel/sched/fair.c | 6 ++
kernel/sched/sched.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 15f5638..0930ad8 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@
{en,de}queue_task_fair are updated to track which cpus will have changed
utilization values as function of task queueing. The affected cpus are
passed on to arch_eval_cpu_freq for further machine-specific processing
based on a selectable policy.
arch_scale_cpu_freq is called from
arch_eval_cpu_freq and arch_scale_cpu_freq are added to allow the
scheduler to evaluate if cpu frequency should change and to invoke that
change from a safe context.
They are weakly defined arch functions that do nothing by default. A
CPUfreq governor could use these functions to implement a
Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@rjwysocki.net
Signed-off-by: Mike Turquette mturque...@linaro.org
---
include/linux/cpufreq.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 138336b..91d173c 100644
From: Morten Rasmussen morten.rasmus...@arm.com
This patch introduces the ENERGY_AWARE sched feature, which is
implemented using jump labels when SCHED_DEBUG is defined. It is
statically set false when SCHED_DEBUG is not defined. Hence this doesn't
allow energy awareness to be enabled without
On 2014年10月09日 09:18, Lan Tianyu wrote:
On 2014年10月09日 04:54, Peter Zijlstra wrote:
On Thu, Sep 25, 2014 at 04:32:02PM +0800, Lan Tianyu wrote:
This patchset is to parallel enabling nonboot cpus with resuming devices
during system resume in order to accelerate S2RAM. From test result on
a 8
From: Sasha Levin sasha.le...@oracle.com
Date: Tue, 21 Oct 2014 22:19:36 -0400
On 10/21/2014 09:39 PM, David Miller wrote:
From: Sasha Levin sasha.le...@oracle.com
Date: Tue, 21 Oct 2014 16:51:09 -0400
netlink uses empty data to seperate different levels. However, we still
try to copy
On 22 October 2014 11:37, Mike Turquette mturque...@linaro.org wrote:
Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@rjwysocki.net
Signed-off-by: Mike Turquette mturque...@linaro.org
---
include/linux/cpufreq.h | 3 +++
1 file changed, 3 insertions(+)
diff --git
On 10/21/2014 11:31 PM, Soren Brinkmann wrote:
- add myself as reviewer for Zynq
- add entry to cover Zynq clock drivers
- add entry to cover Xilinx DMA drivers
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff
On Tue, Oct 21, 2014 at 11:26 PM, Viresh Kumar viresh.ku...@linaro.org wrote:
On 22 October 2014 11:37, Mike Turquette mturque...@linaro.org wrote:
Cc: Viresh Kumar viresh.ku...@linaro.org
Cc: Rafael J. Wysocki r...@rjwysocki.net
Signed-off-by: Mike Turquette mturque...@linaro.org
---
On Tue, 2014-10-21 at 22:05 +0200, Fabian Frederick wrote:
I can also resubmit patch if necessary.
No worries, I've already applied the patch (with a modified commit
message).
johannes
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Currently, arch_trigger_all_cpu_backtrace() is defined in only x86 and sparc
which has nmi interrupt.
But in case of softlockup not a hardlockup, it could be possible to dump
backtrace of all cpus. and this could be helpful for debugging.
for example, if system has 2 cpus.
CPU 0
On Tue, Oct 21, 2014 at 02:22:39PM -0400, Johannes Weiner wrote:
On Tue, Oct 21, 2014 at 05:15:50PM +0400, Vladimir Davydov wrote:
mem_cgroup_reclaimable() checks whether a cgroup has reclaimable pages
on *any* NUMA node. However, the only place where it's called is
Hi Wang,
On Thu, 16 Oct 2014 11:08:43 +0800, Wang Nan wrote:
After kerne 3.7 (commit b4b8f770eb10a1bccaf8aa0ec1956e2dd7ed1e0a),
/proc/cpuinfo replcae 'Processor' to 'model name'. This patch makes
CPUINFO_PROC to an array and provides two choices for ARM, make it
compatible for different
Hi Hemant,
(2014/10/10 19:59), Hemant Kumar wrote:
The SDT events are already stored in a cache file
(/var/cache/perf/perf-sdt-file.cache).
Please describe what this patch does at first.
Although the file_hash table helps in addition or deletion of SDT events from
the
cache, its not of
Hi Eubong,
one small question inline ...
On 22/10/2014 08:39, Eunbong Song wrote:
Currently, arch_trigger_all_cpu_backtrace() is defined in only x86
and sparc which has nmi interrupt. But in case of softlockup not a
hardlockup, it could be possible to dump backtrace of all cpus. and
this
On Tue, Oct 21, 2014 at 04:21:33PM -0400, Johannes Weiner wrote:
The wrappers around taking and dropping the memcg-move_lock spinlock
add nothing of value. Inline the spinlock calls into the callsites.
Signed-off-by: Johannes Weiner han...@cmpxchg.org
Acked-by: Vladimir Davydov
On Tue, Oct 21, 2014 at 04:21:34PM -0400, Johannes Weiner wrote:
mem_cgroup_end_move() checks if the passed memcg is NULL, along with a
lengthy comment to explain why this seemingly non-sensical situation
is even possible.
Check in cancel_attach() itself whether can_attach() set up the move
Hi Eubong,
one small question inline ...
+void arch_trigger_all_cpu_backtrace(bool); +#define
arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace
What is the purpose of this define ? is this maybe a leftover from
some regex/cleanups ?
Hi John.
Actually, I just follow the same
On Wed, 2014-10-22 at 08:29 +0200, Michal Simek wrote:
On 10/21/2014 11:31 PM, Soren Brinkmann wrote:
- add myself as reviewer for Zynq
- add entry to cover Zynq clock drivers
- add entry to cover Xilinx DMA drivers
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
---
On 09/10/14 12:48, Maarten ter Huurne wrote:
Since strsep is used to tokenize the options string, after each option
match the code should use continue to get the next token from strsep.
This patch applies this pattern consistently.
Previously, for scrollback: and map: the parse code would
(2014/10/22 15:02), Jiri Kosina wrote:
On Wed, 22 Oct 2014, Masami Hiramatsu wrote:
Add a function that allows external users (such as live patching
mechanisms) to check whether a given function (identified by symbol name)
has a kprobe installed in it.
Actually, we've already exported
On Tue, Oct 21, 2014 at 11:55:40PM +0200, Alexandre Belloni wrote:
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a20df9bf8ab0..e325c81ee2fa
On 14/10/14 14:53, Jeff Kirsher wrote:
From: Mark Rustad mark.d.rus...@intel.com
Resolve shadow warnings that appear in W=2 builds by renaming
the state global to vgastate.
Signed-off-by: Mark Rustad mark.d.rus...@intel.com
Signed-off-by: Jeff Kirsher jeffrey.t.kirs...@intel.com
---
On Thu, 16 Oct 2014 11:08:29 +0800, Wang Nan wrote:
When 'perf record' write headers, it calls write_xxx in
tools/perf/util/header.c, and check return value. It rolls back all
working only when return value is negative.
This patch ensures write_cpudesc() and write_total_mem() return negative
On 20/10/14 15:21, Nicolas Ferre wrote:
On 17/10/2014 14:19, Alexandre Belloni :
Remove unnecessary mach/cpu.h header to be able to converge to a
multiplatform
kernel.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
From: karam.lee karam@lge.com
Recently rw_page block device operation has been added.
This patchset implements rw_page operation for zram block device
and does some clean-up.
Patches 1~2 are for clean-up.
Patch 3 is for implementation of rw_page operation.
With the rw_page operation, zram
From: karam.lee karam@lge.com
This patch implements rw_page operation for zram block device.
I implemented the feature in zram and tested it.
Test bed was the G2, LG electronic mobile device, whtich has msm8974
processor and 2GB memory.
With a memory allocation test program consuming memory,
From: karam.lee karam@lge.com
This patch changes parameter of valid_io_request for common usage.
The purpose of valid_io_request() is to determine if bio request is
valid or not.
This patch use I/O start address and size instead of a BIO parameter
for common usage.
Signed-off-by: karam.lee
From: karam.lee karam@lge.com
This patch removes an unnecessary parameter(bio)
from zram_bvec_rw() and zram_bvec_read().
zram_bvec_read() doesn't use a bio parameter, so remove it.
zram_bvec_rw() calls a read/write operation not using bio, so a rw parameter
replaces a bio parameter.
While offling node by hot removing memory, the following divide error
occurs:
divide error: [#1] SMP
[...]
Call Trace:
[...] handle_mm_fault
[...] ? try_to_wake_up
[...] ? wake_up_state
[...] __do_page_fault
[...] ? do_futex
[...] ? put_prev_entity
[...] ?
After interface restart (eg: after link disconnection/reconnection), the bridge
function doesn't work anymore. This is due to the promiscuous mode being cleared
by the restart.
The mac-fcc already includes code to set the promiscuous mode back during the
restart.
This patch adds the same
On 16 October 2014 02:52, bpqw b...@micron.com wrote:
For example:
const struct spi_device_id spi_nor_ids[] = {
..
..
..
{ n25q064, INFO(0x20ba17, 0, 64 * 1024, 128, 0) },
{ n25q128a11, INFO(0x20bb18, 0, 64 * 1024, 256, 0) },//former
right platform
Dear Alexandre Belloni,
On Tue, 21 Oct 2014 23:55:37 +0200, Alexandre Belloni wrote:
/*
* unless the SDRAM is cleanly shutdown before we hit the
* reset register it can be left driving the data bus and
* killing the chance of a subsequent boot from NAND
*/
-static void
10/22/14, 3:04 PM, Yasuaki Ishimatsu:
While offling node by hot removing memory, the following divide error
occurs:
divide error: [#1] SMP
[...]
Call Trace:
[...] handle_mm_fault
[...] ? try_to_wake_up
[...] ? wake_up_state
[...] __do_page_fault
[...] ?
On 22/10/2014 08:54, Eunbong Song wrote:
Hi Eubong,
one small question inline ...
+void arch_trigger_all_cpu_backtrace(bool); +#define
arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace
What is the purpose of this define ? is this maybe a leftover from
some
Changes in v4:
- use a generic phy header file for dt binding
- cosmetic correction
- add comments
Changes in v3:
- split into separate smaller functions and can be resued
for sata / pcie and usb
- uses macros for registers and values
- cosmetic correction
from Kishon
- create a
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue alexandre.tor...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue alexandre.tor...@st.com
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
The MiPHY28lp is a Generic PHY which can serve various SATA, PCIe or
USB3 devices. The two first ports can be use for either; both SATA, both
PCIe or one of each in any configuration.
The Third port is only for USB3.
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
Unlocked access to dst_rq-curr in task_numa_compare() is racy.
If curr task is exiting this may be a reason of use-after-free:
task_numa_compare()do_exit()
...current-flags |= PF_EXITING;
...
This patch to compensate tx impedance (Sata, PCIe)
depending on Soc cuts the kernel is built for.
Signed-off-by: Giuseppe Condorelli giuseppe.condore...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
Documentation/devicetree/bindings/phy/phy-miphy28lp.txt | 1 +
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 491b7d5..b86dc6d 100644
---
SSC is the technique of modulating the operating frequency of a signal
slightly to spread its radiated emissions over a range of frequencies.
This reduction in the maximum emission for a given frequency helps meet
radiated emission requirements.
These settings are applicable for PCIE with Internal
On 22/10/2014 at 09:08:10 +0200, Thomas Petazzoni wrote :
Dear Alexandre Belloni,
On Tue, 21 Oct 2014 23:55:37 +0200, Alexandre Belloni wrote:
/*
* unless the SDRAM is cleanly shutdown before we hit the
* reset register it can be left driving the data bus and
* killing the chance
This provides the shared header file which will be reference from both
PHY driver and its associated Device Tree node(s).
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
include/dt-bindings/phy/phy.h | 17 +
1 file changed, 17 insertions(+)
create mode 100644
This patch to tune on/off the ssc on miphy sata setup.
User can now enable ssc via dt blob, it is useful to reduce
effects of EMI.
Signed-off-by: Giuseppe Condorelli giuseppe.condore...@st.com
Signed-off-by: Gabriel Fernandez gabriel.fernan...@linaro.org
---
Hi Grant,
Really appreciate your time to review the hierarchy irqdomain
code at LinuxCon. During review, you mentioned your concerns about the
hint when allocating IRQ number. I have checked related code again
and current situation is:
1) For existing irq_create_mapping() interface, it
Hi karam,
On Wed, Oct 22, 2014 at 04:04:14PM +0900, karam@lge.com wrote:
From: karam.lee karam@lge.com
This patch implements rw_page operation for zram block device.
I implemented the feature in zram and tested it.
Test bed was the G2, LG electronic mobile device, whtich has
On Wed, Oct 22, 2014 at 04:04:12PM +0900, karam@lge.com wrote:
From: karam.lee karam@lge.com
This patch removes an unnecessary parameter(bio)
from zram_bvec_rw() and zram_bvec_read().
zram_bvec_read() doesn't use a bio parameter, so remove it.
zram_bvec_rw() calls a read/write
On Wed, Oct 22, 2014 at 04:04:13PM +0900, karam@lge.com wrote:
From: karam.lee karam@lge.com
This patch changes parameter of valid_io_request for common usage.
The purpose of valid_io_request() is to determine if bio request is
valid or not.
This patch use I/O start address and
On Tue, Oct 21, 2014 at 04:32:21PM +0200, Peter Zijlstra wrote:
+ val = mul_u64_u32_shr(val, runnable_avg_yN_inv[local_n], 32);
+ return val;
Brilliant!
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More
On 21/10/14 16:13, Adrian Hunter wrote:
On 21/10/14 16:08, Rafael J. Wysocki wrote:
On Tuesday, October 21, 2014 03:27:45 PM Adrian Hunter wrote:
On 24/09/14 16:49, Rafael J. Wysocki wrote:
On Wednesday, September 24, 2014 11:00:37 AM Heikki Krogerus wrote:
Most devices are configured for
On Mon, 2014-10-20 at 23:56 +0200, Peter Zijlstra wrote:
Hi,
I figured I'd give my 2010 speculative fault series another spin:
https://lkml.org/lkml/2010/1/4/257
Since then I think many of the outstanding issues have changed sufficiently to
warrant another go. In particular Al Viro's
Hi,
On 10/21/2014 6:35 PM, Vinod Koul wrote:
On Tue, Oct 21, 2014 at 12:20:06PM +0200, Herve Codina wrote:
Hi,
Please don't top post
I didn't go deeper in atmel_nand.c code to see other accesses but old
copy use writel_relaxed which is a macro to __raw_writel((__force u32)
cpu_to_le32(v),c)
On 10/22/2014 08:54 AM, Joe Perches wrote:
On Wed, 2014-10-22 at 08:29 +0200, Michal Simek wrote:
On 10/21/2014 11:31 PM, Soren Brinkmann wrote:
- add myself as reviewer for Zynq
- add entry to cover Zynq clock drivers
- add entry to cover Xilinx DMA drivers
Signed-off-by: Soren
On 10/21/2014 05:45 PM, Tomeu Vizoso wrote:
Needed to properly decode the ram code register.
Signed-off-by: Tomeu Vizoso tomeu.viz...@collabora.com
---
Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git
drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c: In function
‘xgene_enet_ecc_init’:
drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c:126: warning: ‘data’ may be
used uninitialized in this function
Depending on the arbitrary value on the stack, the loop may terminate
too early, and cause a
On Tue, Oct 21, 2014 at 04:54:35PM +0200, Peter Zijlstra wrote:
In the thread here: lkml.kernel.org/r/1409094682.29189.23.camel@j-VirtualBox
there are concerns about the error bounds of such constructs. We can
basically 'leak' nr_cpus * threshold, which is potentially a very large
number.
euler inclusion
target: kernel 3.10
category: bugfix
DTS: DTS2014101306477
Bugzilla: 623
directory: upstreamed
archive: https://lkml.org/lkml/2014/10/15/611
After kernel 3.7 (commit b4b8f770eb10a1bccaf8aa0ec1956e2dd7ed1e0a),
/proc/cpuinfo replaces
After kernel 3.7 (commit b4b8f770eb10a1bccaf8aa0ec1956e2dd7ed1e0a),
/proc/cpuinfo replaces 'Processor' to 'model name'. This patch makes
CPUINFO_PROC to an array and provides two choices for ARM, makes it
compatible for different kernel version.
v1 - v2: minor changes as suggested by Namhyung
(2014/10/22 16:09), Wanpeng Li wrote:
10/22/14, 3:04 PM, Yasuaki Ishimatsu:
While offling node by hot removing memory, the following divide error
occurs:
divide error: [#1] SMP
[...]
Call Trace:
[...] handle_mm_fault
[...] ? try_to_wake_up
[...] ? wake_up_state
Hi Alexei,
On Tue, 21 Oct 2014, Alexei Starovoitov wrote:
On Tue, Oct 21, 2014 at 10:30 AM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
Signed-off-by: Geert Uytterhoeven ge...@linux-m68k.org
---
arch/m68k/include/asm/unistd.h | 2 +-
arch/m68k/include/uapi/asm/unistd.h
On 2014/10/22 14:44, Namhyung Kim wrote:
Hi Wang,
On Thu, 16 Oct 2014 11:08:43 +0800, Wang Nan wrote:
After kerne 3.7 (commit b4b8f770eb10a1bccaf8aa0ec1956e2dd7ed1e0a),
/proc/cpuinfo replcae 'Processor' to 'model name'. This patch makes
CPUINFO_PROC to an array and provides two choices for
When hot adding the same memory after hot removing a memory,
the following messages are shown:
WARNING: CPU: 20 PID: 6 at mm/page_alloc.c:4968
free_area_init_node+0x3fe/0x426()
...
Call Trace:
[...] dump_stack+0x46/0x58
[...] warn_slowpath_common+0x81/0xa0
[...] warn_slowpath_null+0x1a/0x20
On 2014/10/22 15:00, Namhyung Kim wrote:
On Thu, 16 Oct 2014 11:08:29 +0800, Wang Nan wrote:
When 'perf record' write headers, it calls write_xxx in
tools/perf/util/header.c, and check return value. It rolls back all
working only when return value is negative.
This patch ensures
From: jinkun.hong jinkun.h...@rock-chips.com
Add power domain drivers based on generic power domain for Rockchip platform,
and support RK3288.
https://chromium-review.googlesource.com/#/c/220253/9
This is the GPU driver, add the following information in DT,
and it can support the PMDOMAIN.
gpu:
From: jinkun.hong jinkun.h...@rock-chips.com
Add power domain drivers based on generic power domain for Rockchip platform,
and support RK3288.
Signed-off-by: Jack Dai jack@rock-chips.com
Signed-off-by: jinkun.hong jinkun.h...@rock-chips.com
---
Changes in v6:
- delete pmu_lock
- modify
From: jinkun.hong jinkun.h...@rock-chips.com
Signed-off-by: Jack Dai jack@rock-chips.com
Signed-off-by: jinkun.hong jinkun.h...@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- DT structure has changed
Changes in v2:
- move clocks to optional
From: jinkun.hong jinkun.h...@rock-chips.com
Signed-off-by: Jack Dai jack@rock-chips.com
Signed-off-by: jinkun.hong jinkun.h...@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Decomposition power-controller, changed to multiple controller
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