On Tue, Oct 28, 2014 at 01:18:28PM +, Qais Yousef wrote:
> On 10/28/2014 11:55 AM, Clemens Ladisch wrote:
> >Qais Yousef wrote:
> >>AXD Audio Processing IP performs audio decoding, encoding, mixing,
> >>equalisation,
> >>synchronisation and playback.
> >What exactly do you mean with
On Wed, Oct 29, 2014 at 7:27 AM, Andrew Bresticker
wrote:
> This series adds support for xHCI on NVIDIA Tegra SoCs. This includes:
> - patches 1 and 2: adding a driver for the mailbox used to communicate
>with the xHCI controller's firmware,
> - patches 3 and 4: extending the XUSB pad
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/bitrev.h | 28
2 files changed, 29 insertions(+)
create mode 100644
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/bitrev.h | 28
2 files changed, 29 insertions(+)
create mode 100644
this change add CONFIG_HAVE_ARCH_BITREVERSE config option,
so that we can use arm/arm64 rbit instruction to do bitrev operation
by hardware.
Change bitrev16() bitrev32() to be inline function,
don't need export symbol for these tiny functions.
Signed-off-by: Yalin Wang
---
Add I2C node to mt8135.dtsi and mt8127.dtsi
Signed-off-by: Xudong Chen
---
arch/arm/boot/dts/mt8127.dtsi | 27 +++
arch/arm/boot/dts/mt8135.dtsi | 51 +++
2 files changed, 78 insertions(+)
diff --git a/arch/arm/boot/dts/mt8127.dtsi
Add devicetree bindings for Mediatek Soc I2C driver.
Signed-off-by: Xudong Chen
---
.../devicetree/bindings/i2c/i2c-mt6577.txt | 37 ++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mt6577.txt
diff --git
The mediatek SoCs have I2C controller that handle I2C transfer.
This patch include common I2C bus driver.
This driver is compatible with I2C controller on mt65xx/mt81xx.
Signed-off-by: Xudong Chen
Change-Id: Icc17e326b9df46a226d536956e103f17b0382b6e
---
drivers/i2c/busses/Kconfig | 9 +
This driver is based on 3.18-rc1 & Hongzhou's gpio patch.
MTK I2C HW has some limitation.
1. If the i2c_msg number is more than one, STOP will be issued instead of
RS(Repeat Start) between each message.
Such as: "START + ADDR + DATA_n + STOP + START + ADDR + DATA_n + STOP ..."
2. Mediatek I2C
On 10/29/2014 06:30 AM, Juergen Gross wrote:
On 10/28/2014 06:34 PM, David Vrabel wrote:
Can these patches be split up? They're hard to review as-is. e.g., the
changes to page allocation look they could be split out.
On 27/10/14 14:52, Juergen Gross wrote:
Early in the boot process the
> From: Joe Perches [mailto:j...@perches.com]
> > We also change byte_rev_table[] to be static, to make sure no drivers
> > can access it directly.
>
> You break the build with this patch.
>
> You can't do this until the users of the table are converted.
>
> So far, they are not.
>
> I
Hello,
Current pool shrinking is not page unit, block unit.
But shrinker returns the pool size in page unit,
so it is confused.
And there is no way to control pool size and shrink pool directly.
I have 3 patches like followings.
1. Patch 1/3: make pool be shrinked by page unit
This patch
This patch limits pool size by page unit.
And enable a debugfs file to set limit.
Change-Id: Idaef4daa69084e8ec0844ecefc6738afeab79ccb
Signed-off-by: Gioh Kim
---
drivers/staging/android/ion/ion.c | 31 +
drivers/staging/android/ion/ion_page_pool.c | 24
This patch enables debugfs files /sys/kernel/debug/ion/heaps/system_shrink
,which was commented out, to shrink pool or get pool size
Reading the file returns pool size and writing occurs to shrink pool.
Signed-off-by: Gioh Kim
---
drivers/staging/android/ion/ion.c | 31
This patch shrink page-pool by page unit.
Shrinker usually get the pool size with the pool-scanner
and pass the size to the pool-counter to shrink entire pool.
But the pool-scanner is working in block unit.
and pool-counter page unit.
So it is confused.
Change-Id:
On 10/28/2014 06:34 PM, David Vrabel wrote:
Can these patches be split up? They're hard to review as-is. e.g., the
changes to page allocation look they could be split out.
On 27/10/14 14:52, Juergen Gross wrote:
Early in the boot process the memory layout of a pv-domain is changed
to match
On Tue, Oct 28, 2014 at 09:07:00PM +0100, Mikael Svantesson wrote:
> Signed-off-by: Mikael Svantesson
still the same problem.
ERROR: patch seems to be corrupt (line wrapped?)
> ---
> drivers/staging/skein/skein_api.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Wed, 2014-10-29 at 13:14 +0800, Wang, Yalin wrote:
> this change add CONFIG_HAVE_ARCH_BITREVERSE config option,
> so that we can use arm/arm64 rbit instruction to do bitrev operation
> by hardware.
> We also change byte_rev_table[] to be static,
> to make sure no drivers can access it
> From: Rob Herring [mailto:robherri...@gmail.com]
> >> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index
> >> 9532f8d..263c28c 100644
> >> --- a/arch/arm64/Kconfig
> >> +++ b/arch/arm64/Kconfig
> >> @@ -36,6 +36,7 @@ config ARM64
> >> select HARDIRQS_SW_RESEND
> >> select
On Tue, Oct 28, 2014 at 4:34 PM, Wilmer van der Gaast wrote:
>
> I've run the commands twice, once before and once after a single
> suspend+resume cycle. Small difference and only before that cycle:
>
> ruby:~/crashit# diff -u lspcixx-*
> --- lspcixx-nopatch.txt 2014-10-28 23:26:08.679690828
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/bitrev.h | 28
2 files changed, 29 insertions(+)
create mode 100644
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/bitrev.h | 28
2 files changed, 29 insertions(+)
create mode 100644
Hi
I have read the specifications document to answer your question.
It is better, I think, the host controller is changed into DDR50 mode when
to change the eMMC bus mode into DDR50
There will no problem because the no data line will be used in DDR50 mode
during the transition to HS400.
So we
this change add CONFIG_HAVE_ARCH_BITREVERSE config option,
so that we can use arm/arm64 rbit instruction to do bitrev operation
by hardware.
We also change byte_rev_table[] to be static,
to make sure no drivers can access it directly.
Change bitrev16() bitrev32() to be inline function,
don't
В Вт, 28/10/2014 в 21:12 +0100, Oleg Nesterov пишет:
> On 10/28, Oleg Nesterov wrote:
> >
> > On 10/28, Kirill Tkhai wrote:
> > >
> > > Yes, probe_kernel_read() is in [1/3], but it's not the same as
> > > __probe_kernel_read() for blackfin, for example.
> > >
> > > It's defined as
> > >
> > > long
Thanks, Fengguang.
I've suggested this patch https://lkml.org/lkml/2014/10/28/41.
В Вт, 28/10/2014 в 22:27 +0800, Fengguang Wu пишет:
> Greetings,
>
> 0day kernel testing robot got the below dmesg and the first bad commit is
>
> git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git
On Tue, Oct 28, 2014 at 8:55 PM, James Morris wrote:
> These changes fix a bug in xattr handling, where the evm and ima
> inode_setxattr() functions do not check for empty xattrs being passed from
> userspace (leading to user-triggerable null pointer dereferences).
>
> Please pull.
>
>
> The
This patch simplifies the inline_data usage with the following rule.
1. inline_data is set during the file creation.
2. If new data is requested to be written ranges out of inline_data,
f2fs converts that inode permanently.
3. There is no cases which converts non-inline_data inode to inline_data.
When reading inline data, we should call flush_dcache_page.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/inline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/f2fs/inline.c b/fs/f2fs/inline.c
index d9daf76..d6677d6 100644
--- a/fs/f2fs/inline.c
+++ b/fs/f2fs/inline.c
@@ -57,6 +57,7 @@ int
We should not discard any data protected by the previous checkpoint all
the time.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/segment.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index d391a59..06dda73 100644
--- a/fs/f2fs/segment.c
+++
During the write_checkpoint, we should avoid f2fs_gc trigger to avoid any
filesystem consistency.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/segment.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 21ccc48..d391a59 100644
--- a/fs/f2fs/segment.c
Hello,
I found that ion insert freed-page at the tail of list
and extract at the head.
I think it is good for cache to use the most recently used page
but these pages in pool are not cached memory.
So I'm not sure using hot page is better or not in this case.
What do you think about using hot
Hi,
Sören Brinkmann wrote:
> On Tue, 2014-10-28 at 04:16PM +0100, Lothar Waßmann wrote:
> > Hi,
> >
> > Soren Brinkmann wrote:
> > > Signed-off-by: Soren Brinkmann
> > > ---
> > > changes since RFC:
> > > - use syscon/regmap to access registers in SLCR space
> > > - add pinctrl to zc702 DT
>
On Tue, 2014-10-28 at 10:44 +, Steve Capper wrote:
> On Mon, Oct 27, 2014 at 06:32:41PM -0700, Andrew Morton wrote:
> > On Tue, 28 Oct 2014 12:20:29 +1100 Michael Ellerman
> > wrote:
> >
> > > On Mon, 2014-10-27 at 16:06 -0700, Andrew Morton wrote:
> > > > On Sat, 25 Oct 2014 16:14:19 +0530
Julien,
On Tue, Oct 28, 2014 at 3:36 AM, Julien CHAUVEAU
wrote:
> According to the I2C bus specification, it is required to use pull-up
> resistors
> on the clock and data lines. Probing the I2C busses with i2cdetect results in
> bad results when no devices are connected and no external
On 10/29/2014 01:43 AM, Dmitry Torokhov wrote:
> Expression haptic->pwm_dev->period * haptic->magnitude is of type 'unsigned
> int' and may overflow. We need to convert one of the operands to u64 before
> multiplying, instead of casting result (potentially overflown) to u64.
>
> Reported by
On 10/28/14 at 08:14pm, H. Peter Anvin wrote:
> On 10/28/2014 10:29 AM, Thomas Gleixner wrote:
> > On Tue, 28 Oct 2014, H. Peter Anvin wrote:
> >> On 10/28/2014 04:06 AM, Thomas Gleixner wrote:
>
> The available address we can use is lower than FIXADDR_BOOT_START. So
> We will set
Fix sparse warnings: symbol X was not declared. Should it be static?
Some functions used only in files where they are declared. They can
be static.
Signed-off-by: Anton Saraev
---
drivers/staging/lustre/lnet/selftest/conctl.c| 34
Function lnet_selftest_structure_assertion is never used and can
be removed.
Signed-off-by: Anton Saraev
---
drivers/staging/lustre/lnet/selftest/module.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/staging/lustre/lnet/selftest/module.c
Patch fix simple sparse warnings: make functions static and remove
unused code. I'm doing only little testing: module was loaded properly,
output of lst without real server is the same as before.
Anton Saraev (2):
staging:lustre:lnet:selftest: fix sparse warnings
staging:lustre:lnet:selftest:
Hi all,
Changes since 20141028:
The usb-gadget-fixes tree gained a build failure so I used the version
from next-20141028.
The net-next tree gained a conflict against the net tree.
The bluetooth tree lost its build failure.
The pinctrl tree lost its build failure.
Non-merge commits (relative
The irq-brcmstb-l2 driver has a single dependency on the ARM code, the
do_bad_IRQ macro. Expand this macro in-place so that the driver can be
built on non-ARM platforms.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/irq-brcmstb-l2.c | 7 ---
1 file changed, 4 insertions(+), 3
A couple of accesses to IRQEN (base+0x00) just used "base" directly, so
they would break if IRQEN ever became nonzero. Make sure that all
reads/writes specify the register offset constant.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/irq-bcm7120-l2.c | 6 +++---
1 file changed, 3
This keeps things consistent between the "core" bcm7120-l2 driver and the
helpers in generic-chip.c.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/irq-bcm7120-l2.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-bcm7120-l2.c
This check may be prone to race conditions, e.g.
1) Some external event (e.g. GPIO level) causes an IRQ to become pending
2) Peripheral asserts the L2 IRQ
3) CPU takes an interrupt
4) The event from #1 goes away
5) bcm7120_l2_intc_irq_handle() reads back a 0 status
Unlike the hardware supported
This can compile for MIPS (or anything else) now.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 6f0e80b..6a03c65 100644
--- a/drivers/irqchip/Kconfig
+++
This mask should have been 0x_, not 0x0fff_.
The change should not have an effect on current users (STB) because bits
31:27 are unused.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/irq-bcm7120-l2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The cached value already incorporates irq_fwd_mask, and was saved the
last time an IRQ was enabled/disabled.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/irq-bcm7120-l2.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/irqchip/irq-bcm7120-l2.c
Some chips, such as BCM6328, only require the former driver. Some
BCM7xxx STB configurations only require the latter driver. Treat them
as two separate entities, and update the mach-bcm dependencies to
reflect the change.
Signed-off-by: Kevin Cernekee
---
arch/arm/mach-bcm/Kconfig| 1
This change was just made on bcm7120-l2, so let's keep things consistent
between the two drivers.
Signed-off-by: Kevin Cernekee
---
drivers/irqchip/irq-brcmstb-l2.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/irqchip/irq-brcmstb-l2.c
On big-endian systems readl/writel may perform an unwanted endian swap,
breaking generic-chip.c. Let the platform code opt to use the __raw_
variants by selecting RAW_IRQ_ACCESSORS.
This is required in order for bcm3384 to use GENERIC_IRQ_CHIP. Several
existing irqchip drivers also use the
Most implementations of the bcm7120-l2 controller only have a single
32-bit enable word + 32-bit status word. But some instances have added
more enable/status pairs in order to support 64+ IRQs (which are all
ORed into one parent IRQ input). Make the following changes to allow
the driver to
These changes fix a bug in xattr handling, where the evm and ima
inode_setxattr() functions do not check for empty xattrs being passed from
userspace (leading to user-triggerable null pointer dereferences).
Please pull.
The following changes since commit
This patch adds Power Management support for SAI.
Activate regmap cache with REGCACHE_RBTREE, and use
regmap cache code to save and restore registers in
suspend and resume. The Transmit Control Register
(TCSR) and Receive Control Register(RCSR) should
be volatile registers.
Signed-off-by: Alison
It is reported that Samsung laptops that need to poll events are broken by
the following commit:
Commit 3afcf2ece453e1a8c2c6de19cdf06da3772a1b08
Subject: ACPI / EC: Add support to disallow QR_EC to be issued when SCI_EVT
isn't set
The behaviors of the 2 vendor firmwares are conflict:
1. Acer:
It is reported that the Samsung EC firmware behaves differently than Acer
EC firmware. And then previous 2 commits that fix Acer issues have broken
Samsung hardware.
This patchset fixes the regressions.
Lv Zheng (2):
Revert "ACPI / EC: Add support to disallow QR_EC to be issued before
It is reported that the following commit breaks Samsung hardware:
Commit: 558e4736f2e1b0e6323adf7a5e4df77ed6cfc1a4.
Subject: ACPI / EC: Add support to disallow QR_EC to be issued before
completing previous QR_EC
Which means the Samsung behavior conflicts with the Acer behavior.
1.
On Tue, Oct 28, 2014 at 05:35:34PM +0100, Antoine Tenart wrote:
> The series can be found at:
> git://git.free-electrons.com:users/antoine-tenart/linux.git usb-phy
>
> Changes since v6:
> - rebased on top of v3.18-rc2
>
> Changes since v5:
> - rebased on the latest version of
On Mon, Oct 27, 2014 at 2:46 PM, Joe Perches wrote:
> On Mon, 2014-10-27 at 14:37 +0800, Wang, Yalin wrote:
>> this change add CONFIG_HAVE_ARCH_BITREVERSE config option,
>> so that we can use arm/arm64 rbit instruction to do bitrev operation
>> by hardware.
I don't see the original patch in my
Hi Dmitry,
2014년 10월 29일 01:43에 Dmitry Torokhov 이(가) 쓴 글:
Expression haptic->pwm_dev->period * haptic->magnitude is of type 'unsigned
int' and may overflow. We need to convert one of the operands to u64 before
multiplying, instead of casting result (potentially overflown) to u64.
Reported by
On 29.10.2014 01:52, Oleg Nesterov wrote:
> On 10/28, Kirill Tkhai wrote:
>>
>> Shouldn't we do that in separate patch? How about this?
>
> Up to Peter, but I think a separate patch is fine.
>
>> [PATCH]sched: Remove lockdep check in sched_move_task()
>>
>> sched_move_task() is the only
The flag of SELECTIVE_SUSPEND should be cleared when autoresuming.
Otherwise, when the system suspend and resume occur, it may have
the wrong flow.
Besides, because the flag of SELECTIVE_SUSPEND couldn't be used
to check if the hw enables the relative feature, it should alwayes
be disabled in
Avoid unnecessary behavior when autosuspend occurs during open().
The relative processes should only be run after finishing open().
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/usb/r8152.c
There are unexpected processes when enabling autosuspend.
These patches are used to fix them.
Hayes Wang (3):
r8152: clear SELECTIVE_SUSPEND when autoresuming
r8152: reset tp->speed before autoresuming in open function
r8152: check WORK_ENABLE in suspend function
drivers/net/usb/r8152.c |
If (tp->speed & LINK_STATUS) is not zero, the rtl8152_resume()
would call rtl_start_rx() before enabling the tx/rx. Avoid this
by resetting it to zero.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/usb/r8152.c
> From: Joe Perches [mailto:j...@perches.com]
> > I think the most safe way is change byte_rev_table[] to be satic, So
> > that no driver can access it directly, The build error can remind the
> > developer if they use byte_rev_table[] Directly .
>
> You can do that with your later patch, but the
On 10/28/2014 10:29 AM, Thomas Gleixner wrote:
> On Tue, 28 Oct 2014, H. Peter Anvin wrote:
>> On 10/28/2014 04:06 AM, Thomas Gleixner wrote:
The available address we can use is lower than FIXADDR_BOOT_START. So
We will set the kmap boundary below the FIXADDR_BOOT_START, if
>
> yes. removing line 'hswep_uncore_sbox' also worked as workaround.
> You have an idea what's going on?
Not yet. I don't see it on my own systems, so it's something that's
different on yours.
> I suspect other folks will see the same crash when E5 v3
> become more widespread.
I guess we can
> -Original Message-
> From: Ming Lei [mailto:ming@canonical.com]
> Sent: Monday, October 27, 2014 12:00 AM
>
> You can call fw_lookup_buf() directly, otherwise feel free to add:
>
> Acked-by: Ming Lei
>
Hi Ming Lei,
The fw_lookup_buf() is defined inside the conditional
On Wed, 2014-10-29 at 10:42 +0800, Wang, Yalin wrote:
> > Use the inline function instead of directly indexing the array.
> > This allows some architectures with hardware instructions for bit reversals
> > to eliminate the array.
[]
> > On Sun, 2014-10-26 at 23:46 -0700, Joe Perches wrote:
> > >
On Tue, 2014-10-28 at 13:29 -0700, Randy Dunlap wrote:
> On 10/27/14 06:13, Tomi Valkeinen wrote:
> > I also think the 'depends on BACKLIGHT_CLASS_DEVICE ||
> > BACKLIGHT_CLASS_DEVICE=n' pattern is quite... interesting (i.e. sounds
> > like a hack to me =).
>
> It does exactly what is needed and
On 28.10.2014 23:06, Alex Deucher wrote:
On Mon, Oct 27, 2014 at 10:14 AM, Joe Perches wrote:
Precedence of & and >> is not the same and is not left to right.
shift has higher precedence and should be done after the mask.
Add parentheses around the mask.
Use the already #defined values
在 2014年10月29日 07:46, Dmitry Torokhov 写道:
On Tue, Oct 28, 2014 at 04:51:24PM +0800, Caesar Wang wrote:
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Signed-off-by: zhaoyifeng
Signed-off-by: Caesar Wang
Reviewed-by: Dmitry Torokhov
Added.
Thank you!
Dmitry,
Fixed and sent in patch v16.
在 2014年10月29日 07:46, Dmitry Torokhov 写道:
Hi Caesar,
On Tue, Oct 28, 2014 at 04:51:23PM +0800, Caesar Wang wrote:
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.
User-defined mode refers,TSADC all the control signals
On Tue, Oct 28, 2014 at 10:30:32PM +0200, Pantelis Antoniou wrote:
> ConfigFS lacked binary attributes up until now. This patch
> introduces support for binary attributes in a somewhat similar
> manner of sysfs binary attributes albeit with changes that
> fit the configfs usage model.
>
>
> From: Will Deacon [mailto:will.dea...@arm.com]
> Yup, sorry, I didn't realise this patch covered both architectures. It
> would probably be a good idea to split it into 3 parts: a core part, then
> the two architectural bits.
>
> Will
Ok ,
I will split the patch into three parts,
And send
Hi Rafael,
After merging the pm tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
drivers/of/base.c: In function 'of_property_read_string_array':
drivers/of/base.c:1472:1: warning: control reaches end of non-void function
[-Wreturn-type]
}
^
Introduced by commit
On Tue, Oct 28, 2014 at 03:05:16PM +, Qais Yousef wrote:
> On 10/28/2014 02:13 PM, Greg Kroah-Hartman wrote:
> >On Tue, Oct 28, 2014 at 01:18:28PM +, Qais Yousef wrote:
> >>On 10/28/2014 11:55 AM, Clemens Ladisch wrote:
> >>>Qais Yousef wrote:
> AXD Audio Processing IP performs audio
On 10/28/2014 11:54 PM, Al Viro wrote:
> On Tue, Oct 28, 2014 at 09:13:13PM +, Al Viro wrote:
>
>>
>> We probably ought to split the normal (case-sensitive, no joliet shite) case
>> out and leave it with NULL ->s_d_op, but that'll need to be done carefully,
>> or isofs_cmp() will blow up on
On Tue, Oct 28, 2014 at 04:26:48PM +0100, Tomeu Vizoso wrote:
> There's a substantial window of opportunity from the time the policy objects
> are created until they are initialized, causing this:
>
> [4.651435] [ cut here ]
> [4.651453] WARNING: CPU: 1 PID: 64 at
On Tue, Oct 28, 2014 at 04:26:47PM +0100, Tomeu Vizoso wrote:
> To be used by users of kobject to tell when one hasn't been initialized yet.
>
> Signed-off-by: Tomeu Vizoso
> ---
> include/linux/kobject.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/linux/kobject.h
> Use the inline function instead of directly indexing the array.
>
> This allows some architectures with hardware instructions for bit reversals
> to eliminate the array.
>
> Signed-off-by: Joe Perches
> ---
> On Sun, 2014-10-26 at 23:46 -0700, Joe Perches wrote:
> > On Mon, 2014-10-27 at
This series patchs tested on rk3288 SDK board and pinky-v1,v2 board.
I believe the driver can be used on the rk3288-evb board.
Add this driver, The system will shutdown when
the thermal temperture over 120C.If for some reason we are unable to
shut it down in orderly fashion (kernel is stuck
This patch changes a dtsi file to contain the thermal data
on RK3288 and later SoCs. This data will
enable a thermal shutdown over 120C.
Signed-off-by: Caesar Wang
Reviewed-by: Dmitry Torokhov
---
arch/arm/boot/dts/rk3288-thermal.dtsi | 65 +++
1 file changed,
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Signed-off-by: zhaoyifeng
Signed-off-by: Caesar Wang
Reviewed-by: Dmitry Torokhov
---
.../bindings/thermal/rockchip-thermal.txt | 62 ++
1 file changed, 62 insertions(+)
create
when a thermal temperature over TSHUT.Default to via
CRU reset the entire chip on rk3288-evb Board,
TSHUT is low active on rk3288-evb board.
Signed-off-by: Caesar Wang
Reviewed-by: Dmitry Torokhov
---
arch/arm/boot/dts/rk3288-evb.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git
This patch is depend on rk3288-thermal.dtsi,or
it will compile error.
If for some reason we are unable to shut it down
in orderly fashion (kernel is stuck holding a lock or
similar), then hardware TSHUT will reset it.
If the temperature over a period of time High,over 125C
the resulting TSHUT
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.
User-defined mode refers,TSADC all the control signals entirely by
software writing to register for direct control.
Automaic mode refers to the module automatically poll TSADC output,
and the results were
On Wed, Oct 29, 2014 at 5:47 AM, Maxime Ripard
wrote:
> Hi Roman,
>
> Thanks for your patches
>
> On Mon, Oct 27, 2014 at 10:43:01PM +0100, Roman Byshko wrote:
>> The driver for sun4i USB phys currently supports
>> only phy1 and phy2 which are used for USB host
>> controllers. This patch adds
On Mon, Oct 27, 2014 at 9:00 PM, Linus Walleij wrote:
> On Thu, Oct 9, 2014 at 1:46 AM, RR wrote:
>> On Wed, Oct 8, 2014 at 12:18 AM, Alexandre Courbot wrote:
>>> On Wed, Oct 8, 2014 at 4:09 PM, Muthu Mani wrote:
>
> > +static int cy_gpio_direction_output(struct gpio_chip *chip,
> > +
Signed-off-by: Wenyou Yang
---
drivers/mmc/host/atmel-mci.c | 116 ++
1 file changed, 94 insertions(+), 22 deletions(-)
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 0b9ddf8..e9d32d0 100644
---
On Mon, 2014-10-27 at 23:10 +, Luck, Tony wrote:
> + m->mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
> + severity = mce_severity(m, mca_cfg.tolerant, NULL);
>
> This seems a big hack to make mce_severity() work when called from
> CMCI context (when MCG_STATUS register is not set).
On Tue, Oct 28, 2014 at 6:13 PM, Paul E. McKenney
wrote:
> Hello!
>
> This series updates RCU handling in signals:
>
> 1. Prevents a possible very long RCU read-side critical section
> in kill_pid_info().
>
> 2. Explain why the "obviously buggy" freeing of sighand by
>
[ CC Sudeep Holla, Daniel Lezcano, LKML ]
On Wed, Oct 29, 2014 at 09:12:58AM +0900, Simon Horman wrote:
> On Tue, Oct 28, 2014 at 10:32:32AM +0100, Geert Uytterhoeven wrote:
> > Hi Simon,
> >
> > On Tue, Oct 28, 2014 at 10:23 AM, Simon Horman wrote:
> > > On Tue, Oct 28, 2014 at 08:59:28AM
Hi,
On 10/29/2014 08:52 AM, 유한경 wrote:
> Hi I'm Hankyung Yu
>
> I will answer instead Chanho Min
>
> After mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
>
> Host controller set to SDR transfer
>
> so is to change to a DDR transfer mode.
As commit message was mentioned, I have checked the
On 10/28/2014 04:10 PM, Rafael J. Wysocki wrote:
On Monday, October 27, 2014 07:10:26 PM Guenter Roeck wrote:
On 10/27/2014 05:26 PM, Rafael J. Wysocki wrote:
On Monday, October 27, 2014 08:55:41 AM Guenter Roeck wrote:
Register with kernel power-off handler instead of setting pm_power_off
On 10/29/2014 12:29 AM, Daniel Lezcano wrote:
> On 10/28/2014 04:51 AM, Preeti Murthy wrote:
>> Hi Daniel,
>>
>> On Thu, Oct 23, 2014 at 2:31 PM, Daniel Lezcano
>> wrote:
>>> When the pmqos latency requirement is set to zero that means "poll in
>>> all the
>>> cases".
>>>
>>> That is correctly
Good day,
I have an oil exportation proposition contract for you.If you don't mind,
reply my email for full details of contract proposal.
Sincerely,
Adel Salman
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On Tue, Sep 30, 2014 at 10:48:36AM -0700, Guenter Roeck wrote:
> Register with kernel restart handler instead of setting arm_pm_restart
> directly.
>
> Cc: Marc Carino
> Cc: Brian Norris
> Signed-off-by: Guenter Roeck
Tested on top of linux-next:
Tested-by: Brian Norris
Acked-by: Brian
On 10/28/2014 11:58 PM, Daniel Lezcano wrote:
> On 10/28/2014 08:01 AM, Preeti Murthy wrote:
>> On Thu, Oct 23, 2014 at 2:31 PM, Daniel Lezcano
>> wrote:
>>> In the current code, the check to reflect or not the outcoming state
>>> is done
>>> against the idle state which has been chosen and its
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