On Sun, Jan 18, 2015 at 11:13 PM, Hayes Wang wrote:
> If a error occurs when submitting rx, skip the remaining submissions
> and try to submit them again next time.
>
> Signed-off-by: Hayes Wang
> ---
> drivers/net/usb/r8152.c | 15 +--
> 1 file changed, 13 insertions(+), 2
On 9 January 2015 at 15:24, pi-cheng.chen wrote:
> Currently the DT based cpufreq driver is missing some way to check which
> CPUs share clocks. In the 1st patch, CPU clock/power domain information is
> added to the platform_data of cpufreq-dt so that cpufreq-dt driver could
> check which CPUs
This patch adds support for Synopsis DesignWare USB3 IP Core found
on Fujitsu Socs.
Signed-off-by: Sneeker Yeh
---
.../devicetree/bindings/usb/fujitsu-dwc3.txt | 33
drivers/usb/dwc3/Kconfig | 11 ++
drivers/usb/dwc3/Makefile |
Add a DTS file for MINIX NEO-X8, a Meson8-based digital media player.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/meson8-minix-neo-x8.dts | 128 ++
2 files changed, 129 insertions(+)
Add MINIX Technology Limited to the list of device tree vendor
prefixes. The company manufactures digital media players and mini-ITX
motherboards.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
This series adds support for MINIX NEO-X8, a digital media player
based on a Amlogic S802 (Meson8) SoC. It depends on the pinctrl
support for Meson8 submitted here:
https://lkml.org/lkml/2015/1/17/87
Beniamino Galvani (3):
of: Add vendor prefix for MINIX
of: Define board compatible for
Document the board compatible property for MINIX NEO-X8, a
Meson8-based digital media player. While at it, move the other
existing Meson board compatible to amlogic.txt.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
Documentation/devicetree/bindings/arm/amlogic.txt | 4
From: Arun Ramamurthy arunr...@broadcom.com
Added support for cases where one controller is connected
to multiple phys
Signed-off-by: Arun Ramamurthy arunr...@broadcom.com
Reviewed-by: Ray Jui r...@broadcom.com
Reviewed-by: Scott Branden sbran...@broadcom.com
Tested-by: Scott Branden
From: Arun Ramamurthy arunr...@broadcom.com
Added support for cases where one controller is connected
to multiple phys.
Signed-off-by: Arun Ramamurthy arunr...@broadcom.com
Reviewed-by: Ray Jui r...@broadcom.com
Reviewed-by: Scott Branden sbran...@broadcom.com
Tested-by: Scott Branden
From: Arun Ramamurthy arun.ramamur...@broadcom.com
Broadcom has a chip where one ehci and ohci controller are connected
to three separate phys. This patch allows each phy to be controlled
separately.
Changes in v2:
- removed x character mistakenly introduced by manual edit of diff file
Changes
1) Socket addresses returned in the error queue need to be fully
initialized before being passed on to userspace, fix from
Willem de Bruijn.
2) Interrupt handling fixes to davinci_emac driver from Tony
Lindgren.
3) Fix races between receive packet steering and cpu hotplug, from
Eric
James Bottomley james.bottom...@hansenpartnership.com writes:
On Mon, 2015-01-19 at 16:21 +1030, Rusty Russell wrote:
Masami Hiramatsu masami.hiramatsu...@hitachi.com writes:
(2015/01/19 1:55), James Bottomley wrote:
From: James Bottomley jbottom...@parallels.com
After e513cc1 module:
(2015/01/20 9:45), Rusty Russell wrote:
James Bottomley james.bottom...@hansenpartnership.com writes:
On Mon, 2015-01-19 at 16:21 +1030, Rusty Russell wrote:
Masami Hiramatsu masami.hiramatsu...@hitachi.com writes:
(2015/01/19 1:55), James Bottomley wrote:
From: James Bottomley
Checkpatch doesn't like kmalloc with multiply very much:
drivers/staging/comedi/drivers/das1800.c:1377: WARNING: Prefer kmalloc_array
over kmalloc with multiply
So this patch swaps that use out for kmalloc_array instead.
Signed-off-by: Chase Southwood chase.southw...@gmail.com
---
On 2015/1/12 19:24, Masami Hiramatsu wrote:
(2015/01/05 21:31), Wang Nan wrote:
In original code, the probed instruction doesn't get optimized after
echo 0 /sys/kernel/debug/kprobes/enabled
echo 1 /sys/kernel/debug/kprobes/enabled
This is because original code checks kprobes_all_disarmed
The Kconfig text says it all, with The EISA bus saw limited use
between 1988 and 1995 when it was made obsolete by the PCI bus.
That means typically 486/586 CPUs in the 33-166MHz range, and
8-64MB of installed RAM in typical EISA machines of that era.
With the additional cost, they were also
When we deleted MCA bus support close to three years ago, Linus ack'd
it and said Maybe we could some day remove EISA support too.. [1]
For the older arch who are frozen in time (from a hardware perspective)
they might not be ready/willing to drop EISA support yet. However that
does not mean
Use hierarchy irqdomain to manage Hypertransport interrupts.
We have slightly changed the architecture interfaces to support htirq
PCI driver, it should be safe because currently Hypertransport interrupt
is only enabled on x86 platforms.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc:
Now MSI interrupt has been converted to new hierarchy irqdomain
interfaces, so kill legacy MSI related code.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Acked-by: Joerg Roedel jroe...@suse.de
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Greg
Hi Ulf,
Today's linux-next merge of the mmc-uh tree got a conflict in
drivers/mmc/host/sunxi-mmc.c between commit 6c09bb851e57 (mmc: sunxi:
Convert MMC driver to the standard clock phase API) from the sunxi
tree and commit 776e24c502da (mmc: sunxi: Removing unused code) from
the mmc-uh tree.
I
There was one instance of a VLB card which would emulate
an EISA ID response ID when primed with a certain I/O
handshake.
Since (a) VLB was largely confined to 486 vintage motherboards
from the early/mid 1990s and (b) there was only one card that
needed this and (c) we are dropping EISA support
On 2015/1/19 19:09, Paul E. McKenney wrote:
On Mon, Jan 19, 2015 at 05:04:29PM +0800, Zhang Zhen wrote:
On 2015/1/19 16:42, Paul E. McKenney wrote:
On Mon, Jan 19, 2015 at 04:07:15PM +0800, Zhang Zhen wrote:
Hi,
On my x86_64 qemu virtual machine, RCU CPU stall console spews may
lead to soft
This routine has been around for over a decade, but with EISA
being dead and abandoned for about twice that long, the name can
be kind of confusing. The function is going at the PIC Edge/Level
Configuration Registers (ELCR), so rename it as such and mentally
decouple it from the long since dead
On Sun, Jan 18, 2015 at 11:56:03PM +0100, Stephan Mueller wrote:
The cipher registered as __driver-gcm-aes-aesni is never intended
to be used directly by any caller. Instead it is a service mechanism to
rfc4106-gcm-aesni.
The kernel crypto API unconditionally calls the registered setkey
On Mon, Jan 19, 2015 at 12:13:39AM +0100, Stephan Mueller wrote:
As documented in Documentation/kernel-doc-nano-HOWTO.txt lines
terminated with a colon are treated as headings.
The current layout of the documentation when compiling the kernel
crypto API DocBook documentation is messed up by
On Fri, Jan 16, 2015 at 09:16:00AM +0200, Michael S. Tsirkin wrote:
On Fri, Jan 16, 2015 at 10:21:09AM +1100, Herbert Xu wrote:
On Thu, Jan 15, 2015 at 01:50:42PM +0200, Michael S. Tsirkin wrote:
makes code look a bit prettier.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
Hi, Yang,
Could you please have a look at this patch set?
Your comment is very appreciated!
Thanks,
Wincy
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On Tue, Jan 20, 2015 at 04:54:44AM +0100, Stephan Mueller wrote:
How would the fail manifest itself? If algif_aead would be present, user
space could use the __driver implementation regardless of a setkey or
authsize callback by simply calling encrypt/decrypt. Would the error be
limited to
On Mon, 19 Jan 2015, Paul Gortmaker wrote:
The Kconfig text says it all, with The EISA bus saw limited use
between 1988 and 1995 when it was made obsolete by the PCI bus.
That means typically 486/586 CPUs in the 33-166MHz range, and
8-64MB of installed RAM in typical EISA machines of that
Hi Paul,
Today's linux-next merge of the audit tree got a conflict in fs/exec.c
between commit 51f39a1f0cea (syscalls: implement execveat() system
call) from Linus' tree and commit 5dc5218840e1 (fs: create proper
filename objects using getname_kernel()) from the audit tree.
I fixed it up (see
Hi Paul,
Today's linux-next merge of the audit tree got a conflict in
include/linux/audit.h between commit 041d7b98ffe5 (audit: restore
AUDIT_LOGINUID unset ABI) from Linus' tree and commit e80da768eae4
(audit: remove vestiges of vers_ops) from the audit tree.
I fixed it up (see below) and can
Ricardo == Ricardo Ribalda Delgado ricardo.riba...@gmail.com writes:
Since d621e8bae5ac9c67 (Create of_mm_gpiochip_remove), there is a
counterpart for of_mm_gpiochip_add.
This patch implements the remove function of the driver making use of
it.
Cc: Linus Walleij
On Tue, Jan 20, 2015 at 04:31:55AM +0800, Greg Kroah-Hartman wrote:
On Mon, Jan 19, 2015 at 09:19:06PM +0100, Johannes Stezenbach wrote:
These two statements somehow contradict. From my admittedly very
limited experience, I never used D-Bus because it did not
fit my usage scenarios: I never
On Mon, Jan 19, 2015 at 01:45:28PM +0100, Peter Zijlstra wrote:
On Wed, Nov 26, 2014 at 08:44:05AM +0800, Wanpeng Li wrote:
The overload indicator is used for knowing when we can totally avoid load
balancing to a cpu that is about to go idle. We can avoid load balancing
when no cpu has cfs task
On Mon, Jan 19, 2015 at 04:08:19PM -0500, Benjamin Tissoires wrote:
On Fri, Dec 19, 2014 at 4:06 AM, Henrik Rydberg rydb...@bitmath.org wrote:
My ISP finally gave up on the old mail address, so I am moving things
over to bitmath.org instead. Also change the status fields to better
reflect
Dear Recipient,
You have been awarded the sum of 8,000,000.00 (Eight Million Pounds sterling)
with reference number 77100146 by office of the ministry of finance UK.Send us
your personal details to deliver your funds.
Gloria Peter
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Qualcomm PMIC Arbiter version-2 changes from version-1 are:
- Some diffrent register offsets.
- New channel register space, one per PMIC peripheral (ppid).
All tx tarffic uses these channels.
- New observer register space. All rx trafic uses this space.
- Diffrent command format for spmi
Oleg Nesterov o...@redhat.com writes:
On 01/17, Rasmus Villemoes wrote:
Using kasprintf to get the function name makes us look up the name
twice, along with all the vsnprintf overhead of parsing the format
string etc. It also means there is an allocation failure case to deal
with. Since
From: Hayes Wang hayesw...@realtek.com
Date: Tue, 20 Jan 2015 02:48:50 +
+ urb-actual_length = 0;
+ list_add_tail(agg-list, next);
Do you need a spin_lock_irqsave(tp-rx_lock, flags) around this?
Indeed, and rtl_start_rx() seems to also
On Mon, Jan 19, 2015 at 11:04:27PM +, Russell King - ARM Linux wrote:
On Tue, Jan 20, 2015 at 03:01:42AM +0800, Greg Kroah-Hartman wrote:
On Mon, Jan 19, 2015 at 07:55:56PM +0100, Wolfram Sang wrote:
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index
Use common MSI interfaces to simplify DMAR/HPET driver implementation.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Bjorn
Now there's no user of irq_remapping_print_chip(), so kill it.
Signed-off-by: Jiang Liu jiang@linux.intel.com
---
arch/x86/include/asm/irq_remapping.h |2 --
drivers/iommu/irq_remapping.c| 13 -
2 files changed, 15 deletions(-)
diff --git
Introduce several helper functions, which will be used to enable
hierarchy irqdomain for IOAPIC.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman
Implement required callbacks to prepare for enabling hierarchy irqdomain
on IOAPICs. Later we will clean up IOAPIC code a lot by using hierarchy
irqdomain framework.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck
Simplify the way to print IOAPIC entry content, so we could kill
native_io_apic_print_entries(), intel_ir_io_apic_print_entries()
and x86_io_apic_ops.print_entries() later.
Folded a patch from Thomas to fix errors in printed pin attributes,
From: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
Remove the function is_apbt_capable() that is not used anywhere.
This was partially found by using a static code analysis program called
cppcheck.
Signed-off-by: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
Now there's no user of pre_init_apic_IRQ0(), so kill it.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Bjorn Helgaas
From: Thomas Gleixner t...@linutronix.de
MID has no PIC, but depending on the platform it requires the
abt_timer, which is connected to irq0. The timer is set up at
late_time_init().
But, looking at the MID code it seems, that there is no reason to do
so. The only code which might need the timer
Introduce helper functions to manipulate struct irq_alloc_info for IOAPIC.
Also add extra parameter to IOAPIC interfaces to prepare for hierarchy
irqdomain. Function mp_set_gsi_attr() will be killed once we have
switched to hierarchy irqdomain.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Correctly indent code in function sfi_parse_mtmr().
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: H. Peter Anvin
On Mon, Jan 19, 2015 at 6:58 PM, Masami Hiramatsu
masami.hiramatsu...@hitachi.com wrote:
it's done already... one can do the same skb-dev-name logic
in kprobe attached program... so from bpf program point of view,
tracepoints and kprobes feature-wise are exactly the same.
Only input is
Am Dienstag, 20. Januar 2015, 14:37:05 schrieb Herbert Xu:
Hi Herbert,
On Tue, Jan 20, 2015 at 04:35:41AM +0100, Stephan Mueller wrote:
This in turn would then turn the __driver implementation into a full
GCM implementation. That would mean that we should rename it from
__driver into gcm(aes)
Dear RT Folks,
I'm pleased to announce the 3.12.36-rt50 stable release.
This release is just an update to the new stable 3.12.36 version
and no RT specific changes have been made.
You can get this release via the git tree at:
Dear RT Folks,
I'm pleased to announce the 3.10.65-rt69 stable release.
This release is just an update to the new stable 3.10.65 version
and no RT specific changes have been made.
You can get this release via the git tree at:
Dear RT Folks,
I'm pleased to announce the 3.14.29-rt26 stable release.
This release is just an update to the new stable 3.14.29 version
and no RT specific changes have been made.
You can get this release via the git tree at:
Dear RT Folks,
I'm pleased to announce the 3.4.105-rt129 stable release.
This release is just an update to the new stable 3.4.105 version
and no RT specific changes have been made.
You can get this release via the git tree at:
On Tue, Jan 20, 2015 at 03:01:42AM +0800, Greg Kroah-Hartman wrote:
On Mon, Jan 19, 2015 at 07:55:56PM +0100, Wolfram Sang wrote:
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 39d25a8cb1ad..15cc5902cf89 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
Hello Peter
-hwirq = irq_of_parse_and_map(np, 0);
-if (hwirq == NO_IRQ)
+mpc8xxx_gc-irqn = irq_of_parse_and_map(np, 0);
+if (mpc8xxx_gc-irqn == NO_IRQ)
return 0;
With this return 0 converted to do of_mm_gpiochip_remove():
Are you sure? The driver
Dear Recipient,
You have been awarded the sum of 8,000,000.00 (Eight Million Pounds sterling)
with reference number 77100146 by office of the ministry of finance UK.Send us
your personal details to deliver your funds.
Gloria Peter
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Hello Peter
I thought the logic behind the original driver was:
1) Create gpiochip so it can be used by other modules/userland
2) if there is also a irq available for it, create a irqdomain.
otherwise continue.
I can change the code so it does not continue, and exit cleanly if the
irqdomain
On Thu, Jan 15, 2015 at 5:27 PM, Viet Nga Dao vn...@altera.com wrote:
On Tue, Jan 13, 2015 at 11:33 AM, Brian Norris
computersforpe...@gmail.com wrote:
On Thu, Dec 18, 2014 at 12:23:16AM -0800, vn...@altera.com wrote:
From: Viet Nga Dao vn...@altera.com
Altera EPCQ Controller is a soft IP
When building perf for arm64 I hit a warning (and be treated as an
error) like below:
aarch64-oe-linux-gcc -o .../scripts/perl/Perf-Trace-Util/Context.o -c
-Wbad-function-cast \
... scripts/perl/Perf-Trace-Util/Context.c
In file included from
This patchset adds support for the low power audio subsystem (LPASS)
clock controller hardware. I split out the #define patch for IPQ so that
it can go through the clock tree and the arm-soc tree in parallel
if desired.
Changes since v2:
* Rebased onto v3.19-rc2
* One fix to a clock parent name
Some clock drivers want to find the closest rate on the input of
a mux instead of a rate that's less than or equal to the desired
rate. Add a generic mux function to support this.
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
drivers/clk/clk.c| 47
Some devices don't use mmio to interact with dividers. Split out the
logic from the register read/write parts so that we can reuse the
division logic elsewhere.
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
drivers/clk/clk-divider.c| 212 ++-
Add support for muxes that use regmap instead of readl/writel
directly. We don't support as many features as clk-mux.c, but
this is good enough to support getting and setting parents.
Adding a table based lookup can be added in the future if needed.
Signed-off-by: Stephen Boyd
On 2015/1/20 5:10, Dev, Vasu wrote:
-Original Message-
From: ethan zhao [mailto:ethan.z...@oracle.com]
Sent: Friday, January 16, 2015 7:01 PM
To: Kirsher, Jeffrey T
Cc: Dev, Vasu; Ethan Zhao; Ronciak, John; Brandeburg, Jesse; Allan, Bruce W;
Wyborny, Carolyn; Skidmore, Donald C; Rose,
Convert IOAPIC driver to support and use hierarchy irqdomain interfaces.
It's a little big, but it always break bisectings if we split it into
multiple patches.
Fold in a patch from Andy Shevchenko andriy.shevche...@linux.intel.com
to make it bisectable.
http://lkml.org/lkml/2014/12/10/622
To support legacy ISA IRQs, we need to preallocate irq_cfg structures
for legacy ISA IRQs. Refine the way to allocate irq_cfg for legacy ISA
IRQs, so it's more friend to hierarchy irqdomain implementation.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk
On Mon, 2015-01-19 at 09:35 -0700, Shuah Khan wrote:
On 01/18/2015 05:35 PM, Michael Ellerman wrote:
On Fri, 2015-01-16 at 10:46 -0700, Shuah Khan wrote:
On 01/09/2015 02:06 AM, Michael Ellerman wrote:
This adds make install support to selftests. The basic usage is:
$ cd
On Tue, Jan 20, 2015 at 04:35:41AM +0100, Stephan Mueller wrote:
This in turn would then turn the __driver implementation into a full GCM
implementation. That would mean that we should rename it from __driver
into gcm(aes) / gcm-aesni.
No you shouldn't because it'll fail in interrupt
Ricardo == Ricardo Ribalda Delgado ricardo.riba...@gmail.com writes:
This way we do not need to transverse the device tree manually.
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Alexandre Courbot gnu...@gmail.com
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring
Hi Tony,
Today's linux-next merge of the omap tree got a conflict in
arch/arm/boot/dts/Makefile between commit cb612390e546 (ARM: dts: Only
build dtb if associated Arch and/or SoC is enabled) from the arm-soc
tree and commit ac7452cee743 (ARM: dts: Add minimal support for
dm8168-evm) from the
Hello, Ingo,
The changes in this series include:
1. Documentation updates. These were posted to LKML at
https://lkml.org/lkml/2015/1/7/496.
2. Miscellaneous fixes. These were posted to LKML at
https://lkml.org/lkml/2015/1/7/507.
3. Preemptible-RCU fixes,
On Tue, Jan 20, 2015 at 12:38:12AM +0100, Johannes Stezenbach wrote:
On Tue, Jan 20, 2015 at 04:31:55AM +0800, Greg Kroah-Hartman wrote:
On Mon, Jan 19, 2015 at 09:19:06PM +0100, Johannes Stezenbach wrote:
These two statements somehow contradict. From my admittedly very
limited
On Sun, Jan 18, 2015 at 8:39 PM, Ricardo Ribalda Delgado
ricardo.riba...@gmail.com wrote:
This way we do not need to transverse the device tree manually.
... and this makes things much more legible.
Acked-by: Alexandre Courbot acour...@nvidia.com
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(2015/01/07 22:40), Jon Medhurst (Tixy) wrote:
I think that the patches up to 09/11 inclusive have been though more
that enough review and revisions to think about getting them merged,
there doesn't seem much point in continuously resending them whilst new
features are built on top of them.
Currently Xen Domain0 has special treatment for ACPI SCI interrupt,
that is initialize irq for ACPI SCI at early stage in a special way as:
xen_init_IRQ()
-pci_xen_initial_domain()
-xen_setup_acpi_sci()
Allocate and initialize irq for ACPI SCI
Hi Thomas,
This patch set includes three hotfixes related Xen IRQ for v3.19.
Sorry for the long delay to get these two regressions fixed, it really
cost me some time to read and understand Xen IRQ code.
Patch 1 fixes the failure to register ACPI SCI interrupt on Xen
domain0 by reworking
Xen pciback driver assumes that pci_dev-irq won't change after calling
pci_disable_device(). But commit cffe0a2b5a34c95a4dadc9ec7132690a5b0f6687
(x86, irq: Keep balance of IOAPIC pin reference count) frees irq
resources and resets pci_dev-irq to zero when pci_disable_device() is
called.
So this
Xen overrides __acpi_register_gsi and leaves __acpi_unregister_gsi as is.
That means, an IRQ allocated by acpi_register_gsi_xen_hvm() or
acpi_register_gsi_xen() will be freed by acpi_unregister_gsi_ioapic(),
which may cause undesired effects. So override __acpi_unregister_gsi to
NULL for safety.
On 2015年01月19日 18:42, Catalin Marinas wrote:
On Sun, Jan 18, 2015 at 06:25:53AM +, Hanjun Guo wrote:
On 2015年01月16日 17:49, Catalin Marinas wrote:
On Wed, Jan 14, 2015 at 03:04:54PM +, Hanjun Guo wrote:
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -10,6 +10,7 @@
*
Hi all,
The generic hierarchy irqdomain and stacked irqchip implementation
has been merged into v3.19, so this patch set converts x86 interupt
management to hierarchy irqdomain and stacked irqchip. I will send out
another following-on patch set to clean up code and interfaces obseleted
by
Prepare for support hierarchy irqdomain by changing function prototypes,
should be no function changes.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Acked-by: Joerg Roedel jroe...@suse.de
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Greg
On Wed, Jan 14, 2015 at 11:31:47AM +, Will Deacon wrote:
Hi Oleg,
On Tue, Jan 13, 2015 at 06:45:10PM +, Oleg Nesterov wrote:
On 01/13, Will Deacon wrote:
1. Does smp_mb__before_spinlock actually have to order prior loads
against later loads and stores?
Wincy Van wrote on 2015-01-20:
Hi, Yang,
Could you please have a look at this patch set?
Your comment is very appreciated!
Sure. I will take a look.
Thanks,
Wincy
Best regards,
Yang
This patch add new devfreq_event class for devfreq_event device which provide
raw data (e.g., memory bus utilization/GPU utilization). This raw data from
devfreq_event data would be used for the governor of devfreq subsystem.
- devfreq_event device : Provide raw data for governor of
On Mon, Jan 19, 2015 at 9:40 AM, Josh Boyer jwbo...@fedoraproject.org wrote:
On Mon, Jan 19, 2015 at 9:57 AM, Mathias Nyman
mathias.ny...@linux.intel.com wrote:
On 19.01.2015 15:47, Josh Boyer wrote:
On Mon, Jan 19, 2015 at 8:33 AM, Greg KH gre...@linuxfoundation.org wrote:
On Mon, Jan 19,
Hi Linus:
This push fixes a regression that arose from the change to add
a crypto prefix to module names which was done to prevent the
loading of arbitrary modules through the Crypto API. In particular,
a number of modules were missing the crypto prefix which meant
that they could no longer be
By the time we wake up and get the lock after being asleep
in the slowpath, we better be running. As good practice,
be explicit about this and avoid any mischief.
Signed-off-by: Davidlohr Bueso dbu...@suse.de
---
kernel/locking/mutex.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
(2015/01/20 5:48), Alexei Starovoitov wrote:
On Mon, Jan 19, 2015 at 1:52 AM, Masami Hiramatsu
masami.hiramatsu...@hitachi.com wrote:
If we can write the script as
int bpf_prog4(s64 write_size)
{
...
}
This will be much easier to play with.
yes. that's the intent for user space to
debugfs/kprobes/enabled doesn't work correctly on optimized kprobes.
Masami Hiramatsu has a test report on x86_64 platform:
https://lkml.org/lkml/2015/1/19/274
This patch forces it to unoptimize kprobe if kprobes_all_disarmed
is set. It also checks the flag in unregistering path for skipping
On 2015/1/19 22:06, Don Zickus wrote:
On Mon, Jan 19, 2015 at 05:04:29PM +0800, Zhang Zhen wrote:
Did you really intend to acquire the same spinlock twice in a row,
forcing a self-deadlock? If not, I of course suggest changing the second
spin_lock() to spin_unlock().
Yes, i acquire the
Enhance UV code to support hierarchy irqdomain, it helps to make
the architecture more clear.
We should construct hwirq based on mmr_blade and mmr_offset, but
mmr_offset is type of unsigned long, it may exceed the range of
irq_hw_number_t. So help about the way to construct hwirq based
on
Refine the interfaces to create IRQ for DMAR unit. It's a preparation
for converting DMAR IRQ to hierarchy irqdomain on x86.
It also moves dmar_alloc_hwirq()/dmar_free_hwirq() from irq_remapping.h
to dmar.h. They are not irq_remapping specific.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Enhance DMAR code to support hierarchy irqdomain, it helps to make
the architecture more clear.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman
Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips, they
will be used to share common code later.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg
Function irq_chip_compose_msi_msg() can achieve the same goal as
msi_update_msg(), so kill msi_update_msg().
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg
Some irq_chip names use underscore, others use hyphen. So normalize them
to use hythen as separator.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman
Simplify the way to deal with remapped MSI interrupts, so we could
kill irq_chip.irq_print_chip later.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Cc: Konrad Rzeszutek Wilk konrad.w...@oracle.com
Cc: Tony Luck tony.l...@intel.com
Cc: Joerg Roedel j...@8bytes.org
Cc: Greg Kroah-Hartman
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