Signed-off-by: Finn Thain fth...@telegraphics.com.au
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org
---
This is intended to improve code style and not affect code behaviour.
I've tested this on a Quadra 650.
I don't know the meanings of the 4 undocumented write protect register
bits 0x55, so
On powerpc, setting CONFIG_NVRAM=n builds a kernel with no NVRAM support.
Setting CONFIG_NVRAM=m enables the /dev/nvram misc device module without
enabling NVRAM support in drivers. Setting CONFIG_NVRAM=y enables the
misc device (built-in) and also enables NVRAM support in drivers.
m68k shares
Adopt the existing *_read_byte and *_write_byte naming convention.
Rename via_pram_readbyte and via_pram_writebyte to avoid confusion.
Adjust calling conventions of mac_pram_* functions to match the
arch_nvram_ops struct methods.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
Acked-by:
The generic NVRAM module, drivers/char/generic_nvram, implements a
/dev/nvram misc device. It is used only by 32-bit PowerPC platforms and
isn't generic enough to be more widely used.
The RTC NVRAM module, drivers/char/nvram, also implements a /dev/nvram
misc device. It is used by x86, ARM and
Switch PPC32 kernels from the generic_nvram module to the nvram module.
Also fix a theoretical bug where CHRP omits the chrp_nvram_init()
call when CONFIG_NVRAM_MODULE=m.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
The change in the name of the module is visible to userspace. The
Atari RTC NVRAM has a checksum so implement the remaining arch_nvram_ops
methods for the set_checksum and initialize ioctls. Enable
CONFIG_HAVE_ARCH_NVRAM_OPS.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org
---
This re-enables the nvram
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
drivers/char/nvram.c |1 +
1 file changed, 1 insertion(+)
Index: linux/drivers/char/nvram.c
===
--- linux.orig/drivers/char/nvram.c 2015-08-23 20:41:04.0
New revisions of UFS host controller supports the new UniPro
hardware controller (referred as QUniPro). This patch adds
the support to enable this new UniPro controller hardware.
This change also adds power optimization for bus scaling feature,
as well as support for HS-G3 power mode.
V3: fixes a few minor issues.
V2: fixes a few issues of unnecessary EXPORT_SYMBOL,
types of parameters in routine definition,
build errors in case CONFIG_PM is not defined and some
other minor fixes.
Yaniv Gardi (8):
phy: qcom-ufs: fix build error when the component is built as a module
On Fri, Aug 21, 2015 at 02:01:59AM +0300, Laurent Pinchart wrote:
How is 64 bit DMA addressing implemented ? Can you use a 64-bit VDMA on
a 32- bit platform with LPAE ? Can you use a 32-bit VDMA on a 64-bit
platform ? Given that VDMA is an IP core you can instantiate in the
On 15-08-22 18:54:28, Stefan Agner wrote:
On 2015-08-21 06:26, Sanchayan Maity wrote:
Add device tree node for touchscreen support on Colibri VF50. The
touchscreen functionality on VF50 uses the ADC channels of Vybrid
and some GPIOs. Also add pinctrl nodes for proper pinmux.
* Pavel Machek pa...@ucw.cz wrote:
On Fri 2015-08-21 19:53:34, Chen Yu wrote:
A bug is reported(https://bugzilla.redhat.com/show_bug.cgi?id=1227208)
that, after resuming from S3, CPU is working at a low speed.
After investigation, it is found that, BIOS has modified the value
of
* Stas Sergeev s...@list.ru wrote:
Also, the fact that dosemu already have that functionality,
doesn't mean it will not use the new API - it actually will.
So if dosemu makes use of the new facility then sure, I'm not
against it at all!
Thanks,
Ingo
--
To unsubscribe from this list:
On Sun 2015-08-23 08:20:33, Ingo Molnar wrote:
* Pavel Machek pa...@ucw.cz wrote:
On Fri 2015-08-21 19:53:34, Chen Yu wrote:
A bug is reported(https://bugzilla.redhat.com/show_bug.cgi?id=1227208)
that, after resuming from S3, CPU is working at a low speed.
After investigation, it
Architecture specific code for i386 and x86_64 was unified and merged to
the arch/x86. This patch fix old path of x86 architecture in a comment
from the arch/arm64/include/asm/fixmap.h.
Signed-off-by: Alexander Kuleshov kuleshovm...@gmail.com
---
arch/arm64/include/asm/fixmap.h | 2 +-
1 file
On Tue, Aug 18, 2015 at 02:49:09PM +0100, Jon Hunter wrote:
@@ -1543,7 +1531,7 @@ static int tegra_dma_pm_suspend(struct device *dev)
int ret;
/* Enable clock before accessing register */
- ret = tegra_dma_runtime_resume(dev);
+ ret = pm_runtime_get_sync(dev);
why is
* George Spelvin li...@horizon.com wrote:
Ingo Molnar mi...@kernel.org wrote:
I think this is too complex.
How about something simple like the patch below (on top of the third patch)?
It makes the vmalloc info transactional - /proc/meminfo will always print a
consistent set of
On Sat, 22 Aug 2015, Richard Cochran wrote:
On Sat, Aug 22, 2015 at 10:33:48PM +0200, Thomas Gleixner wrote:
@@ -196,19 +197,31 @@ long ptp_ioctl(struct posix_clock *pc, unsigned int
cmd, unsigned long arg)
break;
}
pct = sysoff-ts[0];
-
Also give functions more sensible names: nvram_misc_* for misc device ops,
nvram_proc_* for proc file ops and nvram_module_* for init and exit
functions. This makes them distict from nvram_ops members.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
drivers/char/nvram.c | 194
It turns out that, actually, the can_attach(), cancel_attach() and
attach() code is broken -- we're incrementing a ref on the old_css of
a task in can_attach(). Then we decrement the ref on a *different* css
(because the task has been migrated). This is clearly a bad thing.
Should we make
This change is required in order to be able to build the component
as a module.
Signed-off-by: Yaniv Gardi yga...@codeaurora.org
---
drivers/scsi/ufs/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index
Grab a ref to each source css being migrated from, otherwise it's
possible for the refcount to reach zero between -can_attach() and
-cancel_attach(). This means that operations on the task's old css
(such as container_of(...)) become unsafe, as we may be operating on a
different css.
Signed-off-by: Yaniv Gardi yga...@codeaurora.org
---
drivers/scsi/ufs/ufs-qcom.c | 34 +-
drivers/scsi/ufs/ufshcd.h | 21 +
2 files changed, 38 insertions(+), 17 deletions(-)
diff --git a/drivers/scsi/ufs/ufs-qcom.c
In order to simplify the code a set of wrapper functions is created
to test and call each of the variant operations.
Signed-off-by: Yaniv Gardi yga...@codeaurora.org
---
drivers/scsi/ufs/ufs-qcom.c | 1 -
drivers/scsi/ufs/ufshcd.c | 104 +---
This change turns the UFS variant (SCSI_UFS_QCOM) into a UFS
a platform device.
In order to do so a few additional changes are required:
1. The ufshcd-pltfrm is no longer serves as a platform device.
Now it only serves as a group of platform APIs such as PM APIs
(runtime suspend/resume,
Need to check return value of irq_alloc_generic_chip, because
it may return NULL.
1. Change mxc_gpio_init_gc return type from void to int.
2. Add a new lable out_irqdomain_remove to remove the irq domain
when mxc_gpio_init_gc fail.
Signed-off-by: Peng Fan van.free...@gmail.com
Cc: Linus
Adds support for configuring and reading the test bus and debug
registers. This change also adds another vops in order to print the
debug registers.
Signed-off-by: Yaniv Gardi yga...@codeaurora.org
---
drivers/scsi/ufs/ufs-qcom.c | 165 +++-
Need to check return value of irq_alloc_generic_chip, because
it may return NULL.
1. Change mxs_gpio_init_gc return type from void to int.
2. Add a new lable out_irqdomain_remove to remove the irq domain
when mxc_gpio_init_gc fail.
Signed-off-by: Peng Fan van.free...@gmail.com
Cc: Linus
Fix incorrect usage of css_get and css_put to put a different css in
pids_{cancel_,}attach() than the one grabbed in pids_can_attach(). This
could lead to quite serious memory leakage (and unsafe operations on the
putted css).
Signed-off-by: Aleksa Sarai cyp...@cyphar.com
---
On Thu, Aug 20, 2015 at 12:01:27PM +0530, punnaiah choudary kalluri wrote:
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
+ list_for_each_entry_safe(desc, next, chan-done_list, node) {
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
drivers/char/nvram.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
Index: linux/drivers/char/nvram.c
===
--- linux.orig/drivers/char/nvram.c
The drivers/char/nvram module has previously only supported RTC CMOS
NVRAM, for which it provides appropriate checksum ioctls. Make these
ioctls optional so the module can be re-used with other kinds of NVRAM.
The ops struct methods that implement the ioctls now return error
codes so that a
This patch addresses inconsistencies in Mac framebuffer drivers and their
use of Kconfig symbols relating to NVRAM, so PPC64 can use CONFIG_NVRAM.
Macintosh framebuffer drivers use default settings for color mode and
video mode that are found in NVRAM. On PCI Macs, MacOS stores display
settings
Implement arch_nvram_ops for PPC32 and make use of it in the generic_nvram
misc device module so that the nvram_* function exports can be removed.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
arch/powerpc/include/asm/nvram.h |3 ---
arch/powerpc/kernel/setup_32.c | 10
The nvram_read_byte() and nvram_write_byte() definitions in asm/nvram.h
duplicate those in linux/nvram.h. Get rid of the former to prepare for
adoption of struct arch_nvram_ops (which is defined in linux/nvram.h for
general use).
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
Changes
Add the nvram_size() function to those PowerPC platforms that don't already
have one: CHRP and PowerMac. This means that the ppc_md.nvram_size()
function can be used to implement arch_nvram_ops.get_size()
Since we are addressing inconsistencies here, also rename chrp_nvram_read
and
Add the powerpc-specific sync() method to struct nvram_ops and implement
the corresponding ioctl in the nvram module. This allows the nvram module
to replace the generic_nvram module.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
On PPC32, the IOC_NVRAM_SYNC ioctl call always returns
Make use of arch_nvram_ops in the thinkpad_acpi driver so that the
nvram_* function exports can be removed.
This patch series was tested on a ThinkPad T43.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
Acked-by: Henrique de Moraes Holschuh h...@hmh.eng.br
Reviewed-by: Darren Hart
Make use of arch_nvram_ops in device drivers so that the nvram_* function
exports can be removed.
Since they are no longer global symbols, rename the PPC32 nvram_* functions
appropriately.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
Changed since v4:
- Split off the CONFIG_PPC32,
And thus eliminate some twisted CONFIG_GENERIC_NVRAM logic.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
---
drivers/char/Makefile|6 -
drivers/char/generic_nvram.c | 175 ---
2 files changed, 1 insertion(+), 180 deletions(-)
Index:
Drivers now use the arch_nvram_ops calls so remove the function exports and
prototypes. nvram_check_checksum() is unused so remove it.
Signed-off-by: Finn Thain fth...@telegraphics.com.au
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org
---
arch/m68k/atari/nvram.c |6 +++---
__rb_erase_augmented() is the fundamental part of erase a node from rbtree,
while to some extend it is hard to understand.
This patch replaces some code with macro to make it more easy to
understand for audience.
1. rb_parent(node) replaces __rb_parent(pc)
2. rb_set_parent_color() replaces direct
This change fixes a compilation warning that happens if SCSI_UFS_QCOM
is compiled as a module.
Also this patch fixes an error happens when insmod the module:
ufs_qcom: module license 'unspecified' taints kernel.
Signed-off-by: Yaniv Gardi yga...@codeaurora.org
---
drivers/scsi/ufs/ufs-qcom.c |
Thanks to Nikolay Borisov who discovered this.
--
Aleksa Sarai (cyphar)
www.cyphar.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the
Export the following functions in order to avoid build errors
when the component PHY_QCOM_UFS is compiled as a module:
ERROR: ufs_qcom_phy_disable_ref_clk
[drivers/scsi/ufs/ufs-qcom.ko] undefined!
ERROR: ufs_qcom_phy_enable_ref_clk
[drivers/scsi/ufs/ufs-qcom.ko] undefined!
ERROR:
On Fri, Aug 21, 2015 at 04:27:49PM -0400, Paul Gortmaker wrote:
The Kconfig for this driver is currently:
config MV_XOR
bool Marvell XOR engine support
...meaning that it currently is not being built as a module by anyone.
Lets remove the modular code that is essentially orphaned,
On Sun, Aug 23, 2015 at 7:38 PM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 20, 2015 at 12:01:27PM +0530, punnaiah choudary kalluri wrote:
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
On 15-08-22 18:52:28, Stefan Agner wrote:
Hi Sanchayan,
On 2015-08-21 06:26, Sanchayan Maity wrote:
+static int vf50_ts_probe(struct platform_device *pdev)
+{
+ struct input_dev *input;
+ struct iio_channel *channels;
+ struct device *dev = pdev-dev;
+ struct
Hi,
This patch fixes issues in coding style, of a missing blank line after
declarations.
Best,
mfrw
Signed-off-by: Muhammad Falak R Wani falakre...@gmail.com
---
drivers/cpufreq/cpufreq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/cpufreq/cpufreq.c
Hi Shi,
Sorry for the late reply. I hope it won't be too late.
NON-ACK by me, I think.
I noticed that your first has been merged. But it won't fix the problem
these code intended to fix.
After your patch 1, zone's spanned/present won't be set to 0 because:
free_area_init_node()
|--
On Fri, 31 Jul 2015, Shenwei Wang wrote:
+struct gpcv2_irqchip_data {
+ struct raw_spinlock rlock;
+ void __iomem *gpc_base;
+ u32 wakeup_sources[IMR_NUM];
+ u32 enabled_irqs[IMR_NUM];
+ u32 cpu2wakeup;
Can you please format that in a readable way?
struct
Refactor the RTC CMOS NVRAM functions so that they can be used as
arch_nvram_ops methods. Checksumming logic is moved from the misc device
operations to the nvram read/write operations.
This makes the misc device implementation more generic. This also
preserves the locking semantics such that
Different platforms and architectures offer different NVRAM sizes and
access methods. E.g. PPC32 has byte-at-a-time read/write functions whereas
PPC64 has byte-range read/write functions. Adopt the nvram_ops struct so
the nvram module can call such functions as are defined by the various
The return values of btrfs_item_offset_nr and btrfs_item_size_nr are of
type u32. To avoid mixing signed and unsigned integers we should also
declare dsize and last_off to be of type u32.
Signed-off-by: Alexandru Moise 00moses.alexande...@gmail.com
---
fs/btrfs/ctree.c | 4 ++--
1 file changed,
Oh! Sorry! I made the changes to correct the faults you figured out.
Is it okay now?
Signed-off-by: Aparna Karuthodi kdasapa...@gmail.com
---
drivers/staging/fbtft/fb_pcd8544.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/fbtft/fb_pcd8544.c
On Tue, Aug 18, 2015 at 02:49:15PM +0100, Jon Hunter wrote:
+#define AHUB_TO_MEMORY 2
+#define MEMORY_TO_AHUB 4
namespace this aptly as well
+static void tegra_adma_stop(struct tegra_dma_channel *tdc)
Ingo Molnar mi...@kernel.org wrote:
I think this is too complex.
How about something simple like the patch below (on top of the third patch)?
It makes the vmalloc info transactional - /proc/meminfo will always print a
consistent set of numbers. (Not that we really care about races there,
* Linus Torvalds torva...@linux-foundation.org wrote:
On Wed, Aug 5, 2015 at 10:48 AM, Ingo Molnar mi...@kernel.org wrote:
Some of these field names are visible to userspace and can't change.
That's a misconception: bits in the uapi headers can be renamed just fine.
I disagree. If it
Architecture specific code for i386 and x86_64 was unified and merged to
the arch/x86. This patch fix old paths of source code files in comments.
Signed-off-by: Alexander Kuleshov kuleshovm...@gmail.com
---
arch/x86/entry/entry_64.S | 4 ++--
arch/x86/ia32/ia32_signal.c| 2 +-
On Sunday 23 August 2015 19:09:33 Vinod Koul wrote:
On Fri, Aug 21, 2015 at 02:01:59AM +0300, Laurent Pinchart wrote:
How is 64 bit DMA addressing implemented ? Can you use a 64-bit VDMA on
a 32- bit platform with LPAE ? Can you use a 32-bit VDMA on a 64-bit
platform ? Given that VDMA
* Denys Vlasenko dvlas...@redhat.com wrote:
static FUNC const st_instr_table[64] = {
- fadd__, fld_i_, fcmovb, fcmovnb, fadd_i, ffree_, faddp_,
_df_c0_,
- fmul__, fxch_i, fcmove, fcmovne, fmul_i, _dd_c8_, fmulp_,
_df_c8_,
- fcom_st, fp_nop, fcmovbe,
This patchset adds support SMP on MediaTek MT6580 Cortex-A7 quad-core SoC.
This is based on v4.2-rc1 and following patch series:
(1) Yingjoe Chen's Add SMP bringup support for mt65xx socs [1]
(2) Mars Cheng's Add mt6580 basic chip support [2]
(3) Sascha Hauer's Mediatek SCPSYS power domain
For MT6580 SoC platform, the secondary cores are in powered off state
as default, so compared with MT6589, one new enable method is needed.
This method using the SPM (System Power Manager) inside the SCPSYS to
control the CPU power.
Signed-off-by: Scott Shu scott@mediatek.com
---
We enable GTP6 which ungates the arch timer clock.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/mach-mediatek/mediatek.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mediatek/mediatek.c
b/arch/arm/mach-mediatek/mediatek.c
index
The INFRACFG contains various infrastructure registers and the SCPSYS handles
several power management related tasks. Both are needed for SMP and CPU
hotplug on MT6580.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/configs/multi_v7_defconfig | 2 ++
1 file changed, 2 insertions(+)
Signed-off-by: Finn Thain fth...@telegraphics.com.au
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org
---
Tested on a PowerBook 520 and Quadra 650.
Changes since v2:
- Make use of the RTC_* macros from the previous patch and add a few more
besides.
---
arch/m68k/mac/misc.c | 39
Frank has agreed to step up and help with DT core code maintainership.
At the same time, Grant is taking a step back from active maintainership
responsibilities. Add Frank to the device tree core code entry and
shuffle Grant to the end of the list. In a few releases time Grant will
be removed
On Sun, Aug 23 2015, Ingo Molnar mi...@kernel.org wrote:
Ok, fair enough - so how about the attached approach instead, which
uses a 64-bit generation counter to track changes to the vmalloc
state.
How does this invalidation approach compare to the jiffies approach? In
other words, how often
Hi Cassidy,
On Wed, Jul 29, 2015 at 11:40 PM, Cassidy Burden cbur...@codeaurora.org wrote:
I changed the test module to now set the entire array to all 0/1s and
only flip a few bits. There appears to be a performance benefit, but
it's only 2-3% better (if that). If the main benefit of the
From: Vivien Didelot vivien.dide...@savoirfairelinux.com
Date: Wed, 19 Aug 2015 18:54:55 -0400
The current Secure port mode requires the port-based VLANs to also be
valid in the 802.1Q VLAN Table Unit. The current hardware bridging
support only configures the port-based VLANs, thus is broken.
First, an actual, albeit minor, bug: initializing both vmap_info_gen
and vmap_info_cache_gen to 0 marks the cache as valid, which it's not.
vmap_info_gen should be initialized to 1 to force an initial
cache update.
Second, I don't see why you need a 64-bit counter. Seqlocks consider
32 bits (31
Hi Sanchayan,
On Fri, Aug 21, 2015 at 06:56:32PM +0530, Sanchayan Maity wrote:
The Colibri Vybrid VF50 module supports 4-wire touchscreens using
FETs and ADC inputs. This driver uses the IIO consumer interface
and relies on the vf610_adc driver based on the IIO framework.
Thank you for
On Sun, 21 Jun 2015 21:44:30 +0200
, Stefan Agner ste...@agner.ch
wrote:
On 2015-06-21 01:49, Peter Stuge wrote:
Stefan Agner wrote:
libftdi requires to detach the kernel driver to get access to the device
Control transfers ought to be possible without a detach.
Good to know, thanks
On Aug 21, 2015 3:10 PM, Yaniv Gardi yga...@codeaurora.org wrote:
Add a write memory barrier to make sure descriptors prepared are actually
written to memory before ringing the doorbell. We have also added the
write memory barrier after ringing the doorbell register so that
controller sees
thanks!
Please, remember that we need to push it also to stable :)
On Sun, Aug 23, 2015 at 11:52 PM, Rob Herring r...@kernel.org wrote:
On Thu, Jul 16, 2015 at 3:33 PM, Ricardo Ribalda Delgado
ricardo.riba...@gmail.com wrote:
ping?
Hello Grant, Hello Greg
Is there any planned timeframe
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding
On Sun, Aug 23, 2015 at 6:13 PM, Olof Johansson o...@lixom.net wrote:
On Fri, Aug 14, 2015 at 2:21 PM, Rob Herring robherri...@gmail.com wrote:
+arm-soc
On Tue, Aug 11, 2015 at 5:07 AM, Ian Campbell ian.campb...@citrix.com
wrote:
On Mon, 2015-08-03 at 17:06 +0100, Ian Campbell wrote:
On Fri, Aug 21, 2015 at 08:25:24PM +, Liang, Kan wrote:
SNIP
we need global topology information in perf.data and use the mapping
from there, we can't use current server info
we currently store core_siblings_list and thread_siblings_list, in topology
FEATURE, which is probably
From: Noam Camus no...@ezchip.com
Date: Thu, 20 Aug 2015 08:00:00 +0300
Change v2
TX done is handled back with NAPI poll.
Change v1
This patch set is a bunch of fixes to make nps_enet work correctly with
all platforms, i.e. real device, emulation system, and simulation system.
The main
On Sun, Aug 23, 2015 at 4:42 PM, Rob Herring robherri...@gmail.com wrote:
On Sun, Aug 23, 2015 at 6:13 PM, Olof Johansson o...@lixom.net wrote:
On Fri, Aug 14, 2015 at 2:21 PM, Rob Herring robherri...@gmail.com wrote:
+arm-soc
On Tue, Aug 11, 2015 at 5:07 AM, Ian Campbell
On Wed, 19 Aug 2015 12:21:45 +0300
Kirill A. Shutemov kirill.shute...@linux.intel.com wrote:
Hugh has pointed that compound_head() call can be unsafe in some
context. There's one example:
[...]
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 0735bc0a351a..a4c4b7d07473 100644
Synopsys DesignWare mobile storage host controller supports three
types of transfer mode: pio, internal dma and external dma. However,
dw_mmc can only supports pio and internal dma now. Thus some platforms
using dw-mshc integrated with generic dma can't work in dma mode. So we
submit this patch
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support these platforms. I've tested it on RK31xx
platform with edmac mode and RK3288 platform with
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Govindraj Raja govindraj.r...@imgtec.com
Acked-by: Ralf
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes in
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Vineet Gupta vgu...@synopsys.com
---
Changes in v7: None
This patch add some macros for HCON register operations
to make code more readable.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/mmc/host/dw_mmc.c | 6 +++---
From: Corey Minyard [mailto:tcminy...@gmail.com] On Behalf Of Corey Minyard
On 08/17/2015 09:54 PM, 河合英宏 / KAWAI，HIDEHIRO wrote:
From: Corey Minyard [mailto:tcminy...@gmail.com] On Behalf Of Corey Minyard
This patch will break ATN handling on the interfaces. So we can't do this.
I
O
n Aug 20, 2015 6:59 AM, Yaniv Gardi yga...@codeaurora.org wrote:
This change turns the UFS variant (SCSI_UFS_QCOM) into a UFS
a platform device.
In order to do so a few additional changes are required:
1. The ufshcd-pltfrm is no longer serves as a platform device.
Now it only serves as
I was curious why these fields were ever added to /proc/meminfo, and dug
up this:
commit d262ee3ee6ba4f5f6125571d93d9d63191d2ef76
Author: Andrew Morton a...@digeo.com
Date: Sat Apr 12 12:59:04 2003 -0700
[PATCH] vmalloc stats in /proc/meminfo
From: Matt Porter por...@cox.net
On Sat, Aug 22, 2015 at 12:48 PM, Jonathan Cameron ji...@kernel.org wrote:
On 20/08/15 23:48, Javier Martinez Canillas wrote:
Hello Michael,
On 08/21/2015 12:29 AM, Michael Welling wrote:
On Fri, Aug 21, 2015 at 12:02:40AM +0200, Javier Martinez Canillas wrote:
Hello Michael,
On 08/20/2015
On Tue, Aug 18, 2015 at 11:20 PM, Chen-Yu Tsai w...@csie.org wrote:
Reduced Serial Bus is a proprietary 2-line push-pull serial bus
supporting multiple slave devices.
It was developed by Allwinner, Inc. and used by Allwinner and X-Powers,
Inc. for their line of PMICs and other peripheral ICs.
cgroup currently does not support removing a cgroup directory if it has
children.
Adds a api cgroup_destroy_children which destroys all the children in
the cgroup hierarchy starting from the bottom. After each cgroup node is
destroyed we wait till the css is offlined and freed.
Signed-off-by:
Add subsystem APIs css_mount and css_umount which will be called during
cgroup_mount and umount respectively. This will let the subsystem
perform any specific setup during mount/umount.
This will be used in code data prioritization code later.
Signed-off-by: Vikas Shivappa
On Fri, Aug 14, 2015 at 2:21 PM, Rob Herring robherri...@gmail.com wrote:
+arm-soc
On Tue, Aug 11, 2015 at 5:07 AM, Ian Campbell ian.campb...@citrix.com wrote:
On Mon, 2015-08-03 at 17:06 +0100, Ian Campbell wrote:
Commit 9ccd608070b6 (arm64: dts: add device tree for ARM SMM-A53x2 on
2015-08-24 8:23 GMT+09:00 Rob Herring robherri...@gmail.com:
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file
This change is a more advanced use of detached freelist. The bulk
free array is scanned is a progressive manor with a limited look-ahead
facility.
To maintain the same performance level, as the previous simple
implementation, the look-ahead have been limited to only 3 objects.
This number have
REPOST:
* Only updated comment in patch01 per request of Christoph Lameter.
* No other objections have been made
* Prev post: http://thread.gmane.org/gmane.linux.kernel.mm/135704
NEW use-cases for this API is RCU-free (and still for network NICs).
Introducing what I call detached freelist,
Make it possible to free a freelist with several objects by extending
__slab_free() with two arguments: a freelist_head pointer and objects
counter (cnt). If freelist_head pointer is set, then the object must
be the freelist tail pointer.
This allows a freelist with several objects (all within
This change focus on improving the speed of object freeing in the
slowpath of kmem_cache_free_bulk.
The slowpath call __slab_free() have been extended with support for
bulk free, which amortize the overhead of the locked cmpxchg_double_slab.
To use the new bulking feature of __slab_free(), we
301 - 400 of 522 matches
Mail list logo
