On 10/26/15, Anju T wrote:
> This short patch series add the ability to sample the interrupted
> machine state for each hardware sample
Hi,
how can we check your patch series without testing details?
>
> Anju (3):
> perf/powerpc:add ability to sample intr machine state in power
>
> 2015-09-13 23:52 GMT+09:00 Yaniv Gardi :
>> Sometimes due to hw issues it takes some time to the
>> host controller register to update. In order to verify the register
>> has updated, a polling is done until its value is set.
>>
>> In addition the functions ufshcd_hba_stop() and
>>
RTC found in s2mps15 is almost same as one found in s2mps14.
This patch add required changes to enable s2mps15 rtc timer.
Signed-off-by: Alim Akhtar
---
drivers/rtc/rtc-s5m.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-s5m.c
On 26/10/15 14:39, Wangnan (F) wrote:
>
>
> On 2015/10/26 20:24, Adrian Hunter wrote:
>> On 26/10/15 13:41, Wang Nan wrote:
>>> evsel->system_wide is introduced by commit bf8e8f4b832972c76d64ab2e2837
>>> (perf evlist: Add 'system_wide' option), which is used for mixing evsels
>>> that aren't
> 2015-09-13 23:52 GMT+09:00 Yaniv Gardi :
>> UFS device and link can be put in multiple different low power modes
>> hence UFS driver supports multiple different low power modes.
>> By default UFS driver selects the default (optimal) low power mode
>> (which gives moderate power savings and have
This patch moves Exynos PMU driver implementation from "arm/mach-exynos"
to "drivers/soc/samsung". This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to the s2mps11 clock driver.
Signed-off-by: Alim Akhtar
---
drivers/clk/Kconfig |5 +++--
drivers/clk/clk-s2mps11.c | 24
2 files changed, 27 insertions(+), 2
From: Thomas Abraham
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators and allows programming these regulators via a
I2C interface. This patch adds initial support for LDO/Buck regulators of
S2MPS15 PMIC.
Signed-off-by: Thomas Abraham
This patch splits up mach-exynos/pmu.c file, and moves exynos5420,
PMU configuration data and functions handing data into exynos5420
SoC specific PMU file mach-exynos/exynos5420-pmu.c.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/Makefile | 2 +-
From: Thomas Abraham
Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
clock outputs and battery charger. This patch adds initial support for
LDO and buck regulators of S2MPS15 device.
This patch splits up mach-exynos/pmu.c file, and moves exynos5250,
PMU configuration data and functions handing data into exynos5250
SoC specific PMU file mach-exynos/exynos5250-pmu.c.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/Makefile | 4 +-
From: Thomas Abraham
Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
Cc: devicet...@vger.kernel.org
Signed-off-by: Thomas Abraham
Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
hi,
I'm getting stuck buildid-list command on s390
seems like the kcore code gets stuck with inseting
into rbtree while iterating it..
I was able to fix it with patch below, bu I'm not sure it's the
correct fix because the kcore maps magic is beyond me so far ;-)
please check attached backtrace
This patch splits up mach-exynos/pmu.c file, and moves exynos4210,
exynos4412 and exynos4212 PMU configuration data and functions handing
data into a common exynos4 SoC specific PMU file mach-exynos/exynos4-pmu.c.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/Makefile | 2 +-
Samsung's S2MPS15 PMIC is targetted to be used with Samsung's Exynos7 SoC.
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators, RTC, three 32.768 KHz clock outputs and allows
programming these blocks via a I2C interface. This patch series adds
This patch splits up mach-exynos/pmu.c file, and moves exynos3250 PMU
configuration data and functions handing those data into exynos3250
SoC specific PMU file mach-exynos/exynos3250-pmu.c.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/Makefile | 2 +-
Moving Exynos PMU specific header file into "include/linux/soc/samsung"
thus updated affected files under "mach-exynos" to use new location of
these header files.
Signed-off-by: Amit Daniel Kachhap
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/exynos.c
Hi Boqun,
On 10/26/2015 01:04 PM, Boqun Feng wrote:
> On Tue, Oct 20, 2015 at 09:28:07AM +0200, Daniel Wagner wrote:
>> +
>> +/*
>> + * The thing about the wake_up_state() return value; I think we can ignore
>> it.
>> + *
>> + * If for some reason it would return 0, that means the previously
2015-10-25 22:38 GMT+09:00 :
>> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi :
>>> fDeviceInit query response time for some devices is too long that
>>> default
>>> query request timeout of 100ms may not be enough. Experiments show that
>>> fDeviceInit response sometimes takes 500ms so to be on safer
commit 6ec4f8d0d91f ("ARM: EXYNOS: add generic function to calculate
cpu number") introduced exynos_pmu_cpunr to be used by multi-cluster SoC's
e.g Exynos5420, but it's no more used in the codebase and hence removing
this part of code.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/pmu.c
This patch series is a part of continuation work from following series
[1] and [2].
1: exynos: Move pmu driver to driver/soc folder and add exynos7 support
http://www.spinics.net/lists/linux-samsung-soc/msg39797.html from Amit
Daniel Kacchap
2: soc: samsung: pmu: split up SoC specific PMU
Hi Tomeu,
On Wed, Oct 21, 2015 at 11:34 PM, Tomeu Vizoso
wrote:
> If a suitable prepare callback cannot be found for a given device and
> its driver has no PM callbacks at all, assume that it can go direct to
> complete when the system goes to sleep.
>
> The reason for this is that there's lots
On 2015/10/26 20:32, Peter Zijlstra wrote:
On Sun, Oct 25, 2015 at 09:23:36AM -0700, Alexei Starovoitov wrote:
bpf_perf_event_read() muxes of -EINVAL into return value, but it's non
ambiguous to the program whether it got an error or real counter value.
How can that be, the (u64)-EINVAL
On 26 October 2015 at 11:51, Michael Turquette wrote:
> Quoting Rafael J. Wysocki (2015-10-25 06:54:39)
>> On Sun, Oct 25, 2015 at 12:06 AM, Mark Brown wrote:
>> > On Sat, Oct 24, 2015 at 04:17:12PM +0200, Rafael J. Wysocki wrote:
>> >
>> >> Well, I'm not quite sure why exactly everyone is so
On 10/26/2015 04:39 PM, Lee Jones wrote:
On Mon, 26 Oct 2015, Alim Akhtar wrote:
From: Thomas Abraham
Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
Cc: devicet...@vger.kernel.org
Hi Lee,
Thanks for looking into this.
On 10/26/2015 04:36 PM, Lee Jones wrote:
On Mon, 26 Oct 2015, Alim Akhtar wrote:
From: Thomas Abraham
Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
On 10/26/2015 11:26 AM, Bharat Kumar Gogada wrote:
>>> + device_type = "pci";
>>> + interrupt-parent = <>;
>>> + interrupts = < 0 118 4
>>> + 0 116 4
>>> + 0 115 4 // MSI_1 [63...32]
>>> + 0 114 4 >; //
On Wed, Oct 21, 2015 at 03:41:37PM -0500, Brijesh Singh wrote:
> Add support for Cortex A57 and A53 EDAC driver.
>
> Signed-off-by: Brijesh Singh
> CC: robh...@kernel.org
> CC: pawel.m...@arm.com
> CC: mark.rutl...@arm.com
> CC: ijc+devicet...@hellion.org.uk
> CC: ga...@codeaurora.org
> CC:
The enum definition assigns an 'id' to each register in "struct pt_regs"
of arch/powerpc.The order of these values in the enum definition are
based on the corresponding macros in
arch/powerpc/include/uapi/asm/ptrace.h .
Signed-off-by: Anju T
---
arch/powerpc/include/uapi/asm/perf_regs.h | 55
This short patch series add the ability to sample the interrupted
machine state for each hardware sample
Anju (3):
perf/powerpc:add ability to sample intr machine state in power
tools/perf:Map the ID values with register names
perf/powerpc:add support for sampling intr machine state
The id values are mapped with the corresponding register names.
This names are displayed while using a perf report/perf script command.
Signed-off-by: Anju T
---
tools/perf/arch/powerpc/include/perf_regs.h | 118
1 file changed, 118 insertions(+)
create mode 100644
The registers to sample are passed through the sample_regs_intr bitmask.
The name and bit position for each register is defined in asm/perf_regs.h.
This feature can be enabled by using -I option with perf record command.
To display the sampled register values use perf script -D.
The kernel uses
Quoting Jon Medhurst (Tixy) (2015-10-21 02:55:33)
> The check for correct frequency being set in bL_cpufreq_set_rate is
> broken when the big.LITTLE switcher is active, for two reasons.
>
> 1. The 'new_rate' variable gets overwritten before the test by the
> code calculating the frequency of the
On 2015/10/26 20:24, Adrian Hunter wrote:
On 26/10/15 13:41, Wang Nan wrote:
evsel->system_wide is introduced by commit bf8e8f4b832972c76d64ab2e2837
(perf evlist: Add 'system_wide' option), which is used for mixing evsels
that aren't system-wide with ones that are [1]. However, for global
On Mon, October 26, 2015 08:45, Jacek Anaszewski wrote:
> Hi Simon,
>
> Thanks for the patch. There are conflicts when applying
> it to the LED tree:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git
>
> Please use it as a code base for your LED development.
This has
> 2015-10-25 23:40 GMT+09:00 :
>>> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi :
Performing several writes to UFS host controller registers has
no gurrantee of ordering, so we must make sure register writes
to setup request list base address etc. are performed before the
run/stop
On Sun, Oct 25, 2015 at 09:23:36AM -0700, Alexei Starovoitov wrote:
> bpf_perf_event_read() muxes of -EINVAL into return value, but it's non
> ambiguous to the program whether it got an error or real counter value.
How can that be, the (u64)-EINVAL value is a valid counter value..
unlikely maybe,
On Mon, Oct 26, 2015 at 08:04:26PM +0800, Boqun Feng wrote:
> Hi Daniel,
>
> On Tue, Oct 20, 2015 at 09:28:07AM +0200, Daniel Wagner wrote:
> > +
> > +/*
> > + * The thing about the wake_up_state() return value; I think we can ignore
> > it.
> > + *
> > + * If for some reason it would return 0,
On 26/10/15 13:41, Wang Nan wrote:
> evsel->system_wide is introduced by commit bf8e8f4b832972c76d64ab2e2837
> (perf evlist: Add 'system_wide' option), which is used for mixing evsels
> that aren't system-wide with ones that are [1]. However, for global
> system wide recording (perf record -a
2015-10-25 23:40 GMT+09:00 :
>> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi :
>>> Performing several writes to UFS host controller registers has
>>> no gurrantee of ordering, so we must make sure register writes
>>> to setup request list base address etc. are performed before the
>>> run/stop register
On 10/25/2015 03:54 PM, Oleg Nesterov wrote:
> On 10/22, Denys Vlasenko wrote:
>>
>> On Wed, Oct 21, 2015 at 11:47 PM, Oleg Nesterov wrote:
>>> On 10/21, Denys Vlasenko wrote:
On 10/21/2015 09:59 PM, Denys Vlasenko wrote:
> On 10/21/2015 12:31 AM, Andrew Morton wrote:
>> Well,
Hi Olivier,
On Mon, Oct 26, 2015 at 12:00:50PM +0100, Olivier Scherler wrote:
> > On 24 oct. 2015, at 22:11, Jiri Kosina wrote:
> > On Sat, 24 Oct 2015, Michele Baldessari wrote:
> >
> >> The Xin-Mo Dual Arcade controller (16c0:05e1) needs this quirk in order
> >> to have the two distinct
Hi Daniel,
On Tue, Oct 20, 2015 at 09:28:07AM +0200, Daniel Wagner wrote:
> +
> +/*
> + * The thing about the wake_up_state() return value; I think we can ignore
> it.
> + *
> + * If for some reason it would return 0, that means the previously waiting
> + * task is already running, so it will
Marc Gonzalez writes:
> On 23/10/2015 15:41, Måns Rullgård wrote:
>
>> Marc Gonzalez wrote:
>>
>>> On 22/10/2015 16:02, Mans Rullgard wrote:
>>>
This adds a binding for the Aurora VLSI NB8800 Ethernet controller
using the "aurora,nb8800" compatible string. When used in Sigma
Signed-off-by: Robert Dolca
---
include/net/nfc/nci_core.h | 8
net/nfc/nci/core.c | 16
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/include/net/nfc/nci_core.h b/include/net/nfc/nci_core.h
index 530df66..1e3db2b 100644
---
evsel->system_wide is introduced by commit bf8e8f4b832972c76d64ab2e2837
(perf evlist: Add 'system_wide' option), which is used for mixing evsels
that aren't system-wide with ones that are [1]. However, for global
system wide recording (perf record -a ...), evsel->system_wide is set
to false, which
On 2015/10/26 17:25, Adrian Hunter wrote:
On 26/10/15 11:08, Wangnan (F) wrote:
evsel->system_wide is introduced by commit
bf8e8f4b832972c76d64ab2e2837a48397144887
(perf evlist: Add 'system_wide' option), but Adrian only introduced a new field
into perf, doesn't really make it active. Until
The component bind messages are mostly redundant as most drivers print
a more specific message themselves when binding has succeeded. As they
don't add much value, but can get noisy with a lot of components in the
system demote them to debug level.
Signed-off-by: Lucas Stach
---
From: Joseph Myers
Date: Thu, 2 Jul 2015 15:54:34 +
> From: Joseph Myers
>
> This patch moves sparc from math-emu-old to math-emu, updating it for
> the API changes.
>
> The following cleanup (that goes beyond mechanical conversion to new
> APIs) is included in this patch because of its
26.10.2015 04:25, Andy Lutomirski пишет:
> This is take 2 at fixing x86 64-bit signals wrt SS. After a lot of
> thought, this is not controlled by any flags -- I would much prefer
> to avoid opt-in behavior. Instead, it just tries hard to avoid
> triggering the cases that break DOSEMU.
>
>
On Thu, Oct 22, 2015 at 01:44:49PM +0100, Mark Brown wrote:
> On Thu, Oct 15, 2015 at 02:47:07PM +0100, Charles Keepax wrote:
>
> > +This document lists regulator specific bindings, see the primary binding
> > +document:
> > + ../mfd/arizona.txt
> > +
> > +Required properties:
> > +
> > + -
May I ask a newbie question? Say, there is some amount of memory pages
which can be reclaimed if they are flushed to storage. And lower layer
might issue memory allocation request in a way which won't cause reclaim
deadlock (e.g. using GFP_NOFS or GFP_NOIO) when flushing to storage,
isn't it?
Inherit bit is useless for a system wide evsel [1]. Further kernel
improvements are giving more constrain [2] on inherit events. This
patch set inherit bit to 0 for system wide evsels to avoid potential
constrains.
[1]
Previous version can be found from [1].
To make bpf_perf_event_output() and bpf_perf_event_read() easier to be
used, these two patches set inherit to 0 for system wide evsels.
After applying them, users are possible to pass system wide events to
BPF programs in following command, and don't need
Hi Kevin,
On Mon, 2015-10-26 at 17:06 +0900, Kevin Hilman wrote:
> On Mon, Oct 26, 2015 at 4:15 PM, Yingjoe Chen
> wrote:
> > On Mon, 2015-10-26 at 09:56 +0900, Kevin Hilman wrote:
> >> Hello,
> >>
> >> On Sat, Oct 3, 2015 at 12:19 AM, Yingjoe Chen
> >> wrote:
> >> > Add arch timer node to
Xilfpga boots only with device-tree. Document the required properties
and the unique boot style
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2->V3
minor nitpicks. mips->MIPS. typo. reorder compatible strings in priority
V1->V2
Reformatted to 80 char column
Correct clock phandle description
Add device tree files for the MIPSfpga platform.
See Documentation/devicetree/bindings/mips/img/xilfpga.txt
for details about MIPSfpga
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
no change
V1 -> V2
Reformatted git log for 80 column
Added nexys4ddr compatible
Fixed some whitespace
Add defconfig for MIPSfpga
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
no change
V1 -> V2
Reduced redundant options that had crept in
---
arch/mips/configs/xilfpga_defconfig | 40 +
1 file changed, 40 insertions(+)
create mode 100644
Hi,
This series is based on v4.3-rc7.
Adds support for the Imagination University Program MIPSfpga platform.
See the first dt-bindings patch for details about the platform.
These patches allow the kernel to boot with UART and gpio support.
Acks from DT (patch 1/4) welcome.
Regards,
ZubairLK
The xilfpga platform will be DT only.
Add required platform code.
DT files have already been added separately.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
removed redundant gpio.h
minor typos
V1 -> V2
Minor nitpicks. Nothing functional.
Removed some redundant select 8250 serial.
The already provides the PAGE_ALIGNED macro. Let's
use this macro instead of IS_ALIGNED and passing PAGE_SIZE directly.
Signed-off-by: Alexander Kuleshov
---
arch/arm64/mm/pageattr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/mm/pageattr.c
On 10/24/2015 11:37 PM, Robert Jarzmik wrote:
[...]
> -static unsigned int ac97_read(struct snd_soc_codec *codec,
> - unsigned int reg);
> -static int ac97_write(struct snd_soc_codec *codec,
> - unsigned int reg, unsigned int val);
For review purposes it would be helpful to split this
add DT support for the tps6502x regulators.
Signed-off-by: Heiko Schocher
---
Changes in v3:
- fold kbuild patch:
regulator, dt: fix platform_no_drv_owner.cocci warnings
into this patch
No need to set .owner here. The core will do it.
Changes in v2:
- add comment from kbuild test robot
This patch reverts commit f4c55c5a3f7f ("PCI: designware: Program ATU with
untranslated address") based on 1/8 in this series. we delete *_mod_base in
pcie-designware. This was discussed in [1]
[1] http://www.spinics.net/lists/arm-kernel/msg436779.html
Signed-off-by: Zhou Wang
Signed-off-by:
On 10/21/2015 04:39 PM, Vlastimil Babka wrote:
> On 10/05/2015 05:01 AM, Hugh Dickins wrote:
>> On Fri, 2 Oct 2015, Vlastimil Babka wrote:
>> As you acknowledge in the commit message, if a file of 100 pages
>> were copied to tmpfs, and 100 tasks map its full extent, but they
>> all mess around
From: gabriele paoloni
This patch is needed in order to unify the PCIe designware framework for ARM and
ARM64 architectures. In the PCIe designware unification process we are calling
pci_create_root_bus() passing a "sysdata" parameter that is the same for both
ARM and ARM64 and is of type
This patch uses the new of_pci_get_host_bridge_resources
API in place of the PCI OF DT parser
For reference see previous suggestions from Gabriele[1]
[1] http://www.spinics.net/lists/linux-pci/msg42194.html
Signed-off-by: Zhou Wang
Signed-off-by: Gabriele Paoloni
Tested-by: James Morse
This patch tries to unify ARM32 and ARM64 PCIe in designware driver. Delete
function dw_pcie_setup, dw_pcie_scan_bus, dw_pcie_map_irq and struct hw_pci,
move related operations to dw_pcie_host_init.
Signed-off-by: Zhou Wang
Signed-off-by: Gabriele Paoloni
Signed-off-by: Arnd Bergmann
This patch adds PCIe host support for HiSilicon SoC Hip05.
Signed-off-by: Zhou Wang
Signed-off-by: Gabriele Paoloni
Signed-off-by: liudongdong
---
drivers/pci/host/Kconfig | 8 ++
drivers/pci/host/Makefile| 1 +
drivers/pci/host/pcie-hisi.c | 198
This patchset adds PCIe host support for HiSilicon SoC Hip05. The PCIe hosts
use PCIe IP core from Synopsys, So this driver is based on designware PCIe
driver.
Hip05 is an ARMv8 architecture SoC. It should be able to use ARM64 PCIe API in
designware PCIe driver. So this patch also adds ARM64
From: gabriele paoloni
Commit f4c55c5a3f7f ("PCI: designware: Program ATU with untranslated
address") added the calculation of PCI BUS addresses in designware,
storing them in new fields added in "struct pcie_port". This
calculation is done for every designware user even if is only
applicable to
Signed-off-by: Zhou Wang
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7ba7ab7..944a229 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8047,6 +8047,13 @@ S: Maintained
F:
This patch adds related DTS binding document for HiSilicon PCIe host driver.
Signed-off-by: Zhou Wang
---
.../bindings/arm/hisilicon/hisilicon.txt | 17 +
.../devicetree/bindings/pci/hisilicon-pcie.txt | 44 ++
2 files changed, 61 insertions(+)
create
On Sat, Oct 24, 2015 at 11:37:07PM +0200, Robert Jarzmik wrote:
> Convert the Wolfson WM9713 to regmap API. This will leverage all the
> regmap functions (debug, registers update, etc ...).
>
> As a bonus, this will pave the path to gpio chip introduction, and
> devicetree support.
>
>
On Thu, Oct 22, 2015 at 02:12:17PM -0700, Tim Bird wrote:
> Add a regulator to control the OTG chargepath switch. The OTG
> switch gets its power from pm8941_5vs1, and that should be expressed
> as an usb_otg_in-supply property in the DT node for the charger driver.
> The regulator name is "otg".
On Mon, 26 Oct 2015, Alim Akhtar wrote:
> From: Thomas Abraham
>
> Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
> is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
>
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Thomas Abraham
>
Inspired by Russell King's patch[1], I found some pci hosts also have the
same issue of "reading 32-bits from the command register, modifying the
command register, and then writing it back has the effect of clearing
any status bits that were indicating at that time" as pointed out by
Russell. Fix
Inspired by Russell King's patch[1], I found current iproc also has the
same issue of "reading 32-bits from the command register, modifying the
command register, and then writing it back has the effect of clearing
any status bits that were indicating at that time" as pointed out by
Russell. This
Inspired by Russell King's patch[1], I found current tegra also has the
same issue of "reading 32-bits from the command register, modifying the
command register, and then writing it back has the effect of clearing
any status bits that were indicating at that time" as pointed out by
Russell. This
Inspired by Russell King's patch[1], I found current tegra also has the
same issue of "reading 32-bits from the command register, modifying the
command register, and then writing it back has the effect of clearing
any status bits that were indicating at that time" as pointed out by
Russell. This
On Mon, 26 Oct 2015, Alim Akhtar wrote:
> From: Thomas Abraham
>
> Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
> PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
> clock outputs and battery charger. This patch adds initial support for
>
Hi Linus:
This push fixes a problem in the Crypto API that may cause spurious
errors when signals are received by the process that made the orignal
system call into the kernel.
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git linus
Herbert Xu (1):
Hi,
> On 24 oct. 2015, at 22:11, Jiri Kosina wrote:
>
> On Sat, 24 Oct 2015, Michele Baldessari wrote:
>
>> The Xin-Mo Dual Arcade controller (16c0:05e1) needs this quirk in order
>> to have the two distinct joysticks working.
>>
>> Before the change:
>> $ jstest /dev/input/js0
>> Joystick
From: Qipeng Zha
To be able to save some power when PWM is not in use, add support for
runtime PM for this driver. This also allows the platform to transition to
low power S0ix states when the system is idle.
Signed-off-by: Huiquan Zhong
Signed-off-by: Qipeng Zha
Signed-off-by: Mika
Hi Joe,
On Mon, Oct 26, 2015 at 11:47 AM, Lee Jones wrote:
> On Mon, 26 Oct 2015, Geert Uytterhoeven wrote:
>> On Mon, Oct 26, 2015 at 9:27 AM, Masahiro Yamada
>> wrote:
>> > 2015-10-26 17:17 GMT+09:00 Lee Jones :
>> >>> This series adds two I2C controller drivers.
>> >>> (they are completely
Signed-off-by: Lee Jones
---
drivers/reset/sti/reset-stih407.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/reset/sti/reset-stih407.c
b/drivers/reset/sti/reset-stih407.c
index d83db5d7..5c2d68a 100644
--- a/drivers/reset/sti/reset-stih407.c
+++
Signed-off-by: Lee Jones
---
include/dt-bindings/reset-controller/stih407-resets.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/reset-controller/stih407-resets.h
b/include/dt-bindings/reset-controller/stih407-resets.h
index 02d4328..4ab3a1c 100644
---
Signed-off-by: Lee Jones
---
drivers/reset/sti/reset-syscfg.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/reset/sti/reset-syscfg.c b/drivers/reset/sti/reset-syscfg.c
index a145cc0..4453412 100644
--- a/drivers/reset/sti/reset-syscfg.c
+++
On 26/10/15 10:23, Sascha Hauer wrote:
On Mon, Oct 26, 2015 at 09:56:14AM +, Srinivas Kandagatla wrote:
On 16/10/15 09:39, andrew-ct.c...@mediatek.com wrote:
From: Andrew-CT Chen
Add Mediatek MT8173 EFUSE Devicetree binding file
Signed-off-by: Andrew-CT Chen
Looks good to me,
Quoting Rafael J. Wysocki (2015-10-25 06:54:39)
> On Sun, Oct 25, 2015 at 12:06 AM, Mark Brown wrote:
> > On Sat, Oct 24, 2015 at 04:17:12PM +0200, Rafael J. Wysocki wrote:
> >
> >> Well, I'm not quite sure why exactly everyone is so focused on probing
> >> here.
> >
> > Probe deferral is really
From: Sanchayan Maity Sent: Monday, October 19, 2015
3:43 PM
>To: ji...@kernel.org
>Cc: ste...@agner.ch; Duan Fugang-B38611; linux-...@vger.kernel.org;
>linux->ker...@vger.kernel.org; Sanchayan Maity
>Subject: [PATCH] iio: adc: vf610_adc: Fix division by zero error
>
>In case the
On Mon, Oct 26, 2015 at 12:19:31PM +0530, raghu MG wrote:
> Hello,
> I have couple of questions.
> 1) In case of UP how is jiffies(timer) get updated while holding spin
> lock using spinlock_irq_save?
It isn't, and...
>
> 2)My understanding is in smp environment jiffies updation cannot be
> done
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to the s2mps11 clock driver.
Signed-off-by: Alim Akhtar
---
drivers/clk/Kconfig |5 +++--
drivers/clk/clk-s2mps11.c | 24
2 files changed, 27 insertions(+), 2
RTC found in s2mps15 is almost same as one found in s2mps14.
This patch add required changes to enable s2mps15 rtc timer.
Signed-off-by: Alim Akhtar
---
drivers/rtc/rtc-s5m.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-s5m.c
From: Thomas Abraham
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators and allows programming these regulators via a
I2C interface. This patch adds initial support for LDO/Buck regulators of
S2MPS15 PMIC.
Signed-off-by: Thomas Abraham
From: Thomas Abraham
Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
clock outputs and battery charger. This patch adds initial support for
LDO and buck regulators of S2MPS15 device.
On Mon, 26 Oct 2015, Geert Uytterhoeven wrote:
> On Mon, Oct 26, 2015 at 9:27 AM, Masahiro Yamada
> wrote:
> > 2015-10-26 17:17 GMT+09:00 Lee Jones :
> >>> This series adds two I2C controller drivers.
> >>> (they are completely different IPs.)
> >>>
> >>> The first one is a very simple FIFO-less
Samsung's S2MPS15 PMIC is targetted to be used with Samsung's Exynos7 SoC.
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators, RTC, three 32.768 KHz clock outputs and allows
programming these blocks via a I2C interface. This patch series adds
From: Thomas Abraham
Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
Cc: devicet...@vger.kernel.org
Signed-off-by: Thomas Abraham
Signed-off-by: Alim Akhtar
Reviewed-by: Krzysztof Kozlowski
The following changes since commit 1b647a166f07dcf08709c8606470f4b17a4aa11d:
Merge tag 'dmaengine-fix-4.2-rc8' of
git://git.infradead.org/users/vkoul/slave-dma (2015-08-18 12:17:36 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux.git
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