Invert the diagnostic data to match the orientation of the input device.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c
b/drivers/input/tou
Both T100 and T9 handle range and orientation in a similar fashion.
Reduce duplication between the two implementations.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 68
1 file changed, 26 insertions(+), 42 deletions(-)
diff --git a/dri
The touchscreen may have a margin where not all the matrix is used. Read
the parameters from T9 and T100 and take account of the difference.
Signed-off-by: Nick Dyer
---
drivers/input/touchscreen/atmel_mxt_ts.c | 41
1 file changed, 36 insertions(+), 5 deletions(
On Wed, Dec 02, 2015 at 08:34:38PM +, Simon Arlott wrote:
> On 02/12/15 20:21, Brian Norris wrote:
> > On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
> >> On 02/12/15 20:00, Brian Norris wrote:
> >> > On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
> >> >> I've crea
I'm not even looking at this patch series while it still causes
unresolved bugs.
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On Wed, Dec 2, 2015 at 12:39 PM, John Stultz wrote:
> Hey Uwe,
>
> So I recently noticed that my alarmtimer suspend/resume tests
> (selftests/timers/alartimer-suspend.c) were getting stuck testing w/
> 4.4-rc kernels when running under qemu (x86_64).
>
> I've bisected this back to: b8b2c7d845 (bas
On Thu, Dec 03, 2015 at 07:29:10AM +1100, Dave Chinner wrote:
> On Wed, Dec 02, 2015 at 11:34:38AM -0700, Ross Zwisler wrote:
> > I'm hitting a few more test failures in my testing setup with v4.4-rc3, xfs
> > and DAX. My test setup is a pair of 4GiB PMEM partitions in a KVM virtual
> > machine.
On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott wrote:
> On 01/12/15 10:41, Jonas Gorski wrote:
>> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott wrote:
>>> +
>>> + /* Go to start of buffer */
>>> + buf -= FC_WORDS;
>>> +
>>> + /* Erased if all data bytes are 0xFF */
>>> + buf
On 02/12/15 18:03, Florian Fainelli wrote:
> 2015-11-30 12:58 GMT-08:00 Simon Arlott :
>> The BCM63xx contains a soft-reset controller activated by setting
>> a bit (that must previously have cleared).
>>
>> Signed-off-by: Simon Arlott
>> ---
>> MAINTAINERS | 1 +
>> drivers/r
Replace dma_pool_alloc and memset with a single call to dma_pool_zalloc.
Caught by coccinelle.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/host/xhci-mem.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index
Replace dma_pool_alloc and memset with a single call to dma_pool_zalloc.
Caught by coccinelle.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/host/whci/qset.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/usb/host/whci/qset.c b/drivers/usb/host/whci/qset.c
index d
From: Will Deacon
Date: Wed, 2 Dec 2015 09:15:18 +
> On Tue, Dec 01, 2015 at 02:20:40PM -0800, Shi, Yang wrote:
>> On 11/30/2015 2:24 PM, Yang Shi wrote:
>> >aarch64 doesn't have native store immediate instruction, such operation
>> >has to be implemented by the below instruction sequence:
>>
Replace dma_pool_alloc and memset with a single call to dma_pool_zalloc.
Caught by coccinelle.
Signed-off-by: Geyslan G. Bem
---
drivers/usb/host/uhci-q.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c
index da6f56d..c
On Wed, 2015-12-02 at 11:57 -0800, Dan Williams wrote:
> On Wed, Dec 2, 2015 at 12:12 PM, Toshi Kani wrote:
> > On Wed, 2015-12-02 at 13:02 -0700, Toshi Kani wrote:
> > > On Wed, 2015-12-02 at 11:00 -0800, Dan Williams wrote:
> > > > On Wed, Dec 2, 2015 at 11:26 AM, Toshi Kani wrote:
> > > > > On
Hey Uwe,
So I recently noticed that my alarmtimer suspend/resume tests
(selftests/timers/alartimer-suspend.c) were getting stuck testing w/
4.4-rc kernels when running under qemu (x86_64).
I've bisected this back to: b8b2c7d845 (base/platform: assert that
dev_pm_domain callbacks are called uncond
On Wed, Dec 02, 2015 at 08:22:40PM +, Russell King - ARM Linux wrote:
> On Wed, Dec 02, 2015 at 08:51:04PM +0100, Arnd Bergmann wrote:
> > I'm mostly interested in it because it's the only ARMv7 platform that is
> > left after my other patches, and I just want to be done with it after
> > spend
On 02/12/15 20:21, Brian Norris wrote:
> Hi Simon,
>
> On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
>> On 02/12/15 20:00, Brian Norris wrote:
>> > On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
>> >> I've created a bcm963268part driver so there won't need to be any
On 12/02/2015 12:01 PM, Rasmus Villemoes wrote:
> On Mon, Nov 30 2015, Vlastimil Babka wrote:
>
> I'd prefer to have the formatting code in vsprintf.c, so that we'd avoid
> having to call vsnprintf recursively (and repeatedly - not that this is
> going to be used in hot paths, but if the box is g
From: Gregory CLEMENT
Date: Wed, 02 Dec 2015 09:16:06 +0100
> Hi David,
>
> On mer., déc. 02 2015, David Miller wrote:
>
>> From: Marcin Wojtas
>> Date: Mon, 30 Nov 2015 13:27:40 +0100
>>
>>> I'm sending v4 with corrected commit log of the last patch, in order
>>> to avoid possible conflict
Hi,
On 10/20/2015 11:18 AM, Tony Lindgren wrote:
Hi all,
* Dave Gerlach [150922 17:20]:
Hi,
This series is version 3 of the code to introduce a wkup_m3_ipc driver
to handle communication between the MPU and Cortex M3 present on TI AM335x
and AM437x SoCs. v2 of this series can be found at [1].
On Wed, Dec 02, 2015 at 11:34:38AM -0700, Ross Zwisler wrote:
> I'm hitting a few more test failures in my testing setup with v4.4-rc3, xfs
> and DAX. My test setup is a pair of 4GiB PMEM partitions in a KVM virtual
> machine. Here are the failures:
Which are caused by commit 1ca1915 ("xfs: Don'
The use of CONFIG_DEBUG_RODATA is generally seen as an essential part of
kernel self-protection:
http://www.openwall.com/lists/kernel-hardening/2015/11/30/13
Additionally, its name has grown to mean things beyond just rodata. To
get ARM closer to this, we ought to rearrange the names of the configs
On 02/12/15 12:53, Mark Brown wrote:
> On Wed, Dec 02, 2015 at 12:45:50PM -, Simon Arlott wrote:
>> On Tue, December 1, 2015 22:16, Mark Brown wrote:
>
>> > Why are these in the DT, I would expect that if this is a driver for a
>> > specific SoC all these properties would be known as a result
On Wed, Dec 02, 2015 at 12:21:27PM -0800, Brian Norris wrote:
> On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
> > Is there a patch for that method of parser detection available?
>
> I have something working here, but I haven't had time to finish cleaning
> it up and submitting it.
On Wed, Dec 02, 2015 at 08:51:04PM +0100, Arnd Bergmann wrote:
> I'm mostly interested in it because it's the only ARMv7 platform that is
> left after my other patches, and I just want to be done with it after
> spending 5 years on it ;-)
My understanding is that the long term goal is to delete ma
On Mon, Nov 09 2015 at 2:19P -0500,
Sami Tolvanen wrote:
> On Mon, Nov 09, 2015 at 11:37:35AM -0500, Mike Snitzer wrote:
> > I'm left wondering: can the new error correction code be made an
> > optional feature that is off by default? -- so as to preserve some
> > isolation of this new code from
Hi Simon,
On Wed, Dec 02, 2015 at 08:12:32PM +, Simon Arlott wrote:
> On 02/12/15 20:00, Brian Norris wrote:
> > On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
> >> I've created a bcm963268part driver so there won't need to be any
> >> partitions in DT for bcm63268.
> >
> > Jus
On 01/12/15 10:41, Jonas Gorski wrote:
> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott wrote:
>> +
>> + /* Go to start of buffer */
>> + buf -= FC_WORDS;
>> +
>> + /* Erased if all data bytes are 0xFF */
>> + buf_erased = memchr_inv(buf, 0xFF, FC_WORDS) == NULL;
>> +
>> +
Hi Greg,
Today's linux-next merge of the staging tree got a conflict in
drivers/staging/rtl8188eu/include/phy.h between Linus' tree and commit
"staging: rtl8188eu: using unique names is good" from the staging tree.
It looks like the patch is already applied so I skipped it.
pgpZt49LSNUZq.pgp
De
On Wed, Nov 04 2015 at 9:02P -0500,
Sami Tolvanen wrote:
> Move optional argument parsing into a separate function to make it
> easier to add more of them without making verity_ctr even longer.
>
> Signed-off-by: Sami Tolvanen
I've taken this patch, for Linux 4.5, but I've applied the followi
Hello Dmitry,
On 11/20/2015 04:46 PM, Javier Martinez Canillas wrote:
> On 11/20/2015 04:32 PM, Javier Martinez Canillas wrote:
>
> [snip]
>
>>
>> But is not complete because the .driver_data in i2c_device_id is an
>> kernel_ulong_t while the .data in of_device_id is a const void * so
>> some ca
The patch
regulator: core: Ensure we lock all regulators
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
Hi,
On Wed, Dec 02, 2015 at 07:54:49PM +, Simon Arlott wrote:
> On 02/12/15 19:18, Brian Norris wrote:
> > On Wed, Nov 25, 2015 at 07:49:13PM +, Simon Arlott wrote:
> >> +static int bcm63268_nand_probe(struct platform_device *pdev)
> >> +{
> >> + struct device *dev = &pdev->dev;
> >> + s
The patch
regulator: lp8788-ldo: Use platform_register/unregister_drivers()
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
On 02/12/15 20:00, Brian Norris wrote:
> Hi,
>
> On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
>> >> + nand0: nandcs@0 {
>> >> + compatible = "brcm,nandcs";
>> >> +
>> >> + #address-cells = <0>;
>> >> + #size-cells = <0>;
>
>> I think they're also implicit
On Wed, Dec 2, 2015 at 10:34 AM, Ross Zwisler
wrote:
> I'm hitting a few more test failures in my testing setup with v4.4-rc3, xfs
> and DAX. My test setup is a pair of 4GiB PMEM partitions in a KVM virtual
> machine. Here are the failures:
>
Is this a passing test with a v4.3 baseline? git bi
The patch
regulator: core: Fix nested locking of supplies
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) an
The patch
regulator: wm831x-ldo: Use platform_register/unregister_drivers()
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
The patch
regulator: wm831x-dcdc: Use platform_register/unregister_drivers()
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in th
On Wed, 2015-12-02 at 11:35 -0800, Jin Qian wrote:
> From: Alex Bennée
>
> You just make it harder to figure out when commands are being used.
>
> Signed-off-by: Alex Bennée
> Signed-off-by: Jin Qian
> ---
> drivers/platform/goldfish/goldfish_pipe.c | 16 +---
> 1 file changed, 5
[0.00] tsc: PIT calibration matches HPET. 2 loops
[0.00] tsc: Detected 2399.975 MHz processor
[0.090897] TSC deadline timer enabled
[1.960034] tsc: Refined TSC clocksource calibration: 2400.007 MHz
[1.960039] clocksource: tsc: mask: 0x max_cycles:
0x22983
On Tue, 2015-12-01 at 09:19 -0800, Tim Chen wrote:
> On Thu, 2015-11-26 at 16:49 +0800, Herbert Xu wrote:
> > On Tue, Nov 24, 2015 at 10:30:06AM -0800, Tim Chen wrote:
> > >
> > > On the decrypt path, we don't need to use multi-buffer algorithm
> > > as aes-cbc decrypt can be parallelized inherentl
* Brian Norris [151202 10:14]:
> On Wed, Dec 02, 2015 at 07:03:17AM -0800, Tony Lindgren wrote:
> > * Roger Quadros [151201 21:13]:
> > > On 02/12/15 08:56, Brian Norris wrote:
> > > >
> > > > I'll take another pass over your patch set, but if things are looking
> > > > better, how do you expect
The suggestions look reasonable to me too.
>Arvind, since I was originally just resending your patch, do you want
>to make the changes Johannes suggests, or should I proceed with that?
> josh
Hi Josh,
Feel free to send out the updated patch if you would like.
Thanks!
Arvind
On 02/12/15 19:38, Florian Fainelli wrote:
> 2015-12-02 11:05 GMT-08:00 Brian Norris :
>> + Broadcom list + Kamal
>>
>> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>>> Add device tree binding for NAND on the BCM63268.
>>>
>>> The BCM63268 has a NAND interrupt register with combine
This patch implements in-order scheduler for encrypting multiple buffers
in parallel supporting AES CBC encryption with key sizes of
128, 192 and 256 bits. It uses 8 data lanes by taking advantage of the
SIMD instructions with XMM registers.
The multibuffer manager and scheduler is mostly written
This patch introduces the assembly routine to do a by8 AES CBC encryption
in support of the AES CBC multi-buffer implementation.
Encryption of 8 data streams of a key size are done simultaneously.
Originally-by: Chandramouli Narayanan
Signed-off-by: Tim Chen
---
arch/x86/crypto/aes-cbc-mb/aes
Waiman Long writes:
> If a system with large number of sockets was driven to full
> utilization, it was found that the clock tick handling occupied a
> rather significant proportion of CPU time when fair group scheduling
> and autogroup were enabled.
>
> Running a java benchmark on a 16-socket Iv
This patch introduces the multi-buffer job manager which is responsible
for submitting scatter-gather buffers from several AES CBC jobs
to the multi-buffer algorithm. The glue code interfaces with the
underlying algorithm that handles 8 data streams of AES CBC encryption
in parallel. AES key expan
This patch introduces the data structures and prototypes of functions
needed for doing AES CBC encryption using multi-buffer. Included are
the structures of the multi-buffer AES CBC job, job scheduler in C and
data structure defines in x86 assembly code.
Originally-by: Chandramouli Narayanan
Sig
In this patch series, we introduce AES CBC encryption that is parallelized
on x86_64 cpu with XMM registers. The multi-buffer technique encrypt 8
data streams in parallel with SIMD instructions. Decryption is handled
as in the existing AESNI Intel CBC implementation which can already
parallelize d
In this patch, the infrastructure needed to support multibuffer
encryption implementation is added:
a) Enhace mcryptd daemon to support blkcipher requests.
b) Update configuration to include multi-buffer encryption build support.
For an introduction to the multi-buffer implementation, please se
The units[] array could be accessed out of its bounds due the lack of
verification of the max vector value.
To make this function not prone to error "P" and "E" suffixes were added.
Despite the new suffixes are unrelated to current ia64 vm magnitudes, they
make the code ready for it and avoid misl
Hi,
On Wed, Dec 02, 2015 at 07:41:07PM +, Simon Arlott wrote:
> >> + nand0: nandcs@0 {
> >> + compatible = "brcm,nandcs";
> >> + reg = <0>;
> >> + nand-on-flash-bbt;
> >> + nand-ecc-strength = <1>;
> >> + nand-ecc-step-size = <512>;
> >> +
> >> +
On Wed, Dec 2, 2015 at 12:12 PM, Toshi Kani wrote:
> On Wed, 2015-12-02 at 13:02 -0700, Toshi Kani wrote:
>> On Wed, 2015-12-02 at 11:00 -0800, Dan Williams wrote:
>> > On Wed, Dec 2, 2015 at 11:26 AM, Toshi Kani wrote:
>> > > On Wed, 2015-12-02 at 10:06 -0800, Dan Williams wrote:
>> > > > On Wed
On Wed, Dec 02, 2015 at 08:46:54PM +0800, Baolin Wang wrote:
> These are the benchmarks for request based dm-crypt. Please check it.
Now please put request-based dm-crypt completely to one side and focus
just on the existing bio-based code. Why is it slower and what can be
adjusted to improve th
On 02/12/15 19:18, Brian Norris wrote:
> + Broadcom list + Kamal
>
> Hi Simon,
>
> On Wed, Nov 25, 2015 at 07:49:13PM +, Simon Arlott wrote:
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers. It also has a clock for the NAND controller that needs to be
Waiman Long writes:
> Currently, the update_tg_load_avg() function attempts to update the
> tg's load_avg value whenever the load changes even for root_task_group
> where the load_avg value will never be used. This patch will disable
> the load_avg update when the given task group is the root_tas
On Wednesday 02 December 2015 19:37:08 Russell King - ARM Linux wrote:
> On Wed, Dec 02, 2015 at 07:28:25PM +, Russell King - ARM Linux wrote:
> > The first is easy to solve, and the second by replacing it with dove.h.
> > The next problem is this:
> >
> > arch/arm/plat-orion/common.c:25:30: f
Mark Brown writes:
> Hi Rusty,
>
> After merging the modules tree, today's linux-next x86 allmodconfig build
> (20151201) failed like this:
>
> /home/broonie/next/next/arch/x86/kernel/livepatch.c: In function
> 'klp_write_module_reloc':
> /home/broonie/next/next/arch/x86/kernel/livepatch.c:75:22
On Wednesday 02 December 2015 19:28:25 Russell King - ARM Linux wrote:
>
> As I said above, that's not the problem, the problem is merging it into
> the rest of my tree.
>
> Having done most of that merge, I'm now tripping up on:
>
> arch/arm/mach-dove/common.c: In function 'dove_wdt_init':
> ar
Hello.
On 12/02/2015 07:52 PM, Salil Mehta wrote:
This patch adds the initializzation code to disable the hardware
vlan support for VLAN Tag stripping by default for now.
Proper support of "hardware VLAN assitance" feature would
soon come in the next coming patches.
Signed-off-by: Salil Mehta
From: Jason Hu
Add ACPI binding to the android pipe driver
Signed-off-by: Jason Hu
Signed-off-by: Jin Qian
---
drivers/platform/goldfish/goldfish_pipe.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/platform/goldfish/goldfish_pipe.c
b/drivers/platform/goldfish/goldfish_
On Mon, Nov 30, 2015 at 10:45:11AM +0530, Vignesh R wrote:
> In addition to providing direct access to SPI bus, some spi controller
> hardwares (like ti-qspi) provide special port (like memory mapped port)
> that are optimized to improve SPI flash read performance.
I'm reasonably OK with this from
From: Alex Bennée
You just make it harder to figure out when commands are being used.
Signed-off-by: Alex Bennée
Signed-off-by: Jin Qian
---
drivers/platform/goldfish/goldfish_pipe.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/platform/goldfis
On 02/12/15 19:05, Brian Norris wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-
2015-12-02 11:05 GMT-08:00 Brian Norris :
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-
On Wed, Dec 2, 2015 at 8:05 PM, Brian Norris
wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>>
On Wed, Dec 02, 2015 at 07:28:25PM +, Russell King - ARM Linux wrote:
> The first is easy to solve, and the second by replacing it with dove.h.
> The next problem is this:
>
> arch/arm/plat-orion/common.c:25:30: fatal error: mach/bridge-regs.h: No such
> file or directory
>
> which is imposs
From: Christoffer Dall
The existing code had a troubling TODO statement concerning the fact
that it just did a check if the page that the QEMU backend was going to
read from / write to was there before the call to the QEMU backend and
then relying on the fact that the page stayed around, even in
The interrupt handler, ohci_hcd_at91_overcurrent_irq may be called right
after registration. At that time, pdev->dev.platform_data is not yet set,
leading to a NULL pointer dereference.
Fixes: e4df92279fd9 (USB: host: ohci-at91: merge loops in
ohci_hcd_at91_drv_probe)
Reported-by: Peter Rosin
Te
From: Greg Hackmann
On PIPE_ERROR_AGAIN, just stopping in the middle of a transfer and
returning the number of bytes actually handled is the right behavior.
Other errors should be returned on the next read() or write() call.
Continue logging those until we confirm nothing actually relies on the
> -Original Message-
> From: Stephane Eranian [mailto:eran...@google.com]
> Sent: Wednesday, December 02, 2015 1:28 PM
> To: linux-kernel@vger.kernel.org
> Cc: a...@redhat.com; pet...@infradead.org; mi...@elte.hu;
> a...@linux.intel.com; Liang, Kan
> Subject: [PATCH v1 2/2] perf/x86: add
From: Greg Hackmann
Add bindings so we don't need to rely on goldfish virtual bus for
probing any more, which means we don't need ARM and MIPS goldfish
board code for instantiating the bus.
In the long term we would like to move towards replacing the Android
pipe with virtio-vsock that is curren
From: Yu Ning
For reading and writing guest user space buffers, currently the kernel
sends the guest virtual address of the buffer to the pipe device. This
virtual address has to be first converted to a guest physical address.
Doing this translation on the QEMU side is inefficient and requires
ad
From: Miodrag Dinic
Enable CONFIG_GOLDFISH for MIPS platforms.
Signed-off-by: Miodrag Dinic
Signed-off-by: Jin Qian
---
drivers/platform/goldfish/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/goldfish/Kconfig
b/drivers/platform/goldfish/Kconfig
From: Greg Hackmann
On new virtual devices, the goldfish virtual bus can be replaced with
autoprobing infrastructure like Device Tree. Refactor the goldfish
kernel configs to better accommodate this.
Move the goldfish platform into a menuconfig in the style of the chrome
platform, and separate
This is to upstream a few patches to fix issues in existing goldfish
drivers so that android kernel team don't have to maintain cleanup patches
outside mainline kernel tree.
Alex Bennée (1):
android_pipe: don't be clever with #define offsets
Christoffer Dall (1):
android_pipe: Pin pages to me
Emil Velikov writes:
> On 1 December 2015 at 20:35, Eric Anholt wrote:
>> This can be parsed with vc4-gpu-tools tools for trying to figure out
>> what was going on.
>>
> I might be pushing my luck here ... have you thought about basing
> (forking) vc4-gpu-tools of intel-gpu-tools ? I'd imagine t
Hi Alexandre,
On 2015-12-02 19:20, Alexandre Belloni wrote:
> Hi Peter,
>
> On 01/12/2015 at 18:17:16 +0100, Peter Rosin wrote :
>> [] (ohci_hcd_at91_overcurrent_irq) from []
>> (handle_irq_event_percpu+0x78/0x140)
>> [] (handle_irq_event_percpu) from []
>> (handle_irq_event+0x2c/0x40)
>> [] (h
On Wed, Dec 02, 2015 at 04:49:38PM +0100, Arnd Bergmann wrote:
> On Wednesday 02 December 2015 12:33:10 Russell King - ARM Linux wrote:
> > On Mon, Nov 30, 2015 at 02:37:31PM +0100, Gregory CLEMENT wrote:
> > > Hi Arnd,
> > >
> > > On mer., nov. 25 2015, Arnd Bergmann wrote:
> > >
> > > > I've
Emil Velikov writes:
> Hi Eric,
>
> On 1 December 2015 at 20:35, Eric Anholt wrote:
>> The user submission is basically a pointer to a command list and a
>> pointer to uniforms. We copy those in to the kernel, validate and
>> relocate them, and store the result in a GPU BO which we queue for
>>
On Wed, Dec 02, 2015 at 04:38:29PM +0100, Hubert Chrzaniuk wrote:
> From: Jim Snow
>
> Make EDAC aware of DDR4/RDDR4 mem types.
>
> Signed-off-by: Jim Snow
> Signed-off-by: Lukasz Anaczkowski
> Signed-off-by: Hubert Chrzaniuk
How am I to understand this SoB chain?
Jim wrote it, Lukasz did s
On Wed, Dec 02, 2015 at 11:20:44AM -0800, Dmitry Torokhov wrote:
> This makes Logitech PS2++ protocol implementation consistent with
> the naming in other protocols.
>
> Signed-off-by: Dmitry Torokhov
Well, if I did not forget to add drivers/input/mouse/logips2pp.c that
woudl be better...
> ---
This makes Logitech PS2++ protocol implementation consistent with
the naming in other protocols. Also mark the stub as "static inline"
Signed-off-by: Dmitry Torokhov
---
V2: add forgotten drivers/input/mouse/logips2pp.c file.
drivers/input/mouse/logips2pp.c| 2 +-
drivers/input/mouse/logip
Emil Velikov writes:
> Hi Eric,
>
> On 1 December 2015 at 20:35, Eric Anholt wrote:
>> Since we have no MMU, the kernel needs to validate that the submitted
>> shader code won't make any accesses to memory that the user doesn't
>> control, which involves banning some operations (general purpose
This makes Logitech PS2++ protocol implementation consistent with
the naming in other protocols.
Signed-off-by: Dmitry Torokhov
---
drivers/input/mouse/logips2pp.h| 4 ++--
drivers/input/mouse/psmouse-base.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/input
+ Broadcom list + Kamal
Hi Simon,
On Wed, Nov 25, 2015 at 07:49:13PM +, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
>
> Set up the device by enabling the
include/acpi/actbl2.h is the proper place for these definitions
and the needed TPM2 ones have been there since
commit 413d4a6defe0 ("ACPICA: Update TPM2 ACPI table")
This also drops the le32_to_cpu for members of this table,
consistent with other ACPI stuff.
Signed-off-by: Jason Gunthorpe
---
d
Hi Hans,
On Wed, Dec 02, 2015 at 04:20:48PM +0100, Hans de Goede wrote:
> Hi,
>
> Thanks for splitting out the series, patches 1 - 4 look good to me and are:
>
> Reviewed-by: Hans de Goede
>
> I've some comments inline for this one.
Thanks for spending time on reviewing this.
> >@@ -1025,68
On Wed, 2015-12-02 at 13:02 -0700, Toshi Kani wrote:
> On Wed, 2015-12-02 at 11:00 -0800, Dan Williams wrote:
> > On Wed, Dec 2, 2015 at 11:26 AM, Toshi Kani wrote:
> > > On Wed, 2015-12-02 at 10:06 -0800, Dan Williams wrote:
> > > > On Wed, Dec 2, 2015 at 9:01 AM, Dan Williams
> > > > wrote:
> >
On 11/06/2015 05:02 PM, Guenter Roeck wrote:
On Fri, Nov 06, 2015 at 11:53:42AM -0800, Tim Harvey wrote:
On Thu, Nov 5, 2015 at 2:23 PM, Guenter Roeck wrote:
On Thu, Nov 05, 2015 at 04:19:21PM -0500, Akshay Bhat wrote:
From: Tim Harvey
The IMX6 watchdog supports assertion of a signal (WDO
On Wed, Dec 02, 2015 at 11:27:27AM -0700, Jason Gunthorpe wrote:
> I'm guessing that if the driver probe order is tpm_crb,tpm_tis then
> things work because tpm_crb will claim the device first? Otherwise
> tpm_tis claims these things unconditionally? If the probe order is
> reversed things become
The subject is reading mpc52xx instead of mpc85xx but other than that
Reviewed-by: Johannes Thumshirn
Zitat von Thierry Reding :
From: Thierry Reding
These new helpers simplify implementing multi-driver modules and
properly handle failure to register one driver by unregistering all
previous
On Wed, Dec 02, 2015 at 10:06:09AM -0700, Jens Axboe wrote:
> On 12/02/2015 01:25 AM, Mike Krinkin wrote:
> >Hi Jens,
> >
> >i would like to check status of the patch, will the patch be applied?
> >
>
> Why aren't you just putting the split trace call into blk_queue_split()?
Do you mean after spl
The units[] array could be accessed out of its bounds due the lack of
verification of the max vector value.
To make this function not prone to error "P" and "E" suffixes were added.
Despite the new suffixes are unrelated to current ia64 vm magnitudes, they
make the code ready for it and avoid misl
On Wed, 2015-12-02 at 11:00 -0800, Dan Williams wrote:
> On Wed, Dec 2, 2015 at 11:26 AM, Toshi Kani wrote:
> > On Wed, 2015-12-02 at 10:06 -0800, Dan Williams wrote:
> > > On Wed, Dec 2, 2015 at 9:01 AM, Dan Williams
> > > wrote:
> > > > On Wed, Dec 2, 2015 at 9:43 AM, Toshi Kani wrote:
> > > >
+ Broadcom list + Kamal
On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
>
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
>
> Signed-off-by: Simon Arlott
> ---
> .../devicetree/bindings/
On 12/1/2015 4:16 PM, Sinan Kaya wrote:
>>>
> +static enum dma_status hidma_tx_status(struct dma_chan *dmach,
> +dma_cookie_t cookie, struct dma_tx_state
> *txstate)
> +{
> +struct hidma_chan *mchan = to_hidma_chan(dmach);
>
On Wed, Dec 02, 2015 at 09:32:34PM +0300, Andrey Ryabinin wrote:
> 2015-12-02 20:14 GMT+03:00 Chris Mason :
> > On Wed, Dec 02, 2015 at 11:09:43AM -0500, Dave Jones wrote:
> >> On Wed, Dec 02, 2015 at 10:11:28AM -0500, Josef Bacik wrote:
> >> > On 12/02/2015 09:59 AM, Dave Jones wrote:
> >> > > G
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