---
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 02c27004d4a
The power partitions L2, HEG, CELP and C1NC do not exist for T210 but were
incorrectly documented in the TRM. These will be removed from the TRM and
so also remove their definitions for T210.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 4
1 file changed, 4 deletions(-)
diff --g
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
the tegra210 device. Add this clock for tegra210.
Signed-off-by: Jon Hunter
---
drivers/clk/tegra/clk-id.h | 1 +
drivers/clk/tegra/cl
Add the audio power-domain for tegra210. Note that this also removes the
existing "#power-domain-cells" which was incorrectly included by
commit e53095857166 ("arm64: tegra: Add Tegra210 support").
Signed-off-by: Jon Hunter
---
So far I have only added the audio power-domain for tegra210 as thi
Adds generic PM support to the PMC driver where the PM domains are
populated from device-tree and the PM domain consumer devices are
bound to their relevant PM domains via device-tree as well.
Update the tegra_powergate_sequence_power_up() API so that internally
it calls the same tegra_powergate_x
Enable PM_GENERIC_DOMAINS for tegra 64-bit devices. To ensure that devices
dependent upon a particular power-domain are only probed when that power
domain has been powered up, requires that PM is made mandatory for tegra
64-bit devices and so select this option for tegra as well.
Signed-off-by: Jo
The debugfs entry for the PMC device will not be removed if the probe of
the device fails on registering the restart handler and so fix this so
that it is removed.
Signed-off-by: Jon Hunter
---
drivers/soc/tegra/pmc.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git
From: Vince Hsu
Add of_reset_control_get_by_index() to allow the drivers to get reset
device without knowing its name.
Signed-off-by: Vince Hsu
[jonath...@nvidia.com: Updated stub function to return -ENOTSUPP instead
of -ENOSYS which should only be used for system calls.]
Signed-off-by: Jon Hu
Sparse reports the following warning for tegra_pmc_init_tsense_reset:
drivers/soc/tegra/pmc.c:741:6: warning: symbol
'tegra_pmc_init_tsense_reset' was not declared. Should it be static?
This function is only used internally by the PMC driver and so fix this
by making it static.
Signed-off-by: Jo
Adds generic PM domain support for Tegra SoCs but so far it is only
enabled Tegra 64-bit devices. There is no reason why this cannot be
enabled for Tegra 32-bit devices, but to keep the patch series to a
minimum only 64-bit devices are enabled.
This series has been boot tested on Tegra210 as well
On Wed, Dec 02, 2015 at 09:03:18PM +, Simon Arlott wrote:
> Add device tree binding for the BCM6345 soft reset controller.
>
> The BCM6345 contains a soft-reset controller activated by setting
> a bit (that must previously have cleared).
>
> Signed-off-by: Simon Arlott
> ---
> Renamed to bcm
On 04/12/15 03:24, Wang Hongcheng wrote:
Because amd iommu and software iommu need this mask.For example,
if we use software iommu without this mask, we will
get 'Out of SW-IOMMU space' error, when calling swiotlb_map_page
function.
The commit title doesn't match the code, but either way this p
On Thu, Dec 03, 2015 at 09:26:27PM +0100, Peter Zijlstra wrote:
> On Thu, Dec 03, 2015 at 04:37:26PM +, Will Deacon wrote:
> > > +#define smp_cond_acquire(cond) do {\
> > > + while (!(cond)) \
> > > + cpu_relax();\
> > > + smp_rm
On 4 December 2015 at 14:05, Fu, Zhonghui wrote:
> Now, PM core supports asynchronous suspend/resume mode for devices
> during system suspend/resume, and the power state transition of one
> device may be completed in separate kernel thread. PM core ensures
> all power state transition dependency b
On 25 November 2015 at 19:26, Saurabh Sengar wrote:
> If no primary handler is specified for threaded_irq then a
> default one is assigned which always returns IRQ_WAKE_THREAD.
> This handler requires the IRQF_ONESHOT, because the source of
> interrupt is not disabled
>
> Signed-off-by: Saurabh Se
On 30 November 2015 at 02:27, Chaotian Jing wrote:
> there is a time window between __mmc_send_status() and time_afer(),
> on some eMMC chip, the timeout_ms is only 10ms, if this thread was
> scheduled out during this period, then, even card has already changes
> to transfer state by the result of
On 1 December 2015 at 13:12, Chaotian Jing wrote:
> there are too many error logs shown when use CMD21/CMD19 to do tune,
> and it will appear at each resume time, print out so many logs to the
> uart console cost too mush time. so change it to dev_dbg.
>
> Signed-off-by: Chaotian Jing
This one d
On Wed, Dec 02, 2015 at 11:35:59AM -0800, Jin Qian wrote:
> From: Greg Hackmann
>
> Add bindings so we don't need to rely on goldfish virtual bus for
> probing any more, which means we don't need ARM and MIPS goldfish
> board code for instantiating the bus.
>
> In the long term we would like to
2015-12-03 19:02 GMT+01:00 Javier Martinez Canillas :
> When the WiFi support was added to the IGEP0020 board, the MMC subsystem
> did not provide a mechanism to define power sequence providers. So a DT
> hack was used to toggle the WiFi chip reset and power down pins by using
> fake fixed regulato
Inorder to notify the user that value is not successfuly set in sys
entry, error should be returned from store function instead of count
Signed-off-by: Saurabh Sengar
---
drivers/staging/speakup/kobjects.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/sp
On Wed, Dec 02, 2015 at 05:16:36PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> These new helpers simplify implementing multi-driver modules and
> properly handle failure to register one driver by unregistering all
> previously registered drivers.
>
> Signed-off-by: Thierry Reding
P
On 20/11/2015 19:52, Borislav Petkov wrote:
> From: Borislav Petkov
>
> It looks like this in action:
>
> kvm [5197]: vcpu0, guest rIP: 0x810187ba unhandled rdmsr: 0xc001102
>
> and helps to pinpoint quickly where in the guest we did the unsupported
> thing.
>
> Signed-off-by: Bori
On Tue, Dec 01, 2015 at 12:44:15PM +0100, Christophe Leroy wrote:
> This patch adds the following algorithms to the talitos driver:
> * ecb(aes)
> * ctr(aes)
> * ecb(des)
> * cbc(des)
> * ecb(des3_ede)
>
> Signed-off-by: Christophe Leroy
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page:
On Mon, Nov 30, 2015 at 04:19:03PM -0200, Leonidas Da Silva Barbosa wrote:
> IV size was zero on CBC and CTR modes,
> causing a bug triggered by skcipher.
>
> Fixing this adding a correct size.
>
> Signed-off-by: Leonidas Da Silva Barbosa
> Signed-off-by: Paulo Smorigo
Patch applied. Thanks.
On Sun, Nov 29, 2015 at 10:45:32PM +0800, Rui Wang wrote:
> ghash_clmulni_intel fails to load on Linux 4.3+ with the following message:
> "modprobe: ERROR: could not insert 'ghash_clmulni_intel': Invalid argument"
>
> These two patches need to go together, for the driver to load correctly.
>
> Ru
On Fri, Nov 27, 2015 at 04:50:43PM +0100, Jiri Slaby wrote:
> hwrng kthread can be waiting via hwrng_fillfn for some data from a rng
> like virtio-rng:
> hwrng D 880093e17798 0 382 2 0x
> ...
> Call Trace:
> [] wait_for_completion_killable+0x96/0x210
> [] virtio_r
Hi Yoshinori,
[auto build test ERROR on daniel.lezcano/clockevents/next]
[also build test ERROR on next-20151203]
[cannot apply to uclinux-h8/h8300-next v4.4-rc3]
url:
https://github.com/0day-ci/linux/commits/Yoshinori-Sato/clocksource-h8300-driver-update/20151204-201553
base: http
On Thu, Dec 03, 2015 at 08:08:39AM -0800, Eric Dumazet wrote:
>
> Anyway, __vmalloc() can be used with GFP_ATOMIC, have you tried this ?
OK I've tried it and I no longer get any ENOMEM errors!
---8<---
When an rhashtable user pounds rhashtable hard with back-to-back
insertions we may end up growi
> > @@ -339,9 +340,19 @@ static int ksz9021_config_init(struct phy_device
> > *phydev)
> > {
> > const struct device *dev = &phydev->dev;
> > const struct device_node *of_node = dev->of_node;
> > + const struct device *dev_walker;
> >
> > - if (!of_node && dev->parent->of_node)
> >
On Tue, Dec 01, 2015 at 01:47:19PM +0800, Chen-Yu Tsai wrote:
> From: Maxime Ripard
>
> Like the previous designs, the A80 has a special pin controller for the
> critical pins, like the PMIC bus.
>
> Add a driver for this controller.
>
> Signed-off-by: Maxime Ripard
> [wens: Add A80 compatible
2015-12-03 20:27 GMT+01:00 Tony Lindgren :
> * Javier Martinez Canillas [151203 10:29]:
>> Hello Tony,
>>
>> On 12/03/2015 03:16 PM, Tony Lindgren wrote:
>> > * Javier Martinez Canillas [151203 10:03]:
>> >> Hello,
>> >>
>> >> This series converts the IGEPv2 (IGEP0020) and IGEP COM Module (IGEP00
On Fri, Dec 04, 2015 at 01:19:35PM +, Wan, Vincent wrote:
> > > + ivrs_acpihid[HW,X86_64]
> > > + Provide an override to the ACPI-HID:UID<->DEVICE-ID
> > > + mapping provided in the IVRS ACPI table. For
> > > + example, to map UART-HID:UID AMD
2015-12-03 19:02 GMT+01:00 Javier Martinez Canillas :
> When the WiFi support was added to the IGEP0030 board, the MMC subsystem
> did not provide a mechanism to define power sequence providers. So a DT
> hack was used to toggle the WiFi chip reset and power down pins by using
> fake fixed regulato
* Paolo Bonzini wrote:
> On 04/12/2015 13:33, Igor Mammedov wrote:
> > That doesn't pass strict type check:
> >
> > include/linux/kernel.h:730:17: warning: comparison of distinct pointer
> > types lacks a cast [enabled by default]
> > (void) (&_max1 == &_max2); \
> > ^
> >
On Thu, Dec 03, 2015 at 07:16:10PM -0500, Ashok Raj wrote:
> Linux has logical cpu offline capability. That can be triggered by:
>
> # echo 0 > /sys/devices/system/cpu/cpuX/online
>
> In Intel Architecture, MCE's are broadcasted to all CPUs in the system.
>
> This includes the CPUs marked offlin
On Mon, Nov 30, 2015 at 08:52:55PM +, Simon Arlott wrote:
> Add device tree binding for the BCM63xx's gated clocks.
>
> The BCM63xx contains clocks gated with a register. Clocks are indexed
> by bits in the register and are active high. Clock gate bits are
> interleaved with other status bits
> On 02.12.2015, at 00:12, Mark Brown wrote:
>
> On Tue, Dec 01, 2015 at 04:51:06PM -, Michal Suchanek wrote:
>
>> +static inline size_t
>> +spi_max_transfer_size(struct spi_device *spi)
>> +{
>> +struct spi_master *master = spi->master;
>> +if (!master->max_transfer_size)
>> +
Hi Eric,
A couple of suggestions/requests on the UAPI header side
On 1 December 2015 at 20:35, Eric Anholt wrote:
> --- /dev/null
> +++ b/include/uapi/drm/vc4_drm.h
> +#include
> +
Can we make this a "drm.h" ?
> +struct drm_vc4_create_bo {
> + uint32_t size;
> + uint32_t flags;
CONFIG_SCSI_MPT2SAS was added as a backwards-compatibility helper that
selects the replacement SCSI_MPT3SAS symbol, but lacks the dependencies:
warning: (SCSI_MPT2SAS) selects SCSI_MPT3SAS which has unmet direct
dependencies (SCSI_LOWLEVEL && PCI && SCSI)
0x7E5F9A79 Fri Dec 4 12:36:08 CET 2015 fa
Hi Andrey,
[auto build test WARNING on next-20151203]
[cannot apply to tip/x86/core kbuild/rc-fixes v4.4-rc3 v4.4-rc2 v4.4-rc1
v4.4-rc3]
url:
https://github.com/0day-ci/linux/commits/Andrey-Ryabinin/UBSAN-run-time-undefined-behavior-sanity-checker/20151204-202547
config: i386-allmodconfig
Fixes: 58383c78425e4ee1 ("gpio: change member .dev to .parent")
Signed-off-by: Geert Uytterhoeven
---
drivers/gpio/gpio-pcf857x.c| 2 +-
drivers/gpio/gpio-tz1090-pdc.c | 2 +-
drivers/gpio/gpio-tz1090.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gp
the simple_strtoul function is obsolete. This patch replace it by
kstrtox.
Signed-off-by: LABBE Corentin
---
drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 10 -
drivers/net/ethernet/chelsio/cxgb3/t3_hw.c | 28 ++---
2 files changed, 25 insertions(+), 13 delet
On 4 December 2015 at 00:09, Sanidhya Solanki wrote:
> Staging: Skein: Moved macros from skein_block.c to header file.
>
> The original code defined macros in the source code, making it harder to
> read. Move them to the header file.
The patch didn't end up mangled on my side but definitely did n
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:52 +0800
Jisheng Zhang wrote:
> The Marvell BG4CT STB board has board level vbus control through gpio.
> This patch adds the vbus regulator control to support this board.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/usb/host/xhci-plat.
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:51 +0800
Jisheng Zhang wrote:
> Marvell BG4CT SoC needs two phy: one for usb2 and another for usb3. Add
> the calls to retrieve generic PHY to xhci plat in order to support this.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/usb/host/xhc
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:50 +0800
Jisheng Zhang wrote:
> Commit 63589e92c2d9 ("clk: Ignore error and NULL pointers passed to
> clk_{unprepare, disable}()") allows NULL or error pointer to be passed
> unconditionally.
>
> This patch is to simplify probe error and remo
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:49 +0800
Jisheng Zhang wrote:
> Sorting the headers in alphabetic order will help to reduce the conflict
> when adding new headers later.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/usb/host/xhci-plat.c | 4 ++--
> 1 file changed, 2 in
On 30 November 2015 at 14:10, Gabriel Laskar wrote:
> Signed-off-by: Gabriel Laskar
> CC: Emil Velikov
> CC: Mikko Rapeli
>
> ---
> include/uapi/drm/virtgpu_drm.h | 98
> +-
> 1 file changed, 49 insertions(+), 49 deletions(-)
>
For the series
Reviewed-b
On Fri, Dec 04, 2015 at 05:57:05AM -0800, Kees Cook wrote:
> We need a EHAHANOPE errno and have write return that. ;)
Sure, lemme add it to glibc:
---
diff --git a/manual/errno.texi b/manual/errno.texi
index 1068be3a5072..ec92cc00f81b 100644
--- a/manual/errno.texi
+++ b/manual/errno.texi
@@ -127
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:47 +0800
Jisheng Zhang wrote:
> Commit 7b8ef22ea547 ("usb: xhci: plat: Add USB phy support") adds the
> usb_phy for usb3, but it attached the usb_phy to incorrect hcd. The
> xhci->shared_hcd is the hcd for usb3, this patch fixes this issue
> b
On 12/03/2015 07:38 PM, yalin wang wrote:
that’s all, see cpumask_pr_args(masks) macro,
it also use macro and %*pb to print cpu mask .
i think this method is not very complex to use .
Well, one also has to write the appropriate translation tables.
search source code ,
there is lots of print
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:46 +0800
Jisheng Zhang wrote:
> Commit 4718c1774051 ("usb: host: xhci-plat: add clock support") adds
> optional clk support, but it forgets to prepare/disable and
> enable/unprepare the clk in the resume/suspend path. This path fixes
> this is
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Jisheng Zhang
---
drivers/usb/host/xhci-plat.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.
Marvell BG4CT SoC needs two phy: one for usb2 and another for usb3. Add
the calls to retrieve generic PHY to xhci plat in order to support this.
Signed-off-by: Jisheng Zhang
---
drivers/usb/host/xhci-plat.c | 87 ++--
1 file changed, 75 insertions(+), 12 d
The simple_strtoul function is obsolete.
This patch replace it by kstrtoul.
Signed-off-by: LABBE Corentin
---
drivers/rtc/rtc-sysfs.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-sysfs.c b/drivers/rtc/rtc-sysfs.c
index 7273855..a023f63 100644
--- a/dr
Commit 63589e92c2d9 ("clk: Ignore error and NULL pointers passed to
clk_{unprepare, disable}()") allows NULL or error pointer to be passed
unconditionally.
This patch is to simplify probe error and remove code paths.
Signed-off-by: Jisheng Zhang
---
drivers/usb/host/xhci-plat.c | 6 ++
1 fi
On Thu 2015-12-03 16:33:26, Josh Poimboeuf wrote:
> Calling set_memory_rw() and set_memory_ro() for every iteration of the
> loop in klp_write_object_relocations() is messy, inefficient, and
> error-prone.
>
> Change all the read-only pages to read-write before the loop and convert
> them back to
cc linux-...@vger.kernel.org
Sorry, I forget to do so. Will cc linux-usb in the future.
On Fri, 4 Dec 2015 22:10:45 +0800
Jisheng Zhang wrote:
> The Marvell BG4CT has xhci controller. This controller has two phys:
> one for usb2 and another for usb3. BG4CT boards have board level vbus
> control
cc linux-...@vger.kernel.org
On Fri, 4 Dec 2015 22:10:48 +0800
Jisheng Zhang wrote:
> Commit 7b8ef22ea547 ("usb: xhci: plat: Add USB phy support") adds the
> usb_phy for usb3, but it forgets to shutdown/init the usb_phy in the
> suspend/resume path. This patch fixes this issue by adding missing
>
Commit 4718c1774051 ("usb: host: xhci-plat: add clock support") adds
optional clk support, but it forgets to prepare/disable and
enable/unprepare the clk in the resume/suspend path. This path fixes
this issue by adding missing clk related calls.
Signed-off-by: Jisheng Zhang
Fixes: 4718c1774051 ("
The Marvell BG4CT has xhci controller. This controller has two phys:
one for usb2 and another for usb3. BG4CT boards have board level vbus
control through gpio.
I plan to add the xhci support in two steps: first of all, add generic
PHY and vbus regulator control support to the xhci-plat driver. Th
The Marvell BG4CT STB board has board level vbus control through gpio.
This patch adds the vbus regulator control to support this board.
Signed-off-by: Jisheng Zhang
---
drivers/usb/host/xhci-plat.c | 39 ++-
drivers/usb/host/xhci.h | 2 ++
2 files chang
Commit 7b8ef22ea547 ("usb: xhci: plat: Add USB phy support") adds the
usb_phy for usb3, but it forgets to shutdown/init the usb_phy in the
suspend/resume path. This patch fixes this issue by adding missing
usb_phy related calls.
Signed-off-by: Jisheng Zhang
---
drivers/usb/host/xhci-plat.c | 5 +
Commit 7b8ef22ea547 ("usb: xhci: plat: Add USB phy support") adds the
usb_phy for usb3, but it attached the usb_phy to incorrect hcd. The
xhci->shared_hcd is the hcd for usb3, this patch fixes this issue
by attach the usb_phy to the xhci->shared_hcd.
Signed-off-by: Jisheng Zhang
---
drivers/usb/
Congratulations!
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Hi Linus,
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm+acpi-4.4-rc4
to receive power management and ACPI fixes for v4.4-rc4 with
top-most commit d441fe25e7de576e36a3cd96f22b737d2f15372a
Merge branches 'pm-domains' and 'pm-cpufreq'
on top of commit
On 03/12/15 10:43, David Vrabel wrote:
> Adding the rtc platform device when there are no legacy irqs (no
> legacy PIC) causes a conflict with other devices that end up using the
> same irq number.
An alternative is to remove the rtc_cmos platform device in Xen PV
guests.
Any preference on how th
trivial patches to do some clean up: remove non-necessary header files
and remove useless platform_set_drvdata() calling.
Jisheng Zhang (2):
phy: berlin-usb: remove non-necessary header files
phy: berlin-usb: don't set device's driver_data
drivers/phy/phy-berlin-usb.c | 3 ---
1 file changed
We don't need gpio related header files, so remove them.
Signed-off-by: Jisheng Zhang
---
drivers/phy/phy-berlin-usb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/phy/phy-berlin-usb.c b/drivers/phy/phy-berlin-usb.c
index 797ba17..7bbb473 100644
--- a/drivers/phy/phy-berlin-usb.c
After commit 739ae3452d0e ("phy: berlin-usb: Set drvdata for phy and
use it"), we get the address of priv by phy_get_drvdata(), so there's
no need to set device's driver_data any more. This patch removes the
call of platform_set_drvdata().
Signed-off-by: Jisheng Zhang
---
drivers/phy/phy-berlin-
On Friday 04 December 2015 12:04:04 Lorenzo Pieralisi wrote:
> On Thu, Dec 03, 2015 at 09:58:14PM +0100, Arnd Bergmann wrote:
> > pci-host-generic.c is just for standard PCI implementations, and it has
> > zero code that would be shared with ACPI: Most of the implementation
> > deals with parsing
On Mon, Nov 30, 2015 at 4:12 AM, Borislav Petkov wrote:
> From: Borislav Petkov
>
> File should be created with S_IRUSR and not with S_IWUSR too because
> writing to it doesn't make any sense. I mean, we don't have a ->write
> method anyway but let's have the permissions correct too.
>
> Signed-o
The size of the eDMA0 CC register space is 0x8000 and not 0x1.
Signed-off-by: Peter Ujfalusi
---
arch/arm/boot/dts/da850.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 0bd98cd00816..e73f5efb3aa3 100
Hi,
Switch to use the new eDMA bindings and enable DMA for MMC0, SPI1.
Add node for MMC1.
Regards,
Peter
---
Peter Ujfalusi (6):
ARM: DTS: da850: fix edma0 reg space
ARM: DTS: da850: Use the new DT bindings for the eDMA3
ARM: DTS: da850: Enable eDMA1
ARM: DTS: da850: Enable DMA use for MM
The eDMA1 in da850 has only one TPTC and for example MMC1 is HW events are
handled by it.
Signed-off-by: Peter Ujfalusi
---
arch/arm/boot/dts/da850-enbw-cmc.dts | 4
arch/arm/boot/dts/da850-evm.dts | 4
arch/arm/boot/dts/da850.dtsi | 17 +
3 files changed
Add the needed bindings so the SPI driver can use DMA with SPI1.
Signed-off-by: Peter Ujfalusi
---
arch/arm/boot/dts/da850.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index edaf69ec03a9..fc7866657a4e 100644
--- a/arch/arm
Add the needed bindings for MMC0 in order to be able to utilize the DMA
instead of PIO mode.
Signed-off-by: Peter Ujfalusi
---
arch/arm/boot/dts/da850.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index e311d73a5265..ccaaf2
da850 has two MMC controller, MMCSD1 is served by eDMA1
Signed-off-by: Peter Ujfalusi
---
arch/arm/boot/dts/da850.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ccaaf2746aca..edaf69ec03a9 100644
--- a/arch/arm/bo
Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3.
With the new bindings boards can customize and tweak the DMA channel
priority to match their needs. With the new binding the memcpy is safe
to be used since with the old binding it was not possible for a driver
to know which c
> > + ivrs_acpihid[HW,X86_64]
> > + Provide an override to the ACPI-HID:UID<->DEVICE-ID
> > + mapping provided in the IVRS ACPI table. For
> > + example, to map UART-HID:UID AMD0020:0 to
> > + PCI device 00:14.5 write the
On Thu, Dec 03, 2015 at 08:53:21AM -0600, Christoph Lameter wrote:
> On Thu, 3 Dec 2015, Geliang Tang wrote:
>
> > while (nr_freed < tofree && !list_empty(&n->slabs_free)) {
> >
> > spin_lock_irq(&n->list_lock);
> > - p = n->slabs_free.prev;
> > - if (p == &n->s
fill_balloon() and leak_balloon() manipulate only a limited number
of pages in one call. This is the reason why remove_common() calls
leak_balloon() in a while cycle.
remove_common() is called also when the system is being frozen.
But fill_balloon() is called only once when the system is being
res
From: Petr Mladek
This patch moves the deferred work from the "vballoon" kthread into a
system freezable workqueue.
We do not need to maintain and run a dedicated kthread. Also the event
driven workqueues API makes the logic much easier. Especially, we do
not longer need an own wait queue, wait
It has been long since I have sent v3 of the balloon conversion from
a kthread to a workqueue. I have gained some more experience with
the APIs in the meantime. I hope that you would like the outcome.
I have added one more patch that fixes a separate problem with
restoring the balloon after the sy
On Fri, Dec 04, 2015 at 10:58:15AM +0100, Michal Hocko wrote:
> On Fri 04-12-15 18:16:34, Minchan Kim wrote:
> > On Fri, Dec 04, 2015 at 09:52:27AM +0100, Michal Hocko wrote:
> > > On Fri 04-12-15 14:35:15, Minchan Kim wrote:
> > > > On Thu, Dec 03, 2015 at 04:47:29PM +0100, Michal Hocko wrote:
> >
On Fri, Dec 04, 2015 at 07:27:24AM -0600, Josh Poimboeuf wrote:
> On Fri, Dec 04, 2015 at 01:11:29AM +0100, Jiri Kosina wrote:
> > On Thu, 3 Dec 2015, Josh Poimboeuf wrote:
> >
> > > Calling set_memory_rw() and set_memory_ro() for every iteration of the
> > > loop in klp_write_object_relocations()
> This patch is not enough for enabling 0xe025 key on that Vostro machine.
> Some extra SMBIOS call is needed, without them ACPI will not send WMI
> keypress event.
Indeed. But have you read the last e-mail I wrote before submitting the
original patch [1]? Brightness control on the V131 is alrea
On Fri, Dec 04, 2015 at 01:11:29AM +0100, Jiri Kosina wrote:
> On Thu, 3 Dec 2015, Josh Poimboeuf wrote:
>
> > Calling set_memory_rw() and set_memory_ro() for every iteration of the
> > loop in klp_write_object_relocations() is messy, inefficient, and
> > error-prone.
> >
> > Change all the read-
On Thu, Dec 03, 2015 at 09:34:11AM +0100, Jiri Olsa wrote:
> hi,
> we've got many failing tests, mainly due to commit:
> ebe9729c8c31 perf machine: Fix to destroy kernel maps when machine exits
>
> and recent bpf changes, sending fixes.
I replied to each patch if I had something to say. With t
Hello.
Sorry for the grammar nitpicking but since it's in the comments, I felt
the necessity to comment.
On 12/4/2015 5:40 AM, Chunfeng Yun wrote:
when ip fail to enter sleep mode, register access protection will
Fails.
be disabed, at the same time if all clocks are disabled, acces
On Thu, Dec 03, 2015 at 09:34:18AM +0100, Jiri Olsa wrote:
> It fixes segfault within machine__exit, that's caused
> but not creating kernel maps for machine.. We're calling
> machine__destroy_kernel_maps in machine__exit since commit:
>
> ebe9729c8c31 perf machine: Fix to destroy kernel maps wh
Hi Jiri,
In the subject, please do 's/mma/mmap/'. Ditto for 3/7.
Thanks,
Namhyung
On Thu, Dec 03, 2015 at 09:34:13AM +0100, Jiri Olsa wrote:
> This is more straightforward than what we have now.
>
> It also fixes segfault within machine__exit, that's caused
> but not creating kernel maps for
Tejun,
> Sure, separating the knobs out isn't difficult. I still don't like
> the idea of having multiple set of similar knobs controlling about the
> same thing tho.
>
> For example, let's say there's a user who boots with "nosoftlockup"
> explicitly. I'm pretty sure the user wouldn't be inten
On Fri, Dec 04, 2015 at 11:24:20AM +0800, Wang Hongcheng wrote:
> AMD pl330 is a UART DMA device, it shares one ACPI item with UART. So
> a platform device and an acpi device will be created according to
> AMD0020 ACPI dev. And its mem base address must have an offset. As a
> result, MULTI_ATTACHED
Hi Masami,
On Thu, Dec 03, 2015 at 07:13:15AM +, 平松雅巳 / HIRAMATU，MASAMI wrote:
> From: Namhyung Kim [mailto:namhy...@kernel.org]
> >
> >On Thu, Dec 03, 2015 at 12:15:12AM +, 平松雅巳 / HIRAMATU，MASAMI wrote:
> >> >From: Namhyung Kim [mailto:namhy...@gmail.com] On Behalf Of Namhyung Kim
> >> >
changes since v2:
- moved 'max_possible_pfn' tracking hunk to the 1st patch
- make 'max_possible_pfn' 64-bit
- simplify condition to oneliner as suggested by Ingo
changes since v1:
- reduce # of #ifdefs by introducing max_possible_pfn
global variable
- don't check 'acpi_no_memhotplug=
max_possible_pfn will be used for tracking max possible
PFN for memory that isn't present in E820 table and
could be hotplugged later.
By default max_possible_pfn is initialized with max_pfn,
but later it could be updated with highest PFN of
hotpluggable memory ranges declared in ACPI SRAT table
i
Hi Rob,
Thank you for feedback. All the comments will be address in the next driver
version.
We are currently working for a solution to use the standard bindings for
pinctrl.
Regards,
Andrei
-Original Message-
From: Rob Herring [mailto:r...@kernel.org]
Sent: Sunday, November 22, 2015
when memory hotplug enabled system is booted with less
than 4GB of RAM and then later more RAM is hotplugged
32-bit devices stop functioning with following error:
nommu_map_single: overflow 327b4f8c0+1522 of device mask
the reason for this is that if x86_64 system were booted
with RAM l
Now, PM core supports asynchronous suspend/resume mode for devices
during system suspend/resume, and the power state transition of one
device may be completed in separate kernel thread. PM core ensures
all power state transition dependency between devices. This patch
enables MMC/SD/SDIO card and SD
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