Hi Dmitry,
On wo, 2016-02-03 at 17:16 +0100, Paul Bolle wrote:
> The above should provide me with enough information to figure out
> what's going on here.
I've instrumented ser_gigaset with some printk's. Basically I added the
stuff pasted at the end of this message. In 10.000 runs of the
On 02/03/2016 09:32 AM, Dmitry Vyukov wrote:
> On Wed, Feb 3, 2016 at 5:24 AM, Peter Hurley wrote:
>> Hi Dmitry,
>>
>> On 01/21/2016 09:43 AM, Peter Hurley wrote:
>>> On 01/21/2016 02:06 AM, Dmitry Vyukov wrote:
On Wed, Jan 20, 2016 at 5:08 PM, Peter Hurley
wrote:
> On 01/20/2016
From: "Luis R. Rodriguez"
Simplify a few of the *generic* shared dev_warn() and dev_dbg()
print messages for three reasons:
0) Historically firmware_class code was added to help
get device driver firmware binaries but these days
request_firmware*() helpers are being repurposed for
On Wed, 3 Feb 2016, Tejun Heo wrote:
> On Wed, Feb 03, 2016 at 07:46:11PM +0100, Thomas Gleixner wrote:
> > > > So I think 874bbfe600a6 is really bogus. It should be reverted. We
> > > > already have a proper fix for vmstat 176bed1de5bf ("vmstat: explicitly
> > > > schedule per-cpu work on the CPU
Hi
Thanks for your review again :)
Uh... how do you know at this point that the file is actually writable?
Normally, e.g. vfs_write() will ensure that the file is writable, and
e.g. generic_file_write_iter() won't check for writability as far as I
can tell. This might allow someone to use the
On 02/01/2016 11:45 AM, Jann Horn wrote:
On Mon, Feb 01, 2016 at 11:28:51AM -0800, Nikhilesh Reddy wrote:
On Mon 01 Feb 2016 11:15:56 AM PST, Jann Horn wrote:
On Mon, Feb 01, 2016 at 10:56:27AM -0800, Nikhilesh Reddy wrote:
diff --git a/fs/fuse/passthrough.c b/fs/fuse/passthrough.c
[...]
Thierry
On Wed, Feb 3, 2016 at 6:53 AM, Thierry Reding wrote:
>> A) The software state here is the period and flags (AKA "inverted),
>> right? It does seem possible that you could apply the period and
>> flags while keeping the calculated bootup duty cycle percentage
>> (presuming that the PWM
Hello, Thomas.
On Wed, Feb 03, 2016 at 07:46:11PM +0100, Thomas Gleixner wrote:
> > > So I think 874bbfe600a6 is really bogus. It should be reverted. We
> > > already have a proper fix for vmstat 176bed1de5bf ("vmstat: explicitly
> > > schedule per-cpu work on the CPU we need it to run on"). This
On Wed, Feb 03, 2016 at 01:32:10PM +, Will Deacon wrote:
> On Wed, Feb 03, 2016 at 09:33:39AM +0100, Ingo Molnar wrote:
> > In fact I'd suggest to test this via a quick runtime hack like this in
> > rcupdate.h:
> >
> > extern int panic_timeout;
> >
> > ...
> >
> > if
Signed-off-by: Alexander Kuleshov
---
init/do_mounts.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/init/do_mounts.c b/init/do_mounts.c
index dea5de9..ca5da05 100644
--- a/init/do_mounts.c
+++ b/init/do_mounts.c
@@ -505,7 +505,9 @@ void __init change_floppy(char *fmt,
Moving functions etm_readl/writel to file "coresight-etm.h"
so that the main ETM3x driver can be split in more than one
file.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm.h | 29 +++
drivers/hwtracing/coresight/coresight-etm3x.c | 29
On Wed, Feb 03, 2016 at 01:45:09PM -0500, Johannes Weiner wrote:
> On Thu, Feb 04, 2016 at 12:36:33AM +0900, Sergey Senozhatsky wrote:
> > Hello,
> >
> > next-20160203
> >
> > [ 3587.997451] =
> > [ 3587.997453] [ INFO: inco
On Mon, Feb 01, 2016 at 10:38:50AM -0500, Boris Ostrovsky wrote:
> diff --git a/drivers/xen/grant-table.c b/drivers/xen/grant-table.c
> index c49f79e..9a239d5 100644
> --- a/drivers/xen/grant-table.c
> +++ b/drivers/xen/grant-table.c
> @@ -1147,13 +1147,13 @@ EXPORT_SYMBOL_GPL(gnttab_init);
>
>
On Wed, 3 Feb 2016 13:55:50 -0500
Steven Rostedt wrote:
> # grep dl /proc/sched_debug
> dl_rq[0]:
> .dl_nr_running : 0
> .dl_bw->bw : 996147
> .dl_bw->total_bw : -104857
> dl_rq[1]:
> .dl_nr_running : 0
> .dl_bw->bw
On 03/02/16 18:51, Bjorn Helgaas wrote:
> On Wed, Feb 03, 2016 at 06:32:20PM +, Jake Oshins wrote:
>>> -Original Message-
>>> From: Bjorn Helgaas [mailto:helg...@kernel.org]
>>> Sent: Wednesday, February 3, 2016 10:25 AM
>>> To: Jake Oshins
>>> Cc: gre...@linuxfoundation.org; KY
On Wed, Feb 03, 2016 at 01:54:25PM -0500, Tejun Heo wrote:
> Fix it by mapping NUMA_NO_NODE to the default pool_workqueue from
> unbound_pwq_by_node(). This is a temporary workaround. The long term
> solution is keeping CPU -> NODE mapping stable across CPU off/online
> cycles which is in the
There's an accounting issue with the SCHED_DEADLINE and the creation of
cpusets. If a SCHED_DEADLINE task already exists and a new root domain
is created, the calculation of the bandwidth among the root domains
gets corrupted.
For the reproducer, I downloaded Juri's tests:
I saw no considerations for the recommendations I had made last on your v1:
https://lkml.kernel.org/r/CAB=NE6XPA0YzbnM8=rspkkai6d3gkxxo00gr0vzuyoyzny6...@mail.gmail.com
Of importance:
1) Using pv_info.paravirt_enabled = 1 is wrong unless you mean to say this
is for legacy x86:
Your patch #3
When looking up the pool_workqueue to use for an unbound workqueue,
workqueue assumes that the target CPU is always bound to a valid NUMA
node. However, currently, when a CPU goes offline, the mapping is
destroyed and cpu_to_node() returns NUMA_NO_NODE. This has always
been broken but hasn't
From: Thomas Gleixner
Date: Fri May 25 16:59:47 2012 +0200
Subject: genirq: Add default affinity mask command line option
If we isolate CPUs, then we don't want random device interrupts on them. Even
w/o the user space irq balancer enabled we can end up with irqs on non boot
cpus and chasing
Moving PM runtime operations in Coresight devices enable() and
disable() API to the framework core when a path is setup. That
way the runtime core doesn't have to be involved everytime a
path is enabled. It also avoids calling runtime PM operations
in IRQ context.
Signed-off-by: Mathieu Poirier
Add an API allowing external code to quickly get a handle on the
sink within a path. The sink is always last, but adding an API allows
to keep the path's node structure private and remove redundant checks.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-priv.h | 1 +
Adding a new mode to source API enable() in order to
distinguish where the request comes from. That way it is
possible to perform different operations based on where
the request was issued from.
The ETM4x driver is also modified to keep in sync with the
new interface.
Signed-off-by: Mathieu
Changing default configuration to include the entire address
range rather than just the kernel. That way traces are more
inclusive and it is easier to narrow down if needed.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm.h | 2 ++
SysFS entries are big enough to justify their own file.
As such moving all sysFS related declarations to a dedicated
location.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/Makefile |3 +-
drivers/hwtracing/coresight/coresight-etm.h|4 +
Splitting "etm_drvdata" in two sections, one for the HW specific
data and another for user configuration.
That way it is easier to manipulate and zero out the configuration
data when more than one concurrent tracing session configuration
is active.
Also taking care of up-lifting all the code
Thank you for your comments. I'll come up with v2 soon but, I have
a question about this point :
> > + /* clear Rx/Tx FIFO's */
> > + for (i = 0; i < reset_cnt; i++) {
> > + iowrite8((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
> > +
There is really no point in having two functions to take care
of doing the initial tracer configuration. As such moving
everything to 'etm_set_default()'.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm3x.c | 37 ++-
1 file changed, 14
There is no need to use the event enable's "always false" event to
stop trace collection. For that purpose setting the programming bit
(ETMCR:10) is enough.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm3x.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
On Wed, Feb 03, 2016 at 06:32:20PM +, Jake Oshins wrote:
> > -Original Message-
> > From: Bjorn Helgaas [mailto:helg...@kernel.org]
> > Sent: Wednesday, February 3, 2016 10:25 AM
> > To: Jake Oshins
> > Cc: gre...@linuxfoundation.org; KY Srinivasan ; linux-
> > ker...@vger.kernel.org;
Adding new mode to limit tracing to kernel or user space.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm.h| 6 ++-
.../hwtracing/coresight/coresight-etm3x-sysfs.c| 4 ++
drivers/hwtracing/coresight/coresight-etm3x.c | 63 ++
Adding an operation mode to the sink->enable() API in order
to prevent simultaneous access from different callers.
TPIU and TMC won't be supplemented with the AUX area
API immediately and as such ignore the new mode.
Signed-off-by: Mathieu Poirier
---
Perf is a well known and used tool for performance monitoring
and much more. A such it is an ideal candidate for integration
with coresight based HW tracing.
This patch introduces a PMU that represent a coresight tracer to
the Perf core.
Cc: Alexander Shishkin
Signed-off-by: Mathieu Poirier
Adding an ETB10 specific AUX area operations to be used
by the perf framework when events are initialised.
Part of this operation involves modeling the mmap'ed area
based on the specific ways a sink buffer gathers information.
Signed-off-by: Mathieu Poirier
---
On Wed, 3 Feb 2016, Tejun Heo wrote:
> On Wed, Feb 03, 2016 at 01:28:56PM +0100, Michal Hocko wrote:
> > > The CPU was 168, and that one was offlined in the meantime. So
> > > __queue_work fails at:
> > > if (!(wq->flags & WQ_UNBOUND))
> > > pwq = per_cpu_ptr(wq->cpu_pwqs, cpu);
> > > else
[-cc Mark]
On Wed, Feb 03, 2016 at 08:18:02PM +0200, Felipe Balbi wrote:
> Bjorn Helgaas writes:
> > In include/linux/usb/usb_phy_generic.h, use a forward declaration for
> > struct gpio_desc instead of including linux/gpio/consumer.h.
> >
> > Of the files that include usb_phy_generic.h, only
>
On 2/3/2016 1:36 PM, Mark Rutland wrote:
>> Can you please take a look and let me know?
> Sorry, but it's going to be far easier to review with useless code
> removed, so I will wait until the next posting where this patch is
> folded in.
>
> Thanks,
> Mark.
OK, I'll post the next rev by the end
On 01/25/2016 11:03 PM, Joonsoo Kim wrote:
On Mon, Jan 25, 2016 at 05:15:10PM -0800, Laura Abbott wrote:
Hi,
Based on the discussion from the series to add slab sanitization
(lkml.kernel.org/g/<1450755641-7856-1-git-send-email-la...@labbott.name>)
the existing SLAB_POISON mechanism already
From: Wilson Ding
Armada-3700's uart is a simple serial port, which doesn't
support. Configuring the modem control lines. The uart port has a 32
bytes Tx FIFO and a 64 bytes Rx FIFO
The uart driver implements the uart core operations. It also support the
system (early) console based on
Fu Wei wrote:
As you know I have made the pre-timeout support patch, If people like
it, i am happy to go on upstream it separately.
If we want to use pre-timeout here, user only can use get_pretimeout
and disable panic by setting pretimeout to 0
but user can not really set pretimeout, because
On Thu, Feb 04, 2016 at 12:36:33AM +0900, Sergey Senozhatsky wrote:
> Hello,
>
> next-20160203
>
> [ 3587.997451] =
> [ 3587.997453] [ INFO: inconsistent lock state ]
> [ 3587.997456] 4.5.0-rc2-next-20160203-dbg-7-g37a0a9d-dirt
From: Lior Amsalem
The main difference in the new Armada 3700 is that no address
decoding needs to take place in the driver probe.
[gregory.clem...@free-electrons.com: reformulate the commit log]
Signed-off-by: Lior Amsalem
Reviewed-by: Nadav Haklai
Tested-by: Nadav Haklai
Signed-off-by:
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Acked-by: Rob Herring
---
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/arm/marvell/armada-37xx.txt | 16
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
arch/arm64/Kconfig.platforms | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 +
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT
---
The irq-armada-370-xp driver can only be built for ARM 32 bits. The mvebu
family had grown with a new ARM64 SoC which will also select the
ARCH_MEVBU configuration. Since "ARM: mvebu: use the ARMADA_370_XP_IRQ
option", the ARM32 mvebu SoC directly select this new option. Selecting
it by default
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..ad49b62c5abc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1279,6
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT
---
Documentation/arm/Marvell/README
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
arch/arm64/configs/defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/configs/defconfig
From: Thomas Petazzoni
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other interrupt-related Kconfig
options (which will be
Hi,
This series introduce the support of the Armada 3700 family: it is the
first ARM64 SoC of the mvebu family submitted to the mainline!
Currently there are two members of the Armada 3700 family, the only
difference is the number of core: the Armada 3710 comes with one
Cortex-A53 whereas the
TraceID values have to be unique for all tracers and
consistent between drivers and user space. As such
introducing a central function to be used whenever a
traceID value is required.
The patch also account for data traceIDs, which are usually
I(N) + 1.
Signed-off-by: Mathieu Poirier
---
That way traces can be enabled and disabled automatically
from the Perf subystem using the PMU abstraction.
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/Kconfig | 1 +
drivers/hwtracing/coresight/coresight-etm3x.c | 95 +--
Calling function 'smp_call_function_single()' to unlock a
tracer and calling it again right after to perform the
default initialisation doesn't make sense.
Moving 'etm_os_unlock()' just before making the default
initialisation results in the same outcome while saving
one call to
Moving to use local atomic operations to take advantage of the
lockless implementation, something that will come handy when
the ETB is accessed from the Perf subsystem. Also changing the
name of the variable to something more meaningful.
Signed-off-by: Mathieu Poirier
---
This is the ninth iteration of this serie. Changes are minor and don't
affect how the integration is done.
One notable thing is the absence of the patches adding support for this
PMU at the user space perf tool level. Those will be lumped with the
rest of the user space trace decoding solution
When using the Coresight framework from the sysFS interface a
tracer is always handling a single session and as such, a path
can be associated with a tracer. But when supporting multiple
session per tracer there is no guarantee that sessions will always
have the same path from source to sink.
On Wed, Feb 03, 2016 at 06:12:00PM +, Joao Pinto wrote:
> Hi Bjorn,
>
> Are these tasks enough?
>
> - replace mdelay() for msleep()
> - remove synopsys_pcie_irq_handler()
Above are fine with me.
> - replace "snps,pcie-synopsys" for "snps,pcie-synopsys-ipk"?
This is a question for Arnd.
>
Hi Baptiste, Alex;
On 2/1/2016 11:29 AM, Eric Auger wrote:
>>> I added Baptiste who is vfio platform driver sub-system maintainer.
>> >
>> > Thanks, we should ask Baptiste to get his email into the Maintainer file
>> > list.
> I think it is:
> ./scripts/get_maintainer.pl
>
On 4 February 2016 at 02:26, Timur Tabi wrote:
> Fu Wei wrote:
>>
>> Actually,
>> the SBSA watchdog driver should support only half-timeout for panic
>> the user cannot configure the length of "panic time", He can only
>> enable it, and it is automatically set to 1/2 timeout.
>>
>> we don't
On Wed, Feb 03, 2016 at 01:32:01PM -0500, Sinan Kaya wrote:
> Hi Mark,
>
> On 2/1/2016 10:35 AM, Mark Rutland wrote:
> >> Removing the flexibility to choose the event channel as there is no real
> >> > use case right now. We have been using the values in ACPI that match the
> >> > HW
> >> >
CCing Hugh and Greg, they have worked on the memcg migration code most
recently. AFAIK the only reason newpage->mem_cgroup had to be set up
that early in migration was because of the way dirty accounting used
to work. But Hugh took memcg out of the equation there, so moving
mem_cgroup_migrate() to
Data corruption issues were observed in tests which initiated
a system crash/reset while accessing BTT devices. This problem
is reproducible.
The BTT driver calls pmem_rw_bytes() to update data in pmem
devices. This interface calls __copy_user_nocache(), which
uses non-temporal stores so that
On 2/1/2016 10:14 AM, Rob Herring wrote:
> On Fri, Jan 29, 2016 at 05:35:11PM -0500, Sinan Kaya wrote:
>> Removing the flexibility to choose the event channel as there is no real
>> use case right now. We have been using the values in ACPI that match the HW
>> defaults. OS is reading the
Hi Mark,
On 2/1/2016 10:35 AM, Mark Rutland wrote:
>> Removing the flexibility to choose the event channel as there is no real
>> > use case right now. We have been using the values in ACPI that match the HW
>> > defaults. OS is reading the event-channel from the HW register now.
> Fold this in
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: Wednesday, February 3, 2016 10:25 AM
> To: Jake Oshins
> Cc: gre...@linuxfoundation.org; KY Srinivasan ; linux-
> ker...@vger.kernel.org; de...@linuxdriverproject.org; Haiyang Zhang
> ; marc.zyng...@arm.com;
>
Rule r is only use in org or report mode, so only execute it in those
cases.
Signed-off-by: Julia Lawall
---
scripts/coccinelle/misc/bugon.cocci |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/coccinelle/misc/bugon.cocci
b/scripts/coccinelle/misc/bugon.cocci
On Wed, Feb 3, 2016 at 7:26 PM, Jeff Layton wrote:
> Yes...this commit in mainline fixes it:
Thanks Jeff, I missed it.
--
William
On Wed, 3 Feb 2016 19:19:37 +0100
William Dauchy wrote:
> Hello Jeff,
>
> On Wed, Dec 23, 2015 at 2:54 PM, Jeff Layton wrote:
> > Ooh, nice catch...and just in time for Christmas.
> >
> > filp_close does this after the fd has been detached from the file table
> > in __close_fd:
> >
> >
On Wed, 2016-02-03 at 10:13 -0800, Darrick J. Wong wrote:
> On Wed, Feb 03, 2016 at 09:19:06PM +0800, Huaitong Han wrote:
> > This patch adds a line break for proc mb_groups display.
Using 2 lines for output might break any existing users.
Are there any?
> >
> > Signed-off-by: Huaitong Han
>
Fu Wei wrote:
Actually,
the SBSA watchdog driver should support only half-timeout for panic
the user cannot configure the length of "panic time", He can only
enable it, and it is automatically set to 1/2 timeout.
we don't need pre-timeout here.
Hope I understand you correctly:-) sorry for
Hi Jake,
On Tue, Feb 02, 2016 at 05:41:41PM +, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by:
On 02/02/16 21:18, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20160202:
>
on i386:
CC arch/x86/kernel/asm-offsets.s
In file included from ../include/linux/mm.h:67:0,
from ../include/linux/suspend.h:8,
from ../arch/x86/kernel/asm-offsets.c:12:
On Wed, Feb 3, 2016 at 9:54 AM, Eric Dumazet wrote:
> On Wed, 2016-02-03 at 09:43 -0800, Alexander Duyck wrote:
>
>> Read the history. I still say it is best if we don't accept a partial
>> solution. If we are going to introduce the sysctl as a core item it
>> should function as a core item and
John,
On Tue, Feb 2, 2016 at 3:57 PM, John Youn wrote:
> On 1/28/2016 6:20 PM, Douglas Anderson wrote:
>> This is a bit of catchall series for all the bug fix and performance
>> patches I've been working on over the last few months. Note that for
>> dwc2 we need to do LOTS in software and need
Hello Jeff,
On Wed, Dec 23, 2015 at 2:54 PM, Jeff Layton wrote:
> Ooh, nice catch...and just in time for Christmas.
>
> filp_close does this after the fd has been detached from the file table
> in __close_fd:
>
> if (likely(!(filp->f_mode & FMODE_PATH))) {
>
On Wed, Feb 03, 2016 at 06:59:56PM +0200, Daniel Baluta wrote:
> The driver has sysfs readings with runtime PM support for power saving.
> It also offers buffer support that can be used together with IIO software
> triggers.
>
> Datasheet can be found here:
>
On Wed, Feb 03, 2016 at 09:19:06PM +0800, Huaitong Han wrote:
> This patch adds a line break for proc mb_groups display.
>
> Signed-off-by: Huaitong Han
> ---
> fs/ext4/mballoc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c
>
On 4 February 2016 at 02:08, Timur Tabi wrote:
> Fu Wei wrote:
>>
>> Actually I am taking your suggestion to avoid touching WCV in
>> interrupt routine.
>> So even we have pre-timeout support , it is useless for this
>> panic-on-half-timeout feature,
>> because pre-timeout == timeout / 2
I think the problem lies here:
/*
* If the guest has used debug registers, at least dr7
* will be disabled while returning to the host.
* If we don't have active breakpoints in the host, we don't
* care about the messed up debug address registers. But
On 02/02/16 21:18, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20160202:
>
on x86_64:
when CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD is enabled
and CONFIG_TRANSPARENT_HUGEPAGE is not enabled:
../fs/proc/task_mmu.c: In function 'smaps_pud_range':
../fs/proc/task_mmu.c:596:2: error:
Bjorn Helgaas writes:
> In include/linux/usb/usb_phy_generic.h, use a forward declaration for
> struct gpio_desc instead of including linux/gpio/consumer.h.
>
> Of the files that include usb_phy_generic.h, only
> drivers/usb/phy/phy-generic.c uses the gpiod_*() interfaces from
>
The hisi_sas driver is required to support both
device tree and ACPI. The scanning of the device
properties now uses the Unified Device Properties
API, which serves both OF and ACPI.
Since syscon is not supported by ACPI, syscon is
only used in the driver when device tree is used.
Signed-off-by:
Signed-off-by: John Garry
Signed-off-by: Zhangfei Gao
---
drivers/scsi/hisi_sas/hisi_sas.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h
index 5b8affd..02da7e4 100644
--- a/drivers/scsi/hisi_sas/hisi_sas.h
This patchset introduces support for ACPI in the
HiSilicon SAS driver. The driver will support
both device tree and ACPI.
Currently only v1 hw will use ACPI.
John Garry (3):
hisi_sas: use Unified Device Properties API
hisi_sas: add v1 hw ACPI support
hisi_sas: update driver version to 1.2
Add support in v1 hw driver for ACPI.
A check on whether an ACPI handle is available
for the device is used to decide on whether to
use ACPI reset handler or syscon for hw reset.
Signed-off-by: John Garry
Signed-off-by: Zhangfei Gao
---
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 67
Hi Arnd,
Arnd Bergmann writes:
> Hi Felipe,
>
> This set of patches addresses warnings I got in randconfig builds,
> in the USB drivers. The first three patches are for the pxa25x
> UDC driver and are a larger scale cleanup triggered by finding
> the initial bug. The other four are relatively
Fu Wei wrote:
static const struct platform_device_id sbsa_gwdt_pdev_match[] = {
{ .name = "sbsa-gwdt", },
{},
};
MODULE_DEVICE_TABLE(platform, sbsa_gwdt_pdev_match);
Ok, thanks.
The patch
regulator: axp20x: Use linear voltage ranges for AXP20X LDO4
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
The patch
regulator: max77802: Fix DT binding document reference
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
The patch
regulator: axp20x: Remove voltage readout support for switch regulators
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime
On 02/03/2016 04:03 AM, Robin Murphy wrote:
On 03/02/16 06:49, Gujulan Elango, Hari Prasath (H.) wrote:
From: Hari Prasath Gujulan Elango
Use the managed version of the dma_alloc_coherent() i.e. the
dmam_alloc_coherent() & accordingly cleanup the error handling
part.Also,remove the references
On Wed, 3 Feb 2016 17:56:46 +
Juri Lelli wrote:
> I think this is already quite useful. But, do you think we can also
> display information about the root_domain (like the span for example)?
> Or do we have that some place else already?
That's something I was planning on adding to that
Hi Bjorn,
Are these tasks enough?
- replace mdelay() for msleep()
- remove synopsys_pcie_irq_handler()
- replace "snps,pcie-synopsys" for "snps,pcie-synopsys-ipk"?
- rename the driver to pcie-synopsys-ipk?
- update the devicetree documentation referring that the ranges also include the
config
Signed-off-by: Marc Zyngier
---
arch/arm/include/asm/kvm_host.h | 4
arch/arm/kvm/arm.c| 1 +
arch/arm64/include/asm/kvm_host.h | 4
3 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
index f9f2779..f1e86f1
On 4 February 2016 at 01:58, Timur Tabi wrote:
> Fu Wei wrote:
>>
>> I have posted GTDT support separately :https://lkml.org/lkml/2016/2/1/660
>>
>> devicetree driver and GTDT driver both export sbsa gwdt info to
>> "platform resource".
>>
>> this driver get hardware info from platform resource.
There is no real need to leave the stage2 initialization as part
of the early HYP bootstrap, and we can easily postpone it to
the point where we can safely run C code.
This will help VHE, which doesn't need any of this bootstrap.
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/kvm_asm.h
Fu Wei wrote:
Actually I am taking your suggestion to avoid touching WCV in
interrupt routine.
So even we have pre-timeout support , it is useless for this
panic-on-half-timeout feature,
because pre-timeout == timeout / 2 (always).
So maybe I misunderstand your suggestion,
could you let me
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