In __of_find_node_by_full_name, add an of_node_get when detecting the
desired element, to ensure that it ends up with a reference count that is
one greater than on entering the function.
Also in __of_find_node_by_full_name, add an of_node_put on breaking
out of the for_each_child_of_node loop,
With ARMv8.1 VHE extension, it will be possible to run the kernel
at EL2 (aka HYP mode). In order for the kernel to easily find out
where it is running, add a new predicate that returns whether or
not the kernel is in HYP mode.
For completeness, the 32bit code also get such a predicate (always
Since commit 0848f6428ba3 ("inet: frags: fix defragmented packet's IP
header for af_packet"), ip_send_check() would be called twice for
defragmentation that occurs from netfilter ipv4 defrag hooks. Remove the
extra call.
Signed-off-by: Joe Stringer
---
net/ipv4/netfilter/nf_defrag_ipv4.c | 4
Add a new ARM64_HAS_VIRT_HOST_EXTN features to indicate that the
CPU has the ARMv8.1 VHE capability.
This will be used to trigger kernel patching in KVM.
Acked-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/cpufeature.h | 3 ++-
arch/arm64/kernel/cpufeature.c
With the ARMv8.1 VHE, the kernel can run in HYP mode, and thus
use the HYP timer instead of the normal guest timer in a mostly
transparent way, except for the interrupt line.
This patch reworks the arch timer code to allow the selection of
the HYP PPI, possibly falling back to the guest timer if
The kern_hyp_va macro is pretty meaninless with VHE, as there is
only one mapping - the kernel one.
In order to keep the code readable and efficient, use runtime
patching to replace the 'and' instruction used to compute the VA
with a 'nop'.
Signed-off-by: Marc Zyngier
---
With ARMv8, host and guest share the same system register file,
making the save/restore procedure completely symetrical.
With VHE, host and guest now have different requirements, as they
use different sysregs.
In order to prepare for this, add split sysreg save/restore functions
for both host and
VHE brings its own bag of new system registers, or rather system
register accessors, as it define new ways to access both guest
and host system registers. For example, from the host:
- The host TCR_EL2 register is accessed using the TCR_EL1 accessor
- The guest TCR_EL1 register is accessed using
With VHE, the host never issues an HVC instruction to get into the
KVM code, as we can simply branch there.
Use runtime code patching to simplify things a bit.
Signed-off-by: Marc Zyngier
---
arch/arm64/kvm/hyp.S | 7 +++
arch/arm64/kvm/hyp/hyp-entry.S | 40
With the kernel running at EL2, there is no point trying to
configure page tables for HYP, as the kernel is already mapped.
Take this opportunity to refactor the whole init a bit, allowing
the various parts of the hypervisor bringup to be split across
multiple functions.
Reviewed-by: Christoffer
We're now in a position where we can introduce VHE's minimal
save/restore, which is limited to the handful of shared sysregs.
Add the required alternative function calls that result in a
"do nothing" call on VHE, and the normal save/restore for non-VHE.
Reviewed-by: Christoffer Dall
Hi Timur
On 4 February 2016 at 01:53, Timur Tabi wrote:
> Fu Wei wrote:
>>
>> sorry, are you saying : using pre-timeout instead of this half timeout?
>>
>> But even we have pre-timeout support, pre-timeout == timeout / 2, it
>> can not be configured without touch timeout.
>>
>> if you want
A handful of system registers are still shared between host and guest,
even while using VHE (tpidr*_el[01] and actlr_el1).
Also, some of the vcpu state (sp_el0, PC and PSTATE) must be
save/restored on entry/exit, as they are used on the host as well.
In order to facilitate the introduction of a
Hi Joao & Arnd,
On Tue, Feb 02, 2016 at 09:25:25PM +0100, Arnd Bergmann wrote:
> On Monday 01 February 2016 18:07:45 Joao Pinto wrote:
> > This patch adds a new driver that will be the reference platform driver
> > for all PCI RC IP Protoyping Kits based on ARC SDP.
> > This patch is composed by:
Hi there,
How are you today? I would like to purchase items from your company.Do
you ship to Australia and accept USA credit cards as a form of payment?
Your prompt response is esteemed. Thanks.
Best Regards
Albert Fryra
ELDERS LIMITED
On 02/03/2016 10:01 AM, Zubair Lutfullah Kakakhel wrote:
Add basic CN7XXX interface detection.
This allows the kernel to boot with ethernet working as it initializes
the ethernet ports with SGMII instead of defaulting to RGMII routines.
Tested on the utm8 from Rhino Labs with a CN7130.
Running the kernel in HYP mode requires the HCR_E2H bit to be set
at all times, and the HCR_TGE bit to be set when running as a host
(and cleared when running as a guest). At the same time, the vector
must be set to the current role of the kernel (either host or
hypervisor), and a couple of
Switch the timer code to the unified sysreg accessors.
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm64/kvm/hyp/timer-sr.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kvm/hyp/timer-sr.c b/arch/arm64/kvm/hyp/timer-sr.c
index
As the kernel fully runs in HYP when VHE is enabled, we can
directly branch to the kernel's panic() implementation, and
not perform an exception return.
Add the alternative code to deal with this.
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm64/kvm/hyp/switch.c | 35
Add basic CN7XXX interface detection.
This allows the kernel to boot with ethernet working as it initializes
the ethernet ports with SGMII instead of defaulting to RGMII routines.
Tested on the utm8 from Rhino Labs with a CN7130.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V1 -> V2
- Rebase
The fault decoding process (including computing the IPA in the case
of a permission fault) would be much better done in C code, as we
have a reasonable infrastructure to deal with the VHE/non-VHE
differences.
Let's move the whole thing to C, including the workaround for
erratum 834220, and just
With VHE, we place kernel {watch,break}-points at EL2 to get things
like kgdb and "perf -e mem:..." working.
This requires a bit of repainting in the low-level encore/decode,
but is otherwise pretty simple.
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/hw_breakpoint.h | 49
When the kernel is running in HYP (with VHE), it is necessary to
include EL2 events if the user requests counting kernel or
hypervisor events.
Signed-off-by: Marc Zyngier
---
arch/arm64/kernel/perf_event.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git
Use the recently introduced unified system register accessors for
those sysregs that behave differently depending on VHE being in
use or not.
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm64/kvm/hyp/sysreg-sr.c | 84 +-
1 file
Having both VHE and non-VHE capable CPUs in the same system
is likely to be a recipe for disaster.
If the boot CPU has VHE, but a secondary is not, we won't be
able to downgrade and run the kernel at EL1. Add CPU hotplug
to the mix, and this produces a terrifying mess.
Let's solve the problem
Despite the fact that a VHE enabled kernel runs at EL2, it uses
CPACR_EL1 to trap FPSIMD access. Add the required alternative
code to re-enable guest FPSIMD access when it has trapped to
EL2.
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm64/kvm/hyp/entry.S | 6 ++
1
As non-VHE and VHE have different ways to express the trapping of
FPSIMD registers to EL2, make __fpsimd_enabled a patchable predicate
and provide a VHE implementation.
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/kvm_arm.h | 3 +++
With ARMv8.1 VHE, the architecture is able to (almost) transparently
run the kernel at EL2, despite being written for EL1.
This patch takes care of the "almost" part, mostly preventing the kernel
from dropping from EL2 to EL1, and setting up the HYP configuration.
Signed-off-by: Marc Zyngier
ARMv8.1 comes with the "Virtualization Host Extension" (VHE for
short), which enables simpler support of Type-2 hypervisors.
This extension allows the kernel to directly run at EL2, and
significantly reduces the number of system registers shared between
host and guest, reducing the overhead of
Fu Wei wrote:
I have posted GTDT support separately :https://lkml.org/lkml/2016/2/1/660
devicetree driver and GTDT driver both export sbsa gwdt info to
"platform resource".
this driver get hardware info from platform resource.
I must be missing something. How does the driver probe? It
Hi Timur,
On 4 February 2016 at 01:48, Timur Tabi wrote:
> fu@linaro.org wrote:
>>
>> +static struct platform_driver sbsa_gwdt_driver = {
>> + .driver = {
>> + .name = "sbsa-gwdt",
>> + .pm = _gwdt_pm_ops,
>> + .of_match_table =
On Wed, 2016-02-03 at 13:13 +0100, Jason A. Donenfeld wrote:
> Signed-off-by: Jason A. Donenfeld
> ---
> lib/vsprintf.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/vsprintf.c b/lib/vsprintf.c
> index 1b1b1c8..85e6645 100644
> --- a/lib/vsprintf.c
> +++
Hi,
On 03/02/16 11:57, Steven Rostedt wrote:
> From: "Steven Rostedt (Red Hat)"
>
> Playing with SCHED_DEADLINE and cpusets, I found that I was unable to create
> new SCHED_DEADLINE tasks, with the error of EBUSY as if the bandwidth was
> already used up. I then realized there wa no way to see
On Wed, Feb 03, 2016 at 03:40:09PM +0100, Anton Wuerfel wrote:
> Hello,
>
> we noticed the patch series has not been merged yet to 4.5. Are there
> still problems we have to address?
I don't know, they are in my queue to be processed "soon"...
And they will not go into 4.5, that merge window is
On Wed, 2016-02-03 at 09:43 -0800, Alexander Duyck wrote:
> Read the history. I still say it is best if we don't accept a partial
> solution. If we are going to introduce the sysctl as a core item it
> should function as a core item and not as something that belongs to
> TCP only.
But this
hi,
Bin Liu writes:
> On Wed, Jan 20, 2016 at 11:56:34AM +0100, Arnd Bergmann wrote:
>> The phy-am335x driver accidentally selects 'USB_COMMON', which is
>> not correct as that symbol should indicate whether USB host or
>> target mode is enabled, but it might not:
>>
>> warning:
On Feb 3, 2016 5:52 AM, "Michael S. Tsirkin" wrote:
>
> On Tue, Feb 02, 2016 at 09:46:36PM -0800, Andy Lutomirski wrote:
> > virtio_ring currently sends the device (usually a hypervisor)
> > physical addresses of its I/O buffers. This is okay when DMA
> > addresses and physical addresses are the
Fu Wei wrote:
sorry, are you saying : using pre-timeout instead of this half timeout?
But even we have pre-timeout support, pre-timeout == timeout / 2, it
can not be configured without touch timeout.
if you want pre-timeout != timeout / 2, we have to modify WCV in the
interrupt routine.
On Tue, 2 Feb 2016, Andy Lutomirski wrote:
> This switches virtio to use the DMA API on Xen and if requested by
> module option.
>
> This fixes virtio on Xen, and it should break anything because it's
> off by default on everything except Xen PV on x86.
>
> To the Xen people: is this okay? If
Commit 944d9fec8d7a ("hugetlb: add support for gigantic page allocation at
runtime") has added the runtime gigantic page allocation via
alloc_contig_range(), making this support available only when CONFIG_CMA is
enabled. Because it doesn't depend on MIGRATE_CMA pageblocks and the
associated
Hi David,
2016-02-03 23:41 GMT+09:00 David Laight :
> From: Byeoungwook Kim
>> Sent: 03 February 2016 02:00
>> Conditional codes in rtl_addr_delay() were improved in readability and
>> performance by using switch codes.
>> ...
>> void rtl_addr_delay(u32 addr)
>> {
>> - if (addr == 0xfe)
>>
Hi Timur,
Thanks for your rapid feedback :-)
On 4 February 2016 at 01:27, Timur Tabi wrote:
> fu@linaro.org wrote:
>>
>> +#ifdef CONFIG_ARM_SBSA_WATCHDOG_PANIC
>> +static bool panic_enabled = true;
>
>
> I think this should default to 'false', because IMHO, this seems like an odd
yes, It
fu@linaro.org wrote:
+static struct platform_driver sbsa_gwdt_driver = {
+ .driver = {
+ .name = "sbsa-gwdt",
+ .pm = _gwdt_pm_ops,
+ .of_match_table = sbsa_gwdt_of_match,
+ },
+ .probe = sbsa_gwdt_probe,
+ .remove =
On Wed, Feb 03, 2016 at 02:33:11AM +, Yang, Wenyou wrote:
> > I would just remove the "active-semi,act8945a-regulator" node and make
> > "active-
> > semi,vsel-high" a property of the "active-semi,act8945a" node.
> > That way you can remove the mfd cell .of_compatible and OF table in the
> >
On 03/02/16 08:49, Christoffer Dall wrote:
> On Tue, Feb 02, 2016 at 03:32:04PM +, Marc Zyngier wrote:
>> On 01/02/16 15:36, Christoffer Dall wrote:
>>> On Mon, Jan 25, 2016 at 03:53:55PM +, Marc Zyngier wrote:
Having both VHE and non-VHE capable CPUs in the same system
is likely
On Wed, Feb 3, 2016 at 8:07 AM, Eric Dumazet wrote:
> On Wed, 2016-02-03 at 07:58 -0800, Alexander Duyck wrote:
>> > +++ b/net/core/sysctl_net_core.c
>>
>> I really don't think these changes belong in the core. Below you only
>> modify the TCP code path so this more likely belongs in the TCP path
From: Herbert Xu
> Sent: 03 February 2016 12:21
> On Wed, Feb 03, 2016 at 12:36:21PM +0100, Hannes Frederic Sowa wrote:
> >
> > Agreed that it feels like a hack, but a rather simple one. I would
> > consider this to be just a performance improvement. We certainly need
> > a slow-path when virtio
Uniwest evi is a portable electrical eddy current non-destructive
testing device.
Signed-off-by: Joshua Clayton
---
Changes since v2:
- removed fsl,data-mapping and fsl,data-width from lvds0 per Phillip Zabel
- removed MX6QDL_PAD_GPIO_19__GPIO4_IO05 from hoggrp. This pin is
used in a not yet
From: Aleksey Makarov
The OCTEON SATA controller is currently found on cn71XX devices.
Cc: Arnd Bergmann
Acked-by: Hans de Goede
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
Signed-off-by: Zubair Lutfullah Kakakhel
---
Changes in v7
- Rebase to
On Wed, Feb 3, 2016 at 5:24 AM, Peter Hurley wrote:
> Hi Dmitry,
>
> On 01/21/2016 09:43 AM, Peter Hurley wrote:
>> On 01/21/2016 02:06 AM, Dmitry Vyukov wrote:
>>> On Wed, Jan 20, 2016 at 5:08 PM, Peter Hurley
>>> wrote:
On 01/20/2016 05:02 AM, Peter Zijlstra wrote:
> On Wed, Dec 30,
On 02/01/2016 12:31 PM, Georgi Djakov wrote:
> The SAW2 (Subsystem Power Manager and Adaptive Voltage Scaling Wrapper 2)
> is part of the SPM subsystem. It is a hardware block in the Qualcomm
> chipsets that regulates the power to the CPU cores on platform such as
> apq8064, msm8974, apq8084 and
fu@linaro.org wrote:
+#ifdef CONFIG_ARM_SBSA_WATCHDOG_PANIC
+static bool panic_enabled = true;
I think this should default to 'false', because IMHO, this seems like an
odd feature. I'm not crazy about the fact that there's a Kconfig option
for it either, but I'm not going to NACK this
On 2/3/16, Don Zickus wrote:
> On Tue, Feb 02, 2016 at 03:40:34PM -0700, Jeffrey Merkey wrote:
>> >
>> > Please remember to add version history, so I can tell what changed.
>> >
>>
>> What command do I give to git when it creates the patch from git
>> format-patch that outputs what you are
A number of rtc devices, such as the NXP pcf2123 include a facility
to adjust the clock in order to compensate for temperature or a
crystal, capacitor, etc, that results in the rtc clock not running
at exactly 32.768 kHz.
Data sheets I have seen refer to this as a clock offset, and measure it
in
> Hmm, I am confused here. So you are saying because we are in the nmi
> handler you can not break into the system? The nmi handler prints some
> stuff to the screen, pokes the other cpus to print stuff to the screen and
> then returns to a normal operation. Unless you are saying the act of
>
From: Fu Wei
This patch registers the WS0 interrupt routine to trigger panic,
when the watchdog reachs the first stage (the half timeout).
This function can help administrator to backup the system context
info by panic console output or kdump (if supported), once system
goes wrong (doesn't feed
++ Vinayak Holikatti
Hi Vinayak,
Could I please get your opinion about the patch set?
thanks.
On 2/3/2016 3:39 PM, Arnd Bergmann wrote:
> On Wednesday 03 February 2016 15:01:34 Joao Pinto wrote:
>>
>> Hi Arnd,
>>
>> On 2/3/2016 12:54 PM, Arnd Bergmann wrote:
>>> On Wednesday 03 February 2016
From: Fu Wei
According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0)
is for alerting the system by interrupt, the second one (WS1) is a real
hardware reset.
This patch initially implements a simple single stage
From: Fu Wei
This can be a example of adding SBSA Generic Watchdog device node
into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann
Signed-off-by: Fu Wei
---
arch/arm64/boot/dts/arm/foundation-v8.dts | 8
1 file changed, 8 insertions(+)
diff
From: Fu Wei
The sbsa-gwdt.txt documentation in devicetree/bindings/watchdog is for
introducing SBSA(Server Base System Architecture) Generic Watchdog
device node info into FDT.
Also add sbsa-gwdt introduction in watchdog-parameters.txt
Acked-by: Arnd Bergmann
Acked-by: Rob Herring
From: Fu Wei
This can be a example of adding SBSA Generic Watchdog device node
into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Fu Wei
---
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 9
On Wed, Feb 3, 2016 at 6:20 PM, Juri Lelli wrote:
> On 03/02/16 21:40, Viresh Kumar wrote:
>> On 03-02-16, 15:54, Juri Lelli wrote:
>> > Ouch, I've just got this executing -f basic on Juno. :(
>> > It happens with the hotplug_1_by_1 test.
>> >
>
> [...]
>
>>
>> Urg..
>>
>> I failed to understand
From: Fu Wei
This patchset:
(1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt
for FDT info of SBSA Generic Watchdog, and give two examples of
adding SBSA Generic Watchdog device node into the dts files:
foundation-v8.dts and amd-seattle-soc.dtsi.
On 03/02/16 21:40, Viresh Kumar wrote:
> On 03-02-16, 15:54, Juri Lelli wrote:
> > Ouch, I've just got this executing -f basic on Juno. :(
> > It happens with the hotplug_1_by_1 test.
> >
[...]
>
> Urg..
>
> I failed to understand it for now though. Please test only the first 4
> patches and
On Fri, Jan 29, 2016 at 05:25:28PM +0100, Harald Geyer wrote:
> Mark Brown writes:
> > On Thu, Jan 28, 2016 at 07:55:17PM +, Harald Geyer wrote:
> > > The data structures either have been copied in
> > > of_get_gpio_regulator_config() already or are part of platform data,
> > > which we keep a
It looks like there are some dynamically loaded SSDTs, I would like to see
these.
> -Original Message-
> From: Chris Bainbridge [mailto:chris.bainbri...@gmail.com]
> Sent: Wednesday, February 03, 2016 3:05 AM
> To: Moore, Robert
> Cc: Zheng, Lv; Wysocki, Rafael J;
pcf2123 has an offset register, which can be used to make minor
adjustments to the clock rate to compensate for temperature or
a crystal that is not exactly right.
Signed-off-by: Joshua Clayton
---
drivers/rtc/rtc-pcf2123.c | 57 +++
1 file changed,
clock offset may be set and read in decimal parts per billion
attribute is /sys/class/rtc/rtcN/offset
The attribute is only visible for rtcs that have set_offset implemented.
Signed-off-by: Joshua Clayton
---
Documentation/rtc.txt | 6 ++
drivers/rtc/rtc-sysfs.c | 35
On Wed, Feb 03, 2016 at 06:13:15PM +0100, Mike Galbraith wrote:
> Ah, and the rest (the vast majority) can then be safely deflected away
> from nohz_full cpus.
Yeap, it should be possible to bounce majority of work items across
CPUs all we want.
--
tejun
On Tue, Feb 02, 2016 at 06:27:39PM +0800, Chen-Yu Tsai wrote:
> The X-Powers AXP809 PMIC has a similar set of regulators as the AXP221,
> though a few LDOs were removed, and a new switch output added. Like the
> AXP221, AXP809 also has DC1SW and DC5LDO, which are internally chained
> to DCDC1 and
The implemented Cortex A57 events are not A57 specific.
They are recommended by ARM and can be found on other
ARMv8 SOCs like Cavium ThunderX too. Therefore move
these events to the common PMUv3 table.
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 28
ARMv8.1 increases the PMU event number space. Detect the
presence of this PMUv3 type and extend the event mask.
The event mask is moved to struct arm_pmu so different event masks
can exist, depending on the PMU type.
Signed-off-by: Jan Glauber
---
arch/arm/kernel/perf_event_v6.c | 6
On Wed, 2016-02-03 at 12:06 -0500, Tejun Heo wrote:
> On Wed, Feb 03, 2016 at 06:01:53PM +0100, Mike Galbraith wrote:
> > Hm, so it's ok to queue work to an offline CPU? What happens if it
> > doesn't come back for an eternity or two?
>
> Right now, it just loses affinity. A more interesting
Add a compatible string for the Cavium ThunderX PMU.
Signed-off-by: Jan Glauber
---
Documentation/devicetree/bindings/arm/pmu.txt | 1 +
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 +
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt
Hello Joonas,
On Wed, Feb 03, 2016 at 04:24:28PM +0200, Joonas Lahtinen wrote:
> Use distinctive name for cpu_hotplug.dep_map to avoid the actual
> cpu_hotplug.lock appearing as cpu_hotplug.lock#2 in lockdep splats.
>
> Cc: Gautham R. Shenoy
> Cc: Rafael J. Wysocki
> Cc: Intel graphics driver
Support PMU events on Caviums ThunderX SOC. ThunderX supports
some additional counters compared to the default ARMv8 PMUv3:
- branch instructions counter
- stall frontend & backend counters
- L1 dcache load & store counters
- L1 icache counters
- iTLB & dTLB counters
- L1 dcache & icache prefetch
With the long cycle counter bit (LC) disabled the cycle counter is not
working on ThunderX SOC (ThunderX only implements Aarch64).
Also, according to documentation LC == 0 is deprecated.
To keep the code simple the patch does not introduce 64 bit wide counter
functions. Instead writing the cycle
Hi,
I'm reposting the whole series just in case my previous attempt to
repost only the broken patch was confusing. Patches are based on
4.5-rc2.
Patches 1-3 add support for ThunderX specific PMU events.
Patch 4 changes the cycle counter to overflow on 64 bit but tries to minimize
code changes.
On Wed, Feb 03, 2016 at 05:48:52PM +0100, Michal Hocko wrote:
> > So, the proper fix here is keeping cpu <-> node mapping stable across
> > cpu on/offlining which has been being worked on for a long time now.
> > The patchst is pending and it fixes other issues too.
>
> What if that node was
On Wed, Feb 03, 2016 at 06:01:53PM +0100, Mike Galbraith wrote:
> Hm, so it's ok to queue work to an offline CPU? What happens if it
> doesn't come back for an eternity or two?
Right now, it just loses affinity. A more interesting case is a cpu
going offline whlie work items bound to the cpu
On Wed, Feb 03, 2016 at 05:56:56PM +0100, Gregory CLEMENT wrote:
> Hi Mark,
>
> On mar., févr. 02 2016, Mark Rutland wrote:
> >> diff --git a/Documentation/kernel-parameters.txt
> >> b/Documentation/kernel-parameters.txt
> >> index 87d40a72f6a1..198f6bd56e84 100644
> >> ---
See http://www.infradead.org/rpr.html
From: Adrian Hunter
Fixes segmentation fault using, for instance:
(gdb) run record -I -e intel_pt/tsc=1,noretcomp=1/u /bin/ls
Starting program: /home/acme/bin/perf record -I -e
intel_pt/tsc=1,noretcomp=1/u /bin/ls
Missing separate debuginfos, use:
From: Hemant Kumar
'perf probe' through debuginfo__find_probes() in util/probe-finder.c
checks for the functions' frame descriptions in either .eh_frame section
of an ELF or the .debug_frame.
The check is based on whether either one of these sections is present.
Depending on distro, toolchain
Hi Ingo,
Please consider pulling,
- Arnaldo
The following changes since commit 28fb8a5b6e233fc384fb27f9f91f811b40ba9cf8:
Merge tag 'perf-urgent-for-mingo' of
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent
(2016-01-30 09:15:49 +0100)
are available in the
See http://www.infradead.org/rpr.html
From: Adrian Hunter
intel_pt_process_auxtrace_info() creates a pt->unknown_thread thread
that eventually needs to be freed by the last thread__put() on it, when
its refcount hits zero, which may happen in
intel_pt_process_auxtrace_info() error handling path
On Wed, 2016-02-03 at 11:24 -0500, Tejun Heo wrote:
> On Wed, Feb 03, 2016 at 01:28:56PM +0100, Michal Hocko wrote:
> > > The CPU was 168, and that one was offlined in the meantime. So
> > > __queue_work fails at:
> > > if (!(wq->flags & WQ_UNBOUND))
> > > pwq = per_cpu_ptr(wq->cpu_pwqs,
From: "Steven Rostedt (Red Hat)"
The sched_domain_sysctl setup is only enabled when SCHED_DEBUG is
configured. As debug.c is only compiled when SCHED_DEBUG is configured as
well, move the setup of sched_domain_sysctl into that file.
Note, the (un)register_sched_domain_sysctl() functions had to
From: "Steven Rostedt (Red Hat)"
As sched_feature is only created when SCHED_DEBUG is enabled, and the file
debug.c is only compiled when SCHED_DEBUG is enabled, it makes sense to move
sched_feature setup into that file and get rid of the #ifdef.
Signed-off-by: Steven Rostedt
---
I'm starting to play with SCHED_DEADLINE a bit and I'm able to cause
a bandwidth "leak". Then I realized there's no way to examine what bandwidths
are enabled on which CPUs. I added the bandwith ratios to the
/proc/sched_debug file.
I will be posting the SCHED_DEADLINE issue in a separate thread.
From: "Steven Rostedt (Red Hat)"
Playing with SCHED_DEADLINE and cpusets, I found that I was unable to create
new SCHED_DEADLINE tasks, with the error of EBUSY as if the bandwidth was
already used up. I then realized there wa no way to see what bandwidth is
used by the runqueues to debug the
Hi Chris,
See inline:
On 02/03/2016 12:58 AM, Chris Diamand wrote:
Hi Richard,
Reporting absolute position allows the synaptics and libinput xorg drivers
to treat the BYD touchpad as a touchpad, rather than a mouse. This allows
edge scrolling, tap to click, natural scrolling and any other
The driver has sysfs readings with runtime PM support for power saving.
It also offers buffer support that can be used together with IIO software
triggers.
Datasheet can be found here:
http://www.ti.com.cn/cn/lit/ds/symlink/ads1015.pdf
Signed-off-by: Daniel Baluta
---
Changes since v2:
Hi Mark,
On mar., févr. 02 2016, Mark Rutland wrote:
>> diff --git a/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> b/Documentation/devicetree/bindings/tty/serial/mvebu-uart.txt
>> new file mode 100644
>> index ..6087defd9f93
>> --- /dev/null
>> +++
See http://www.infradead.org/rpr.html
From: Namhyung Kim
Add 'L' key action to change the percent limit applied to both of hist
entries and callchains.
Suggested-by: Arnaldo Carvalho de Melo
Signed-off-by: Namhyung Kim
Cc: Andi Kleen
Cc: David Ahern
Cc: Jiri Olsa
Cc: Peter Zijlstra
Cc:
On 02/02/2016 12:25 PM, Andy Lutomirski wrote:
On Feb 2, 2016 5:37 AM, "Corey Minyard" wrote:
On 02/01/2016 03:25 AM, Jean Delvare wrote:
Hi Corey,
I won't comment on the IPMI side of this as this isn't my area. However
I have a comment on the DMI part:
Le Friday 29 January 2016 à 16:43
From: Paul Burton
> Sent: 03 February 2016 12:03
> Resets of the EG20T MAC on the MIPS Boston development board take longer
> than the 1000 loops that pch_gbe_wait_clr_bit was performing. Bump up
> the number of loops.
...
> diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
>
On 03/02/2016 17:23, Radim Krčmář wrote:
> Discard policy doesn't rely on information from notifiers, so we don't
> need to register notifiers unconditionally.
>
> Use of ps->lock doesn't make sense, but isn't any worse than before.
Oh, it's perfectly okay. Too fine-grained locks are bad, and
On 02/03/2016 05:48 AM, LABBE Corentin wrote:
Hello
On my cubieboard2 (ARM) I have the following crash when modprobing any module.
Without CONFIG_DEBUG_SET_MODULE_RONX the crash goes away.
I bisected this issue to 85c898db6327353d38f3dd428457384cf81f83f8 module: clean
up RO/NX handling.
From: Arnaldo Carvalho de Melo
The ui initialization changes hpp format callbacks, based on the used
browser. Thus we need this init being processed before setup_sorting.
Replica of a patch by Jiri for 'perf report'.
Cc: David Ahern
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
See http://www.infradead.org/rpr.html
From: Jiri Olsa
Passing perf_hpp_list all the way through setup_output_list so the
output entry could be added on the arbitrary list.
Signed-off-by: Jiri Olsa
Cc: David Ahern
Cc: Namhyung Kim
Cc: Peter Zijlstra
Link:
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