In Cygnus SOC touch screen controller registers are shared
with ADC and flex timer. Using readl/writel could lead to
race condition. So touch screen driver is enhanced to support
register access using syscon framework API's to take care of
mutually exclusive access.
Signed-off-by: Raveendra
In Cygnus SOC touch screen controller registers are shared
with ADC and flex timer. Using readl/writel could lead to
race condition. So touch screen driver is enhanced to support
register access using syscon framework API's to take care of
mutually exclusive access.
Signed-off-by: Raveendra
In Cygnus SOC touch screen controller registers are shared
with ADC and flex timer. Using readl/writel could lead to
race condition. So touchscreen driver is enhanced to support
syscon based register access to take care of mutually exclusive
access.
This patch enables syscon support in
This patchset is based on v4.5-rc3 tag and its tested on
Broadcom Cygnus SoC.
The patches can be fetched from iproc-tsc-v5 branch of
https://github.com/Broadcom/arm64-linux.git
Changes since v4:
- Fixed odd_ptr_err.cocci script warning
Changes since v3:
- Renamed touchscreen node "tsc" to
In Cygnus SOC touch screen controller registers are shared
with ADC and flex timer. Using readl/writel could lead to
race condition. So touch screen driver is enhanced to support
register access using syscon framework API's to take care of
mutually exclusive access.In addition to this existing
In Cygnus SOC touch screen controller registers are shared
with ADC and flex timer. Using readl/writel could lead to
race condition. So touchscreen driver is enhanced to support
syscon based register access to take care of mutually exclusive
access.
This patch enables syscon support in
This patchset is based on v4.5-rc3 tag and its tested on
Broadcom Cygnus SoC.
The patches can be fetched from iproc-tsc-v5 branch of
https://github.com/Broadcom/arm64-linux.git
Changes since v4:
- Fixed odd_ptr_err.cocci script warning
Changes since v3:
- Renamed touchscreen node "tsc" to
In Cygnus SOC touch screen controller registers are shared
with ADC and flex timer. Using readl/writel could lead to
race condition. So touch screen driver is enhanced to support
register access using syscon framework API's to take care of
mutually exclusive access.In addition to this existing
Hi,
I am Lijun Ou. I have sent the PATCH v4 of HiSilicon RoCE driver at March
22, 2016.
if you are convenient, please help to review. Welcome to give your reviewing.
thanks
Lijun Ou
Hi,
I am Lijun Ou. I have sent the PATCH v4 of HiSilicon RoCE driver at March
22, 2016.
if you are convenient, please help to review. Welcome to give your reviewing.
thanks
Lijun Ou
For your information, there is another patch I posted which looks similar
to this patch, but is totally different, that is,
https://lkml.org/lkml/2016/3/11/192, trying to solve a deadlock problem.
In that patch, I tried to make printk async to avoid the deadlock but I
found Sergey and Jan were
For your information, there is another patch I posted which looks similar
to this patch, but is totally different, that is,
https://lkml.org/lkml/2016/3/11/192, trying to solve a deadlock problem.
In that patch, I tried to make printk async to avoid the deadlock but I
found Sergey and Jan were
Hi all,
On Thu, 24 Mar 2016 13:09:41 +1100 Stephen Rothwell
wrote:
>
> Please do not add any v4.7 related material to your linux-next included
> trees until after v4.6-rc1 is released.
I forgot to say that there will be no linux-next release tomorrow or
Monday.
--
Hi all,
On Thu, 24 Mar 2016 13:09:41 +1100 Stephen Rothwell
wrote:
>
> Please do not add any v4.7 related material to your linux-next included
> trees until after v4.6-rc1 is released.
I forgot to say that there will be no linux-next release tomorrow or
Monday.
--
Cheers,
Stephen Rothwell
Dear Sir
Hello!
Our company is the Guangzhou Honda and China FAW suppliers. We have been
providing quality products and services for them.
Our company's main products:
Graphite machining end mill
The denture machining tool
Zirconia processing tool
PCD tools
CNC inserts
Milling toolholder
Dear Sir
Hello!
Our company is the Guangzhou Honda and China FAW suppliers. We have been
providing quality products and services for them.
Our company's main products:
Graphite machining end mill
The denture machining tool
Zirconia processing tool
PCD tools
CNC inserts
Milling toolholder
From: Len Brown
Some SKL-H configurations require "intel_idle.max_cstate=7" to boot.
While that is an effective workaround, it disables C10.
This patch detects the problematic configuration,
and disables C8 and C9, keeping C10 enabled.
Note that enabling SGX in BIOS SETUP
From: Len Brown
Some SKL-H configurations require "intel_idle.max_cstate=7" to boot.
While that is an effective workaround, it disables C10.
This patch detects the problematic configuration,
and disables C8 and C9, keeping C10 enabled.
Note that enabling SGX in BIOS SETUP can also prevent this
From: Dasaratharaman Chandramouli
Enables "Intel(R) Xeon Phi(TM) Processor x200 Product Family" support,
formerly code-named KNL. It is based on modified Intel Atom Silvermont
microarchitecture.
Signed-off-by: Dasaratharaman Chandramouli
From: Dasaratharaman Chandramouli
Enables "Intel(R) Xeon Phi(TM) Processor x200 Product Family" support,
formerly code-named KNL. It is based on modified Intel Atom Silvermont
microarchitecture.
Signed-off-by: Dasaratharaman Chandramouli
[micah.bar...@intel.com: adjusted values of residency
[PATCH 1/2] intel_idle: prevent SKL-H boot failure when C8+C9+C10
... fixes a boot hang, and needs to got to .stable
[PATCH 2/2] intel_idle: Support for Intel Xeon Phi Processor x200
... adds new platform support
Please let me know if you see any trouble with them.
thanks,
Len Brown, Intel Open
[PATCH 1/2] intel_idle: prevent SKL-H boot failure when C8+C9+C10
... fixes a boot hang, and needs to got to .stable
[PATCH 2/2] intel_idle: Support for Intel Xeon Phi Processor x200
... adds new platform support
Please let me know if you see any trouble with them.
thanks,
Len Brown, Intel Open
There's one corner case need to be fixed: !cpuidle_ops[cpu].init.
patch1 tries to address this corner case.
patch2 tries to improve arm_cpuidle_suspend() a bit by moving .suspend
check into arm_cpuidle_init().
Jisheng Zhang (2):
ARM: cpuidle: fix !cpuidle_ops[cpu].init case during init
ARM:
There's one corner case need to be fixed: !cpuidle_ops[cpu].init.
patch1 tries to address this corner case.
patch2 tries to improve arm_cpuidle_suspend() a bit by moving .suspend
check into arm_cpuidle_init().
Jisheng Zhang (2):
ARM: cpuidle: fix !cpuidle_ops[cpu].init case during init
ARM:
Currently, we check cpuidle_ops.suspend every time when entering a
low-power idle state. But this check could be avoided in this hot path
by moving it into arm_cpuidle_init() to reduce arm_cpuidle_suspend()
overhead a bit.
Signed-off-by: Jisheng Zhang
---
Let's assume cpuidle_ops exists but it doesn't implement the according
init member, current arm_cpuidle_init() will return success to its
caller, but in fact it should return -EOPNOTSUPP.
Signed-off-by: Jisheng Zhang
---
arch/arm/kernel/cpuidle.c | 8 ++--
1 file
Currently, we check cpuidle_ops.suspend every time when entering a
low-power idle state. But this check could be avoided in this hot path
by moving it into arm_cpuidle_init() to reduce arm_cpuidle_suspend()
overhead a bit.
Signed-off-by: Jisheng Zhang
---
arch/arm/kernel/cpuidle.c | 8 ++--
Let's assume cpuidle_ops exists but it doesn't implement the according
init member, current arm_cpuidle_init() will return success to its
caller, but in fact it should return -EOPNOTSUPP.
Signed-off-by: Jisheng Zhang
---
arch/arm/kernel/cpuidle.c | 8 ++--
1 file changed, 6 insertions(+), 2
Currently, we check cpu_ops->cpu_suspend every time when entering a
low-power idle state. But this check could be avoided in this hot path
by moving it into arm_cpuidle_init() to reduce arm_cpuidle_suspend()
overhead a bit.
Signed-off-by: Jisheng Zhang
---
If cpu_ops has not been registered, arm_cpuidle_init() will return
-EOPNOTSUPP, so arm_cpuidle_suspend() will never have chance to
run. In other word, the cpu_ops check can be avoid.
Signed-off-by: Jisheng Zhang
---
arch/arm64/kernel/cpuidle.c | 5 ++---
1 file changed, 2
Currently, we check cpu_ops->cpu_suspend every time when entering a
low-power idle state. But this check could be avoided in this hot path
by moving it into arm_cpuidle_init() to reduce arm_cpuidle_suspend()
overhead a bit.
Signed-off-by: Jisheng Zhang
---
arch/arm64/kernel/cpuidle.c | 8
If cpu_ops has not been registered, arm_cpuidle_init() will return
-EOPNOTSUPP, so arm_cpuidle_suspend() will never have chance to
run. In other word, the cpu_ops check can be avoid.
Signed-off-by: Jisheng Zhang
---
arch/arm64/kernel/cpuidle.c | 5 ++---
1 file changed, 2 insertions(+), 3
This series is to improve the arm_cpuidle_suspend() a bit by removing/moving
out checks from this hot path.
Jisheng Zhang (2):
arm64: cpuidle: remove cpu_ops check from arm_cpuidle_suspend()
arm64: cpuidle: make arm_cpuidle_suspend() a bit more efficient
arch/arm64/kernel/cpuidle.c | 9
This series is to improve the arm_cpuidle_suspend() a bit by removing/moving
out checks from this hot path.
Jisheng Zhang (2):
arm64: cpuidle: remove cpu_ops check from arm_cpuidle_suspend()
arm64: cpuidle: make arm_cpuidle_suspend() a bit more efficient
arch/arm64/kernel/cpuidle.c | 9
Currently, entering idle need to check the idx every time to choose the
real entering idle routine. But this check could be avoided by pointing
the idle enter function pointer of each idle states to the routines
suitable for each states directly.
Signed-off-by: Jisheng Zhang
Currently, entering idle need to check the idx every time to choose the
real entering idle routine. But this check could be avoided by pointing
the idle enter function pointer of each idle states to the routines
suitable for each states directly.
Signed-off-by: Jisheng Zhang
---
On Thu, Mar 24, 2016 at 05:26:50AM +0900, Gioh Kim wrote:
>Hmmm... But, in failure case, is it safe to call putback_lru_page() for
>them?
>And, PageIsolated() would be left. Is it okay? It's not symmetric that
>isolated page can be freed by decreasing ref count without calling
>
On Thu, Mar 24, 2016 at 05:26:50AM +0900, Gioh Kim wrote:
>Hmmm... But, in failure case, is it safe to call putback_lru_page() for
>them?
>And, PageIsolated() would be left. Is it okay? It's not symmetric that
>isolated page can be freed by decreasing ref count without calling
>
2016-03-24 1:38 GMT+08:00, Pablo Neira Ayuso :
> On Thu, Mar 24, 2016 at 12:42:43AM +0800, Baozeng wrote:
>> 2016-03-22 23:27 GMT+08:00 Eric Dumazet :
>> > Untested patch would be :
>> >
>> > diff --git a/net/bridge/netfilter/ebtables.c
>> >
2016-03-24 1:38 GMT+08:00, Pablo Neira Ayuso :
> On Thu, Mar 24, 2016 at 12:42:43AM +0800, Baozeng wrote:
>> 2016-03-22 23:27 GMT+08:00 Eric Dumazet :
>> > Untested patch would be :
>> >
>> > diff --git a/net/bridge/netfilter/ebtables.c
>> > b/net/bridge/netfilter/ebtables.c
>> > index
On Wed, Mar 23, 2016 at 02:05:11PM +0900, Joonsoo Kim wrote:
> On Tue, Mar 22, 2016 at 11:55:45PM +0900, Minchan Kim wrote:
> > On Tue, Mar 22, 2016 at 02:50:37PM +0900, Joonsoo Kim wrote:
> > > On Mon, Mar 21, 2016 at 03:31:02PM +0900, Minchan Kim wrote:
> > > > We have allowed migration for only
On Wed, Mar 23, 2016 at 02:05:11PM +0900, Joonsoo Kim wrote:
> On Tue, Mar 22, 2016 at 11:55:45PM +0900, Minchan Kim wrote:
> > On Tue, Mar 22, 2016 at 02:50:37PM +0900, Joonsoo Kim wrote:
> > > On Mon, Mar 21, 2016 at 03:31:02PM +0900, Minchan Kim wrote:
> > > > We have allowed migration for only
This patch adds the generic exynos bus frequency driver for AMBA AXI bus
of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
have the common architecture for bus between DRAM and sub-blocks in SoC.
This driver can support the generic bus frequency driver for Exynos SoCs.
In
This patch adds the generic exynos bus frequency driver for AMBA AXI bus
of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
have the common architecture for bus between DRAM and sub-blocks in SoC.
This driver can support the generic bus frequency driver for Exynos SoCs.
In
This patch adds the new DEVFREQ_TRANSITION_NOTIFIER notifier to send
the notification when the frequency of device is changed.
This notifier has two state as following:
- DEVFREQ_PRECHANGE : Notify it before chaning the frequency of device
- DEVFREQ_POSTCHANGE : Notify it after changed the
This patch adds the new DEVFREQ_TRANSITION_NOTIFIER notifier to send
the notification when the frequency of device is changed.
This notifier has two state as following:
- DEVFREQ_PRECHANGE : Notify it before chaning the frequency of device
- DEVFREQ_POSTCHANGE : Notify it after changed the
This patch adds the detailed corrleation between sub-blocks and power line
for Exynos3250, Exynos4210 and Exynos4x12.
Signed-off-by: Chanwoo Choi
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 51 ++
1 file changed, 51 insertions(+)
diff
This patch just adds the governor type to identify them
by using the defined constant.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/governor.h| 6 ++
drivers/devfreq/governor_performance.c| 1 +
drivers/devfreq/governor_powersave.c | 1 +
On Thu, Mar 24, 2016 at 12:38 AM, Maxime Ripard
wrote:
> The DRAM gates control whether the image / display devices on the SoC have
> access to the DRAM clock or not.
>
> Enable it.
>
> Signed-off-by: Maxime Ripard
Acked-by:
This patch adds the detailed corrleation between sub-blocks and power line
for Exynos3250, Exynos4210 and Exynos4x12.
Signed-off-by: Chanwoo Choi
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 51 ++
1 file changed, 51 insertions(+)
diff --git
This patch just adds the governor type to identify them
by using the defined constant.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/governor.h| 6 ++
drivers/devfreq/governor_performance.c| 1 +
drivers/devfreq/governor_powersave.c | 1 +
On Thu, Mar 24, 2016 at 12:38 AM, Maxime Ripard
wrote:
> The DRAM gates control whether the image / display devices on the SoC have
> access to the DRAM clock or not.
>
> Enable it.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
I assume you'll add another version for A10s, or move
This patch adds the 'BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS' entry to review
the
patches as maintainer. Patches will be picked up by DEVFREQ maintainer
on devfreq git repository.
Signed-off-by: Chanwoo Choi
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
This patch adds the 'BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS' entry to review
the
patches as maintainer. Patches will be picked up by DEVFREQ maintainer
on devfreq git repository.
Signed-off-by: Chanwoo Choi
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git
This patch adds the support of bus frequency feature for sub-blocks which share
the one power line. If each bus depends on the power line, each bus is not able
to change the voltage by oneself. To optimize the power-consumption on runtime,
some buses using the same power line should change the
Dear Anand and Tobias,
To Anand,
First of all, thanks to your test on previous patchset.
I removed the your tested-by tag from this version
because I modified the devfreq core using DEVFREQ_TRANSITION_NOTIFIER notifier.
I think that this patch-set need to test with this patchset.
If you possible,
This patch adds the support of bus frequency feature for sub-blocks which share
the one power line. If each bus depends on the power line, each bus is not able
to change the voltage by oneself. To optimize the power-consumption on runtime,
some buses using the same power line should change the
Dear Anand and Tobias,
To Anand,
First of all, thanks to your test on previous patchset.
I removed the your tested-by tag from this version
because I modified the devfreq core using DEVFREQ_TRANSITION_NOTIFIER notifier.
I think that this patch-set need to test with this patchset.
If you possible,
This patch adds the new passive governor for DEVFREQ framework. The following
governors are already present and used for DVFS (Dynamic Voltage and Frequency
Scaling) drivers. The following governors are independently used for one device
driver which don't give the influence to other device drviers
This patch adds the new passive governor for DEVFREQ framework. The following
governors are already present and used for DVFS (Dynamic Voltage and Frequency
Scaling) drivers. The following governors are independently used for one device
driver which don't give the influence to other device drviers
This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
SDRAM devices. The bus includes the OPP tables and the source clock for DMC
block.
Following list specifies the detailed relation between
This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.
The devfreq-events (ppmu_dmc0*) can monitor the utilization of
This patch adds the documentation for generic exynos bus frequency
driver.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++
1 file changed, 95
This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
SDRAM devices. The bus includes the OPP tables and the source clock for DMC
block.
Following list specifies the detailed relation between
This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.
The devfreq-events (ppmu_dmc0*) can monitor the utilization of
This patch adds the documentation for generic exynos bus frequency
driver.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++
1 file changed, 95 insertions(+)
create mode 100644
This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
THis patch adds the bus device tree nodes for both MIF (Memory) and INT
(Internal) block to enable the bus frequency.
The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
bus is parent device in INT block using VDD_INT.
Signed-off-by: Chanwoo Choi
THis patch adds the bus device tree nodes for both MIF (Memory) and INT
(Internal) block to enable the bus frequency.
The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
bus is parent device in INT block using VDD_INT.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof
This patch adds the new devfreq_get_devfreq_by_phandle() OF helper function
which can find the instance of devfreq device by using phandle ("devfreq").
Signed-off-by: Chanwoo Choi
Signed-off-by: MyungJoo Ham
---
drivers/devfreq/devfreq.c | 44
This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
This patch adds the new devfreq_get_devfreq_by_phandle() OF helper function
which can find the instance of devfreq device by using phandle ("devfreq").
Signed-off-by: Chanwoo Choi
Signed-off-by: MyungJoo Ham
---
drivers/devfreq/devfreq.c | 44
This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/exynos4x12.dtsi | 68 +++
Dear all,
This patchset uses the DEVFREQ_TRANSITION_NOTIFIER notifier to connecth
devfreq device using ondemand governor and devfreq device using passive
governor. Also I fix the some issue reported by 'Tobias Jakobi' and add the
detailed issue information. But, this patchset don't modify the
This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for
Dear all,
This patchset uses the DEVFREQ_TRANSITION_NOTIFIER notifier to connecth
devfreq device using ondemand governor and devfreq device using passive
governor. Also I fix the some issue reported by 'Tobias Jakobi' and add the
detailed issue information. But, this patchset don't modify the
This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for
This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes
because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
PPMU device tree node.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
This patch adds the bus device-tree nodes of INT (internal) block
to enable the bus frequency scaling. The following sub-blocks share
the VDD_INT power source:
- LEFTBUS (parent device)
- RIGHTBUS
- PERIL
- LCD0
- FSYS
- MCUISP / ISP
- MFC
The LEFTBUS is parent device with devfreq ondemand
This patch updates the documentation for passive bus devices and adds the
detailed example of Exynos3250.
Signed-off-by: Chanwoo Choi
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 250 -
1 file changed, 247 insertions(+), 3 deletions(-)
This patch adds the bus device-tree nodes of INT (internal) block
to enable the bus frequency scaling. The following sub-blocks share
the VDD_INT power source:
- LEFTBUS (parent device)
- RIGHTBUS
- PERIL
- LCD0
- FSYS
- MCUISP / ISP
- MFC
The LEFTBUS is parent device with devfreq ondemand
This patch updates the documentation for passive bus devices and adds the
detailed example of Exynos3250.
Signed-off-by: Chanwoo Choi
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 250 -
1 file changed, 247 insertions(+), 3 deletions(-)
diff --git
This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes
because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
PPMU device tree node.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/exynos3250-monk.dts | 41
This patch expands the voltage range of buck1/3 regulator due to as following:
- MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'.
- INT (Internal) bus frequency needs the range of '900 - 1050 mV'.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof
This patch expands the voltage range of buck1/3 regulator due to as following:
- MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'.
- INT (Internal) bus frequency needs the range of '900 - 1050 mV'.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
This patch removes the unused exynos4/5 busfreq driver. Instead,
generic exynos-bus frequency driver support the all Exynos SoCs.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/Kconfig | 22 -
drivers/devfreq/Makefile |2 -
This patch removes the unused exynos4/5 busfreq driver. Instead,
generic exynos-bus frequency driver support the all Exynos SoCs.
Signed-off-by: Chanwoo Choi
---
drivers/devfreq/Kconfig | 22 -
drivers/devfreq/Makefile |2 -
drivers/devfreq/exynos/Makefile |
The comment in file header doesn't hold true anymore, drop it.
Signed-off-by: Viresh Kumar
---
drivers/cpufreq/cpufreq-dt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c
index f951f911786e..5f8dbe640a20
The comment in file header doesn't hold true anymore, drop it.
Signed-off-by: Viresh Kumar
---
drivers/cpufreq/cpufreq-dt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c
index f951f911786e..5f8dbe640a20 100644
---
There are several reports of freeze on enabling HWP (Hardware PStates)
feature on Skylake based systems by Intel P states driver. The root
cause is identified as the HWP interrupts causing BIOS code to freeze.
HWP interrupts uses thermal LVT.
Linux natively handles thermal interrupts, but in
There are several reports of freeze on enabling HWP (Hardware PStates)
feature on Skylake based systems by Intel P states driver. The root
cause is identified as the HWP interrupts causing BIOS code to freeze.
HWP interrupts uses thermal LVT.
Linux natively handles thermal interrupts, but in
Hi YH,
On Wed, Mar 23, 2016 at 5:53 PM, YH Huang wrote:
> When the battery is dry and BATTERY_FULL_DISCHARGED is set,
> we should check BATTERY_DISCHARGING to decide the power status.
> If BATTERY_DISCHARGING is set, the power status is not charging.
> Or the power status
Hi YH,
On Wed, Mar 23, 2016 at 5:53 PM, YH Huang wrote:
> When the battery is dry and BATTERY_FULL_DISCHARGED is set,
> we should check BATTERY_DISCHARGING to decide the power status.
> If BATTERY_DISCHARGING is set, the power status is not charging.
> Or the power status should be charging.
>
>
From: Li Zhang
__free_pages_boot_core has parameter pfn which is not used at all.
So this patch is to make it clean.
Signed-off-by: Li Zhang
---
mm/page_alloc.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff
From: Li Zhang
__free_pages_boot_core has parameter pfn which is not used at all.
So this patch is to make it clean.
Signed-off-by: Li Zhang
---
mm/page_alloc.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index
On 2016/3/24 3:25, Alexei Starovoitov wrote:
On Wed, Mar 23, 2016 at 06:08:41PM +0800, Wangnan (F) wrote:
On 2016/3/23 17:50, Peter Zijlstra wrote:
On Mon, Mar 14, 2016 at 09:59:43AM +, Wang Nan wrote:
Convert perf_output_begin to __perf_output_begin and make the later
function able to
On 2016/3/24 3:25, Alexei Starovoitov wrote:
On Wed, Mar 23, 2016 at 06:08:41PM +0800, Wangnan (F) wrote:
On 2016/3/23 17:50, Peter Zijlstra wrote:
On Mon, Mar 14, 2016 at 09:59:43AM +, Wang Nan wrote:
Convert perf_output_begin to __perf_output_begin and make the later
function able to
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