Re: [PATCH kernel v4 11/11] powerpc/powernv/npu: Enable NVLink pass through

On 05/04/2016 12:08 AM, Alistair Popple wrote: Hi Alexey, On Fri, 29 Apr 2016 18:55:24 Alexey Kardashevskiy wrote: IBM POWER8 NVlink systems come with Tesla K40-ish GPUs each of which also has a couple of fast speed links (NVLink). The interface to links is exposed as an emulated PCI bridge

Re: [PATCH kernel v4 11/11] powerpc/powernv/npu: Enable NVLink pass through

On 05/04/2016 12:08 AM, Alistair Popple wrote: Hi Alexey, On Fri, 29 Apr 2016 18:55:24 Alexey Kardashevskiy wrote: IBM POWER8 NVlink systems come with Tesla K40-ish GPUs each of which also has a couple of fast speed links (NVLink). The interface to links is exposed as an emulated PCI bridge

Re: [PATCH v4 3/3] ARM: dts: use syscon in cygnus touchscreen dt node

Thanks Dmitry and Florian. Hi Dmitry, I understand the dts changes are really needed for the touch screen driver changes made in this patch. But currently there are no deployed systems/customer's using this driver. So please pull the driver changes and I will follow up to make sure dts changes

Re: [PATCH v4 3/3] ARM: dts: use syscon in cygnus touchscreen dt node

Thanks Dmitry and Florian. Hi Dmitry, I understand the dts changes are really needed for the touch screen driver changes made in this patch. But currently there are no deployed systems/customer's using this driver. So please pull the driver changes and I will follow up to make sure dts changes

RE: [PATCH 1/2] usb: configfs: allow UDC binding rule configured as binding to *any* UDC

Hi, > > On most platforms, there is only one device controller available. > > In this case, we desn't care the UDC's name. So let's ignore the > > name by setting 'UDC' to 'any'. > > Hmm libubsgx allows to do this for a very long time. You simply pass > NULL instead of pointer to usbg_udc. > >

RE: [PATCH 1/2] usb: configfs: allow UDC binding rule configured as binding to *any* UDC

Hi, > > On most platforms, there is only one device controller available. > > In this case, we desn't care the UDC's name. So let's ignore the > > name by setting 'UDC' to 'any'. > > Hmm libubsgx allows to do this for a very long time. You simply pass > NULL instead of pointer to usbg_udc. > >

[PATCH v8 0/7] usb: add support for Intel dual role port mux

Intel SOC chips are featured with USB dual role. The host role is provided by Intel xHCI IP, and the gadget role is provided by IP from designware. Tablet platform designs always share a single port for both host and gadget controllers. There is a mux to switch the port to the right controller

[PATCH v8 0/7] usb: add support for Intel dual role port mux

Intel SOC chips are featured with USB dual role. The host role is provided by Intel xHCI IP, and the gadget role is provided by IP from designware. Tablet platform designs always share a single port for both host and gadget controllers. There is a mux to switch the port to the right controller

[PATCH v8 2/7] usb: mux: add generic code for dual role port mux

Several Intel platforms implement USB dual role by having completely separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share a single USB port. There is another external port mux which controls where the data lines should go. While the USB controllers are part of the silicon, the

[PATCH v8 2/7] usb: mux: add generic code for dual role port mux

Several Intel platforms implement USB dual role by having completely separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share a single USB port. There is another external port mux which controls where the data lines should go. While the USB controllers are part of the silicon, the

[PATCH v8 5/7] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

Some Intel platforms have an USB port mux controlled by GPIOs. There's a single ACPI platform device that provides 1) USB ID extcon device; 2) USB vbus regulator device; and 3) USB port switch device. This MFD driver will split these 3 devices for their respective drivers. [baolu: removed .owner

Re: [PATCH] kasan: improve double-free detection

On Wed, May 4, 2016 at 10:13 PM, Luruo, Kuthonuzo wrote: >> >> I missed that Alexander already landed patches that reduce header size >> >> to 16 bytes. >> >> It is not OK to increase them again. Please leave state as bitfield >> >> and update it with CAS (if we introduce

[PATCH v8 3/7] usb: mux: add driver for Intel gpio controlled port mux

In some Intel platforms, a single usb port is shared between USB host and device controller. The shared port is under control of GPIO pins. This patch adds the support for USB GPIO controlled port mux. [baolu: removed .owner per platform_no_drv_owner.cocci] Signed-off-by: David Cohen

[PATCH v8 5/7] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

Some Intel platforms have an USB port mux controlled by GPIOs. There's a single ACPI platform device that provides 1) USB ID extcon device; 2) USB vbus regulator device; and 3) USB port switch device. This MFD driver will split these 3 devices for their respective drivers. [baolu: removed .owner

Re: [PATCH] kasan: improve double-free detection

On Wed, May 4, 2016 at 10:13 PM, Luruo, Kuthonuzo wrote: >> >> I missed that Alexander already landed patches that reduce header size >> >> to 16 bytes. >> >> It is not OK to increase them again. Please leave state as bitfield >> >> and update it with CAS (if we introduce helper functions for

[PATCH v8 3/7] usb: mux: add driver for Intel gpio controlled port mux

In some Intel platforms, a single usb port is shared between USB host and device controller. The shared port is under control of GPIO pins. This patch adds the support for USB GPIO controlled port mux. [baolu: removed .owner per platform_no_drv_owner.cocci] Signed-off-by: David Cohen

[PATCH v8 6/7] usb: pci-quirks: add Intel USB drcfg mux device

In some Intel platforms, a single usb port is shared between USB host and device controllers. The shared port is under control of a switch which is defined in the Intel vendor defined extended capability for xHCI. This patch adds the support to detect and create the platform device for the port

[PATCH v8 6/7] usb: pci-quirks: add Intel USB drcfg mux device

In some Intel platforms, a single usb port is shared between USB host and device controllers. The shared port is under control of a switch which is defined in the Intel vendor defined extended capability for xHCI. This patch adds the support to detect and create the platform device for the port

[PATCH v8 7/7] MAINTAINERS: add maintainer entry for Intel USB dual role mux drivers

Add a maintainer entry for Intel USB dual role mux drivers and add myself as a maintainer. Signed-off-by: Lu Baolu --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 1d5b4be..6ab9e02 100644 --- a/MAINTAINERS

[PATCH v8 7/7] MAINTAINERS: add maintainer entry for Intel USB dual role mux drivers

Add a maintainer entry for Intel USB dual role mux drivers and add myself as a maintainer. Signed-off-by: Lu Baolu --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 1d5b4be..6ab9e02 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@

[PATCH v8 4/7] usb: mux: add driver for Intel drcfg controlled port mux

Several Intel PCHs and SOCs have an internal mux that is used to share one USB port between device controller and host controller. The mux is handled through the Dual Role Configuration Register. Signed-off-by: Heikki Krogerus Signed-off-by: Lu Baolu

[PATCH v8 1/7] regulator: fixed: add support for ACPI interface

Add support to retrieve fixed voltage configure information through ACPI interface. This is needed for Intel Bay Trail devices, where a GPIO is used to control the USB vbus. Signed-off-by: Lu Baolu --- drivers/regulator/fixed.c | 46

[PATCH v8 4/7] usb: mux: add driver for Intel drcfg controlled port mux

Several Intel PCHs and SOCs have an internal mux that is used to share one USB port between device controller and host controller. The mux is handled through the Dual Role Configuration Register. Signed-off-by: Heikki Krogerus Signed-off-by: Lu Baolu Signed-off-by: Wu Hao Reviewed-by: Felipe

[PATCH v8 1/7] regulator: fixed: add support for ACPI interface

Add support to retrieve fixed voltage configure information through ACPI interface. This is needed for Intel Bay Trail devices, where a GPIO is used to control the USB vbus. Signed-off-by: Lu Baolu --- drivers/regulator/fixed.c | 46 ++ 1 file

[PATCH] mm/zsmalloc: avoid unnecessary iteration in get_pages_per_zspage()

if we find a zspage with usage == 100%, there is no need to try other zspages. Signed-off-by: Ganesh Mahendran Cc: Minchan Kim Cc: Nitin Gupta Cc: Sergey Senozhatsky --- mm/zsmalloc.c |

[PATCH] mm/zsmalloc: avoid unnecessary iteration in get_pages_per_zspage()

if we find a zspage with usage == 100%, there is no need to try other zspages. Signed-off-by: Ganesh Mahendran Cc: Minchan Kim Cc: Nitin Gupta Cc: Sergey Senozhatsky --- mm/zsmalloc.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c index

[PATCH 0/3] mfd: lp873x: Add lp873x PMIC support

The LP873X chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Regulators. - Configurable General Purpose Output Signals(GPO). PMIC interacts with the main processor through i2c. PMIC has couple of

[PATCH 0/3] mfd: lp873x: Add lp873x PMIC support

The LP873X chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Regulators. - Configurable General Purpose Output Signals(GPO). PMIC interacts with the main processor through i2c. PMIC has couple of

[PATCH] mfd: lp873x: Add lp873x PMIC support

The LP873X chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Regulators. - Configurable General Purpose Output Signals(GPO). PMIC interacts with the main processor through i2c. PMIC has couple of

[PATCH 1/3] Documentation: mfd/regulator: LP873X: Add information for the mfd and regulator drivers

Add information for the mfd and regulator drivers. Signed-off-by: Keerthy --- Documentation/devicetree/bindings/mfd/lp873x.txt | 56 + .../devicetree/bindings/regulator/lp873x.txt | 98 ++ 2 files changed, 154 insertions(+) create mode

[PATCH 3/3] regulator: lp873x: Add support for lp873x PMIC regulators

The regulators set consists of 2 BUCKs and 2 LDOs. The output voltages are configurable and are meant to supply power to the main processor and other components. The ramp delay is configurable for both BUCKs. Signed-off-by: Keerthy --- drivers/regulator/Kconfig|

[PATCH] mfd: lp873x: Add lp873x PMIC support

The LP873X chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Regulators. - Configurable General Purpose Output Signals(GPO). PMIC interacts with the main processor through i2c. PMIC has couple of

[PATCH 1/3] Documentation: mfd/regulator: LP873X: Add information for the mfd and regulator drivers

Add information for the mfd and regulator drivers. Signed-off-by: Keerthy --- Documentation/devicetree/bindings/mfd/lp873x.txt | 56 + .../devicetree/bindings/regulator/lp873x.txt | 98 ++ 2 files changed, 154 insertions(+) create mode 100644

[PATCH 3/3] regulator: lp873x: Add support for lp873x PMIC regulators

The regulators set consists of 2 BUCKs and 2 LDOs. The output voltages are configurable and are meant to supply power to the main processor and other components. The ramp delay is configurable for both BUCKs. Signed-off-by: Keerthy --- drivers/regulator/Kconfig| 9 ++

[PATCH RESEND v3 0/2] drm: introduce bus_flags for pixel clock polarity

This resend is just rebased on drm-next as of today (+Daniels Ack). Dropped the first patch in version 3 since that is already applied in v4.6. Also moved all generic changes (including the changes in panel-simple) to the first, generic patch. Instead of using struct drm_display_mode to convey

[PATCH RESEND v3 0/2] drm: introduce bus_flags for pixel clock polarity

This resend is just rebased on drm-next as of today (+Daniels Ack). Dropped the first patch in version 3 since that is already applied in v4.6. Also moved all generic changes (including the changes in panel-simple) to the first, generic patch. Instead of using struct drm_display_mode to convey

[PATCH RESEND v3 2/2] drm/fsl-dcu: use bus_flags for pixel clock polarity

The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits,

[PATCH RESEND v3 1/2] drm: introduce bus_flags in drm_display_info

Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity. Suggested-by: Thierry Reding Acked-by: Philipp Zabel Acked-by:

[PATCH RESEND v3 2/2] drm/fsl-dcu: use bus_flags for pixel clock polarity

The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits,

[PATCH RESEND v3 1/2] drm: introduce bus_flags in drm_display_info

Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity. Suggested-by: Thierry Reding Acked-by: Philipp Zabel Acked-by: Manfred Schlaegl Acked-by: Daniel Vetter

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

2016-05-03 23:10 GMT+08:00 Rafael J. Wysocki : > On Tuesday, May 03, 2016 03:53:12 PM Rafael J. Wysocki wrote: >> On Tuesday, May 03, 2016 03:22:24 PM Rafael J. Wysocki wrote: >> > On Tue, May 3, 2016 at 2:58 PM, Rafael J. Wysocki >> > wrote: >> > > On Tue,

Re: [lkp] [sched/fair] 41e0d37f7a: divide error: 0000 [#1] SMP

2016-05-03 23:10 GMT+08:00 Rafael J. Wysocki : > On Tuesday, May 03, 2016 03:53:12 PM Rafael J. Wysocki wrote: >> On Tuesday, May 03, 2016 03:22:24 PM Rafael J. Wysocki wrote: >> > On Tue, May 3, 2016 at 2:58 PM, Rafael J. Wysocki >> > wrote: >> > > On Tue, May 3, 2016 at 2:54 PM, Rafael J.

[PATCH v2 13/13] ACPICA: Update version to 20160422

From: Bob Moore ACPICA commit a2327ba410e19c2aabaf34b711dbadf7d1dcf346 Version 20160422. Link: https://github.com/acpica/acpica/commit/a2327ba4 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng --- include/acpi/acpixf.h |

[PATCH v2 13/13] ACPICA: Update version to 20160422

From: Bob Moore ACPICA commit a2327ba410e19c2aabaf34b711dbadf7d1dcf346 Version 20160422. Link: https://github.com/acpica/acpica/commit/a2327ba4 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng --- include/acpi/acpixf.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH v2 12/13] ACPICA: Move all ASCII utilities to a common file

From: Bob Moore ACPICA commit ba60e4500053010bf775d58f6f61febbdb94d817 New file is utascii.c Link: https://github.com/acpica/acpica/commit/ba60e450 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng ---

[PATCH v2 12/13] ACPICA: Move all ASCII utilities to a common file

From: Bob Moore ACPICA commit ba60e4500053010bf775d58f6f61febbdb94d817 New file is utascii.c Link: https://github.com/acpica/acpica/commit/ba60e450 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng --- drivers/acpi/acpica/Makefile |1 + drivers/acpi/acpica/actables.h

[PATCH v2 03/13] ACPICA: ACPI 6.1: Support for new PCCT subtable

From: Bob Moore ACPICA commit de3ea7c322b9b6bdb09aa90c2e1d420cd4dce47c Additional subspace structure was added. Link: https://github.com/acpica/acpica/commit/de3ea7c3 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng ---

[PATCH v2 11/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()

ACPICA commit 48eea5e7993ccb7189bd63cd726e02adafee6057 This patch adds access_width/bit_offset support in acpi_hw_write(). Lv Zheng. Link: https://github.com/acpica/acpica/commit/48eea5e7 Link: https://bugs.acpica.org/show_bug.cgi?id=1240 Signed-off-by: Lv Zheng

[PATCH v2 03/13] ACPICA: ACPI 6.1: Support for new PCCT subtable

From: Bob Moore ACPICA commit de3ea7c322b9b6bdb09aa90c2e1d420cd4dce47c Additional subspace structure was added. Link: https://github.com/acpica/acpica/commit/de3ea7c3 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng --- include/acpi/actbl3.h | 23 ++- 1 file changed,

[PATCH v2 11/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()

ACPICA commit 48eea5e7993ccb7189bd63cd726e02adafee6057 This patch adds access_width/bit_offset support in acpi_hw_write(). Lv Zheng. Link: https://github.com/acpica/acpica/commit/48eea5e7 Link: https://bugs.acpica.org/show_bug.cgi?id=1240 Signed-off-by: Lv Zheng Signed-off-by: Bob Moore ---

[PATCH v2 05/13] ACPICA: ACPI 6.0, tools/iasl: Add support for new resource descriptors

From: Bob Moore ACPICA commit 5a0555ece4ba9917e5842b21d88469ae06b4e815 Adds full support for: i2c_serial_bus_v2 spi_serial_bus_v2 uart_serial_bus_v2 Compiler, Disassembler, Resource Manager, acpi_help. Link: https://github.com/acpica/acpica/commit/5a0555ec

[PATCH v2 10/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read()

ACPICA commit 96ece052d4d073aae4f935f0ff0746646aea1174 ACPICA commit 3d8583a054e410f2ea4d73b48986facad9cfc0d4 This patch adds access_width/bit_offset support in acpi_hw_read(). This also enables GAS definition where bit_width is not a power of two. Lv Zheng. Link:

[PATCH v2 04/13] ACPICA: ACPI 6.0: Update _BIX support for new package element

From: Bob Moore ACPICA commit 3451e6d49d37919c13ec2c0019a31534b0dfc0c0 One integer was added at the end of the _BIX method, and the version number was incremented. Link: https://github.com/acpica/acpica/commit/3451e6d4 Signed-off-by: Bob Moore

[PATCH v2 08/13] ACPICA: Hardware: Add optimized access bit width support

ACPICA commit c49a751b4dae7baec1790748a2b4b6e8ab599f51 For Access Size = 0, it actually can use user expected access bit width. This patch implements this. Besides of the ACPICA upstream commit, this patch also includes a fix fixing the issue reported by the FreeBSD community. The old register

[PATCH v2 05/13] ACPICA: ACPI 6.0, tools/iasl: Add support for new resource descriptors

From: Bob Moore ACPICA commit 5a0555ece4ba9917e5842b21d88469ae06b4e815 Adds full support for: i2c_serial_bus_v2 spi_serial_bus_v2 uart_serial_bus_v2 Compiler, Disassembler, Resource Manager, acpi_help. Link: https://github.com/acpica/acpica/commit/5a0555ec Signed-off-by: Bob Moore

[PATCH v2 10/13] ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read()

ACPICA commit 96ece052d4d073aae4f935f0ff0746646aea1174 ACPICA commit 3d8583a054e410f2ea4d73b48986facad9cfc0d4 This patch adds access_width/bit_offset support in acpi_hw_read(). This also enables GAS definition where bit_width is not a power of two. Lv Zheng. Link:

[PATCH v2 04/13] ACPICA: ACPI 6.0: Update _BIX support for new package element

From: Bob Moore ACPICA commit 3451e6d49d37919c13ec2c0019a31534b0dfc0c0 One integer was added at the end of the _BIX method, and the version number was incremented. Link: https://github.com/acpica/acpica/commit/3451e6d4 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng ---

[PATCH v2 08/13] ACPICA: Hardware: Add optimized access bit width support

ACPICA commit c49a751b4dae7baec1790748a2b4b6e8ab599f51 For Access Size = 0, it actually can use user expected access bit width. This patch implements this. Besides of the ACPICA upstream commit, this patch also includes a fix fixing the issue reported by the FreeBSD community. The old register

[PATCH v2 07/13] ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro

This patch introduces ACPI_IS_ALIGNED() macro. Lv Zheng. Signed-off-by: Lv Zheng --- drivers/acpi/acpica/acmacros.h |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h index 73f6653..ecbaaba

[PATCH v2 09/13] ACPICA: Executer: Introduce a set of macros to handle bit width mask generation

ACPICA commit c23034a3a09d5ed79f1827d51f43cfbccf68ab64 A regression was reported to the shift offset >= width of type. This patch fixes this issue. BZ 1270. This is a part of the fix because the order of the patches are modified for Linux upstream, containing the cleanups for the old code. Lv

[PATCH v2 06/13] ACPICA: Renamed some #defined flag constants for clarity

From: Bob Moore ACPICA commit 438905b205e64e742f9670a0970419c426264831 Expanded a couple of cryptic names. Link: https://github.com/acpica/acpica/commit/438905b2 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng ---

[PATCH v2 07/13] ACPICA: Utilities: Add ACPI_IS_ALIGNED() macro

This patch introduces ACPI_IS_ALIGNED() macro. Lv Zheng. Signed-off-by: Lv Zheng --- drivers/acpi/acpica/acmacros.h |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h index 73f6653..ecbaaba 100644 ---

[PATCH v2 09/13] ACPICA: Executer: Introduce a set of macros to handle bit width mask generation

ACPICA commit c23034a3a09d5ed79f1827d51f43cfbccf68ab64 A regression was reported to the shift offset >= width of type. This patch fixes this issue. BZ 1270. This is a part of the fix because the order of the patches are modified for Linux upstream, containing the cleanups for the old code. Lv

[PATCH v2 06/13] ACPICA: Renamed some #defined flag constants for clarity

From: Bob Moore ACPICA commit 438905b205e64e742f9670a0970419c426264831 Expanded a couple of cryptic names. Link: https://github.com/acpica/acpica/commit/438905b2 Signed-off-by: Bob Moore Signed-off-by: Lv Zheng --- drivers/acpi/acpica/aclocal.h | 30 +++---

[PATCH v2 01/13] ACPICA: Divergence: remove unwanted spaces for typedef

ACPICA commit b2294cae776f5a66a7697414b21949d307e6856f This patch removes unwanted spaces for typedef. This solution doesn't cover function types. Note that the linuxize result of this commit is very giant and should have many conflicts against the current Linux upstream. Thus it is required to

[PATCH v2 01/13] ACPICA: Divergence: remove unwanted spaces for typedef

ACPICA commit b2294cae776f5a66a7697414b21949d307e6856f This patch removes unwanted spaces for typedef. This solution doesn't cover function types. Note that the linuxize result of this commit is very giant and should have many conflicts against the current Linux upstream. Thus it is required to

[PATCH v2 00/13] ACPICA: 20160422 Release

The 20160422 ACPICA kernel-resident subsystem updates are linuxized based on the linux-pm/linux-next branch. NOTE: 1. Indentation improvement The [PATCH 01] is a result of an ACPICA release process fix. It requires much of human intervention, and many linuxized patches in the developers' local

[PATCH v2 02/13] ACPICA: Refactor evaluate_object to reduce nesting

From: Bob Moore ACPICA commit 599e9159f53565e4a3f3e67f6a03f81fcb10a4cf Original patch from hanjun@linaro.org ACPICA BZ 1072. Link: https://github.com/acpica/acpica/commit/599e9159 Link: https://bugs.acpica.org/show_bug.cgi?id=1072 Original-by: Hanjun Guo

[PATCH v2 00/13] ACPICA: 20160422 Release

The 20160422 ACPICA kernel-resident subsystem updates are linuxized based on the linux-pm/linux-next branch. NOTE: 1. Indentation improvement The [PATCH 01] is a result of an ACPICA release process fix. It requires much of human intervention, and many linuxized patches in the developers' local

[PATCH v2 02/13] ACPICA: Refactor evaluate_object to reduce nesting

From: Bob Moore ACPICA commit 599e9159f53565e4a3f3e67f6a03f81fcb10a4cf Original patch from hanjun@linaro.org ACPICA BZ 1072. Link: https://github.com/acpica/acpica/commit/599e9159 Link: https://bugs.acpica.org/show_bug.cgi?id=1072 Original-by: Hanjun Guo Signed-off-by: Bob Moore

Re: [PATCH kernel v4 10/11] powerpc/powernv/npu: Rework TCE Kill handling

On 05/03/2016 05:37 PM, Alistair Popple wrote: On Fri, 29 Apr 2016 18:55:23 Alexey Kardashevskiy wrote: The pnv_ioda_pe struct keeps an array of peers. At the moment it is only used to link GPU and NPU for 2 purposes: 1. Access NPU quickly when configuring DMA for GPU - this was addressed in

Re: [PATCH kernel v4 10/11] powerpc/powernv/npu: Rework TCE Kill handling

On 05/03/2016 05:37 PM, Alistair Popple wrote: On Fri, 29 Apr 2016 18:55:23 Alexey Kardashevskiy wrote: The pnv_ioda_pe struct keeps an array of peers. At the moment it is only used to link GPU and NPU for 2 purposes: 1. Access NPU quickly when configuring DMA for GPU - this was addressed in

linux-next: manual merge of the borntraeger tree with the kvms390 tree

Hi Christian, Today's linux-next merge of the borntraeger tree got a conflict in: arch/s390/kvm/kvm-s390.c between commit: be7c9d7ba9e4 ("KVM: s390: Populate mask of non-hypervisor managed facility bits") from the kvms390 tree and commit: 5c14ad932491 ("KVM: halt_polling: provide a

linux-next: manual merge of the borntraeger tree with the kvms390 tree

Hi Christian, Today's linux-next merge of the borntraeger tree got a conflict in: arch/s390/kvm/kvm-s390.c between commit: be7c9d7ba9e4 ("KVM: s390: Populate mask of non-hypervisor managed facility bits") from the kvms390 tree and commit: 5c14ad932491 ("KVM: halt_polling: provide a

Re: [PATCH] ext4 crypto: migrate into vfs's crypto engine

On Wed, May 04, 2016 at 11:20:22PM -0400, Theodore Ts'o wrote: > On Mon, Apr 25, 2016 at 05:15:36PM -0700, Jaegeuk Kim wrote: > > This patch removes the most parts of internal crypto codes. > > And then, it modifies and adds some ext4-specific crypt codes to use the > > generic > > facility. > >

Re: [PATCH] ext4 crypto: migrate into vfs's crypto engine

On Wed, May 04, 2016 at 11:20:22PM -0400, Theodore Ts'o wrote: > On Mon, Apr 25, 2016 at 05:15:36PM -0700, Jaegeuk Kim wrote: > > This patch removes the most parts of internal crypto codes. > > And then, it modifies and adds some ext4-specific crypt codes to use the > > generic > > facility. > >

Re: better patch for linux/bitops.h

On Wed, May 4, 2016 at 11:50 PM, Theodore Ts'o wrote: > ... > But instead of arguing over what works and doesn't, let's just create > the the test set and just try it on a wide range of compilers and > architectures, hmmm? What are the requirements? Here's a short list: * No

Re: better patch for linux/bitops.h

On Wed, May 4, 2016 at 11:50 PM, Theodore Ts'o wrote: > ... > But instead of arguing over what works and doesn't, let's just create > the the test set and just try it on a wide range of compilers and > architectures, hmmm? What are the requirements? Here's a short list: * No undefined

Re: better patch for linux/bitops.h

Instead of arguing over who's "sane" or "insane", can we come up with a agreed upon set of tests, and a set of compiler and compiler versions for which these tests must achieve at least *working* code? Bonus points if they achieve optimal code, but what's important is that for a wide range of GCC

Re: better patch for linux/bitops.h

Instead of arguing over who's "sane" or "insane", can we come up with a agreed upon set of tests, and a set of compiler and compiler versions for which these tests must achieve at least *working* code? Bonus points if they achieve optimal code, but what's important is that for a wide range of GCC

Re: better patch for linux/bitops.h

>>> So you are actually saying outright that we should sacrifice *actual* >>portability in favor of *theoretical* portability? What kind of >>twilight zone did we just step into?! >> >>I'm not sure what you mean. It will be well defined on all platforms. >>Clang may not recognize the pattern,

Re: [RFC v2 PATCH 0/8] VFS:userns: support portable root filesystems

On May 4, 2016 7:25 PM, "Dave Chinner" wrote: > > On Wed, May 04, 2016 at 06:44:14PM -0700, Andy Lutomirski wrote: > > On Wed, May 4, 2016 at 5:23 PM, Dave Chinner wrote: > > > On Wed, May 04, 2016 at 04:26:46PM +0200, Djalal Harouni wrote: > > >> This

Re: better patch for linux/bitops.h

>>> So you are actually saying outright that we should sacrifice *actual* >>portability in favor of *theoretical* portability? What kind of >>twilight zone did we just step into?! >> >>I'm not sure what you mean. It will be well defined on all platforms. >>Clang may not recognize the pattern,

Re: [RFC v2 PATCH 0/8] VFS:userns: support portable root filesystems

On May 4, 2016 7:25 PM, "Dave Chinner" wrote: > > On Wed, May 04, 2016 at 06:44:14PM -0700, Andy Lutomirski wrote: > > On Wed, May 4, 2016 at 5:23 PM, Dave Chinner wrote: > > > On Wed, May 04, 2016 at 04:26:46PM +0200, Djalal Harouni wrote: > > >> This is version 2 of the VFS:userns support

Re: [PATCH 3/3] x86-32: Remove asmlinkage_protect

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst wrote: > Now that syscalls are called from C code, which copies the args to new stack > slots instead of overlaying pt_regs, asmlinkage_protect is no longer needed. Acked-by: Andy Lutomirski asmlinkage_protect was

Re: [PATCH 3/3] x86-32: Remove asmlinkage_protect

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst wrote: > Now that syscalls are called from C code, which copies the args to new stack > slots instead of overlaying pt_regs, asmlinkage_protect is no longer needed. Acked-by: Andy Lutomirski asmlinkage_protect was pretty gross... --Andy

Re: [PATCH 2/3] x86-32: Remove GET_THREAD_INFO from entry code

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst wrote: > The entry code used to cache the thread_info pointer in the EBP register, but > all the code that used it has been moved to C. Remove the unused code to > get the pointer. Acked-by: Andy Lutomirski

[PATCH] ION: Sys_heap: Makes ion buffer always alloc from page pool

Makes the ion buffer always alloced from page pool, no matter it's cached or not. In this way, it can improve the efficiency of it. Currently, there is no difference from cached or non-cached buffer for the page pool. Signed-off-by: Chen Feng ---

Re: [PATCH 2/3] x86-32: Remove GET_THREAD_INFO from entry code

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst wrote: > The entry code used to cache the thread_info pointer in the EBP register, but > all the code that used it has been moved to C. Remove the unused code to > get the pointer. Acked-by: Andy Lutomirski

[PATCH] ION: Sys_heap: Makes ion buffer always alloc from page pool

Makes the ion buffer always alloced from page pool, no matter it's cached or not. In this way, it can improve the efficiency of it. Currently, there is no difference from cached or non-cached buffer for the page pool. Signed-off-by: Chen Feng --- drivers/staging/android/ion/ion_system_heap.c |

Re: [PATCH 1/3] x86: Don't save/restore EFLAGS on task switch

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst wrote: > Now that NT is filtered by the SYSENTER entry code, it is safe to skip saving > and > restoring flags on task switch. Also remove a leftover reset of flags on > 64-bit > fork. Acked-by: Andy Lutomirski

Re: [PATCH 1/3] x86: Don't save/restore EFLAGS on task switch

On Wed, May 4, 2016 at 7:44 PM, Brian Gerst wrote: > Now that NT is filtered by the SYSENTER entry code, it is safe to skip saving > and > restoring flags on task switch. Also remove a leftover reset of flags on > 64-bit > fork. Acked-by: Andy Lutomirski

Re: [PATCH v3 01/11] of: Add bindings of hw throttle for Tegra soctherm

On 2016年05月04日 21:35, Rob Herring wrote: > On Tue, May 03, 2016 at 06:13:20PM +0800, Wei Ni wrote: >> Add HW throttle configuration sub-node for soctherm, which >> is used to describe the throttle event, and worked as a >> cooling device. The "hot" type trip in thermal zone can >> be bound to

Re: [PATCH v3 01/11] of: Add bindings of hw throttle for Tegra soctherm

On 2016年05月04日 21:35, Rob Herring wrote: > On Tue, May 03, 2016 at 06:13:20PM +0800, Wei Ni wrote: >> Add HW throttle configuration sub-node for soctherm, which >> is used to describe the throttle event, and worked as a >> cooling device. The "hot" type trip in thermal zone can >> be bound to

[v10, 7/7] mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0

The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version. Acturally the right version numbers should be VVN=0x13 and SVN = 0x1. This patch adds the GUTS driver support for eSDHC driver to get SVR(System version register). And fix host version to avoid that incorrect version

[v10, 7/7] mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0

The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version. Acturally the right version numbers should be VVN=0x13 and SVN = 0x1. This patch adds the GUTS driver support for eSDHC driver to get SVR(System version register). And fix host version to avoid that incorrect version

[v10, 4/7] dt: move guts devicetree doc out of powerpc directory

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/ since it's used by not only PowerPC but also ARM. And add a specification for 'little-endian' property. Signed-off-by: Yangbo Lu Acked-by: Scott Wood Acked-by: Rob Herring

[v10, 4/7] dt: move guts devicetree doc out of powerpc directory

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/ since it's used by not only PowerPC but also ARM. And add a specification for 'little-endian' property. Signed-off-by: Yangbo Lu Acked-by: Scott Wood Acked-by: Rob Herring --- Changes for v4: - Added this patch

[v10, 6/7] MAINTAINERS: add entry for Freescale SoC drivers

Add maintainer entry for Freescale SoC drivers including the QE library and the GUTS driver now. Also add maintainer for QE library. Signed-off-by: Yangbo Lu Acked-by: Scott Wood Acked-by: Qiang Zhao --- Changes for v8: - Added

[v10, 1/7] Documentation: DT: update Freescale DCFG compatible

Update Freescale DCFG compatible with 'fsl,-dcfg' instead of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a, ls1043a, and ls2080a. Signed-off-by: Yangbo Lu --- Changes for v8: - Added this patch Changes for v9: - Added a list for the possible

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