[PATCH 10/27] [AARCH64] Detect ILP32 in configure scripts.

From: Andrew Pinski This adds detecting of ILP32 to the configure scripts. Adding to preconfigure detection of ilp32 in preconfigure and then writing out the default-abi in configure. * sysdeps/aarch64/preconfigure: Detect ILP32 and set aarch64_config_abi to ilp32 for ilp32

[PATCH 05/27] [AARCH64] Use PTR_REG in crti.S.

From: Andrew Pinski call_weak_fn loads from a pointer, so use PTR_REG so the load is 32bits for ILP32. * sysdeps/aarch64/crti.S: Include sysdep.h (call_weak_fn): Use PTR_REG when loading from PREINIT_FUNCTION. AARCH64: Make RTLD_START paramatizable Make RTLD_START

[PATCH 11/27] [AARCH64] Syscalls for ILP32 are passed always via 64bit values.

From: Andrew Pinski This patch adds support for ILP32 syscalls, sign and zero extending where needed. Unlike LP64, pointers are 32bit and need to be zero extended rather than the standard sign extend that the code would do. We take advatage of ssize_t being long rather than

[PATCH 11/27] [AARCH64] Syscalls for ILP32 are passed always via 64bit values.

From: Andrew Pinski This patch adds support for ILP32 syscalls, sign and zero extending where needed. Unlike LP64, pointers are 32bit and need to be zero extended rather than the standard sign extend that the code would do. We take advatage of ssize_t being long rather than int for ILP32, to

[PATCH 10/27] [AARCH64] Detect ILP32 in configure scripts.

From: Andrew Pinski This adds detecting of ILP32 to the configure scripts. Adding to preconfigure detection of ilp32 in preconfigure and then writing out the default-abi in configure. * sysdeps/aarch64/preconfigure: Detect ILP32 and set aarch64_config_abi to ilp32 for ilp32 and lp64 for lp64.

[PATCH 05/27] [AARCH64] Use PTR_REG in crti.S.

From: Andrew Pinski call_weak_fn loads from a pointer, so use PTR_REG so the load is 32bits for ILP32. * sysdeps/aarch64/crti.S: Include sysdep.h (call_weak_fn): Use PTR_REG when loading from PREINIT_FUNCTION. AARCH64: Make RTLD_START paramatizable Make RTLD_START paramatizable for ILP32 and

[PATCH 08/27] [AARCH64] Use PTR_* in start.S

From: Andrew Pinski To support ILP32 without much sources changes, this changes sysdeps/aarch64/start.S to use the PTR_* macros which was defined earlier. * sysdeps/aarch64/start.S: Include sysdep.h (_start): Use PTR_REG, PTR_SIZE macros. Signed-off-by: Yury Norov

[PATCH 08/27] [AARCH64] Use PTR_* in start.S

From: Andrew Pinski To support ILP32 without much sources changes, this changes sysdeps/aarch64/start.S to use the PTR_* macros which was defined earlier. * sysdeps/aarch64/start.S: Include sysdep.h (_start): Use PTR_REG, PTR_SIZE macros. Signed-off-by: Yury Norov --- sysdeps/aarch64/start.S

RE: [PATCH v3 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

> -Original Message- > From: Linus Walleij [mailto:linus.wall...@linaro.org] > Sent: Tuesday, June 14, 2016 3:09 PM > To: Tan, Jui Nee > Cc: Mika Westerberg ; Heikki Krogerus > ; Andy Shevchenko >

RE: [PATCH v3 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

> -Original Message- > From: Linus Walleij [mailto:linus.wall...@linaro.org] > Sent: Tuesday, June 14, 2016 3:09 PM > To: Tan, Jui Nee > Cc: Mika Westerberg ; Heikki Krogerus > ; Andy Shevchenko > ; Thomas Gleixner > ; Ingo Molnar ; H. Peter Anvin > ; x...@kernel.org;

RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Monday, June 13, 2016 11:59 PM > To: Andy Shevchenko > Cc: Tan, Jui Nee ; heikki.kroge...@linux.intel.com; > t...@linutronix.de;

RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Monday, June 13, 2016 11:59 PM > To: Andy Shevchenko > Cc: Tan, Jui Nee ; heikki.kroge...@linux.intel.com; > t...@linutronix.de; mi...@redhat.com; h...@zytor.com; x...@kernel.org; >

[PATCH 5/5] clk: rockchip: rk3228: export related MAC clocks

This patch exports related MAC clocks for dts reference. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 22 +++--- include/dt-bindings/clock/rk3228-cru.h | 11 +++ 2 files changed, 22 insertions(+), 11 deletions(-)

RE: [PATCH v3 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Thursday, June 9, 2016 11:56 PM > To: Tan, Jui Nee > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com; t...@linutronix.de; >

[PATCH 5/5] clk: rockchip: rk3228: export related MAC clocks

This patch exports related MAC clocks for dts reference. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 22 +++--- include/dt-bindings/clock/rk3228-cru.h | 11 +++ 2 files changed, 22 insertions(+), 11 deletions(-) diff --git

RE: [PATCH v3 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Thursday, June 9, 2016 11:56 PM > To: Tan, Jui Nee > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com; t...@linutronix.de; > mi...@redhat.com;

[PATCH 4/5] clk: rockchip: rk3228: rename sclk_macphy_50m to sclk_mac_extclk

The sclk_macphy_50m is confusing, the sclk_mac_extclk describes a external clock clearly. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c

[PATCH 4/5] clk: rockchip: rk3228: rename sclk_macphy_50m to sclk_mac_extclk

The sclk_macphy_50m is confusing, the sclk_mac_extclk describes a external clock clearly. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c

[PATCH 3/5] clk: rockchip: rk3228: export related i2s/spdif clocks

This patch exports related i2s/spdif clocks for dts reference. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c |8 include/dt-bindings/clock/rk3228-cru.h |4 2 files changed, 8 insertions(+), 4 deletions(-) diff --git

linux-next: manual merge of the akpm-current tree with the arm-soc tree

Hi Andrew, Today's linux-next merge of the akpm-current tree got a conflict in: arch/arm/configs/bcm_defconfig between commit: 41463c3e6eae ("ARM: Remove bcm_defconfig") from the arm-soc tree and commit: c41079f16bf2 ("lib, switch CONFIG_PRINTK_TIME to int") from the akpm-current

[PATCH 3/5] clk: rockchip: rk3228: export related i2s/spdif clocks

This patch exports related i2s/spdif clocks for dts reference. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c |8 include/dt-bindings/clock/rk3228-cru.h |4 2 files changed, 8 insertions(+), 4 deletions(-) diff --git

linux-next: manual merge of the akpm-current tree with the arm-soc tree

Hi Andrew, Today's linux-next merge of the akpm-current tree got a conflict in: arch/arm/configs/bcm_defconfig between commit: 41463c3e6eae ("ARM: Remove bcm_defconfig") from the arm-soc tree and commit: c41079f16bf2 ("lib, switch CONFIG_PRINTK_TIME to int") from the akpm-current

[PATCH 1/5] clk: rockchip: rk3228: fix incorrect clock node names

Due to copy and paste carelessly, RK3288_CLKxxx nodes are incorrect, we need to fix them. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git

[PATCH 1/5] clk: rockchip: rk3228: fix incorrect clock node names

Due to copy and paste carelessly, RK3288_CLKxxx nodes are incorrect, we need to fix them. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c

[PATCH RFC 1/2] rtc/hpet: Factorize hpet_rtc_timer_init()

This patch factorize hpet_rtc_timer_init(), so that counter can be initialized before irq is registered. Signed-off-by: Pratyush Anand --- arch/x86/include/asm/hpet.h | 2 ++ arch/x86/kernel/hpet.c | 41 +++-- 2 files changed, 37

[PATCH RFC 2/2] rtc/rtc-cmos: Initialize software counters before irq is registered

We have observed on few machines with rtc-cmos device that hpet_rtc_interrupt() is called before cmos_do_probe() could call hpet_rtc_timer_init(). It has not been observed during normal boot/reboot of machines. It *sometime* happens when system is booted with kdump secondary kernel. So, neither

[PATCH RFC 1/2] rtc/hpet: Factorize hpet_rtc_timer_init()

This patch factorize hpet_rtc_timer_init(), so that counter can be initialized before irq is registered. Signed-off-by: Pratyush Anand --- arch/x86/include/asm/hpet.h | 2 ++ arch/x86/kernel/hpet.c | 41 +++-- 2 files changed, 37 insertions(+), 6

[PATCH RFC 2/2] rtc/rtc-cmos: Initialize software counters before irq is registered

We have observed on few machines with rtc-cmos device that hpet_rtc_interrupt() is called before cmos_do_probe() could call hpet_rtc_timer_init(). It has not been observed during normal boot/reboot of machines. It *sometime* happens when system is booted with kdump secondary kernel. So, neither

[PATCH 2/5] clk: rockchip: rk3228: include downstream muxes into fractional dividers

During the initial conversion to the newly introduced combined fractional dividers+muxes the rk3228 clocks were left out, so convert them now. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 79 - 1 file changed,

[PATCH 2/5] clk: rockchip: rk3228: include downstream muxes into fractional dividers

During the initial conversion to the newly introduced combined fractional dividers+muxes the rk3228 clocks were left out, so convert them now. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 79 - 1 file changed, 51 insertions(+), 28

[PATCH RFC 0/2] rtc-cmos: Workaround unwanted interrupt generation

We have observed on few machines with rtc-cmos device that hpet_rtc_interrupt() is called before cmos_do_probe() could call hpet_rtc_timer_init(). It has not been observed during normal boot/reboot of machines. It *sometime* happens when system is booted with kdump secondary kernel. So, neither

[PATCH RFC 0/2] rtc-cmos: Workaround unwanted interrupt generation

We have observed on few machines with rtc-cmos device that hpet_rtc_interrupt() is called before cmos_do_probe() could call hpet_rtc_timer_init(). It has not been observed during normal boot/reboot of machines. It *sometime* happens when system is booted with kdump secondary kernel. So, neither

[PATCH 0/5] Fix and improve clock controller for the RK322x SoCs

Hi, These patchset fix some clocks bugs, and improve clock configuration for i2s/spdif/MAC on RK322x SoCs. Thanks. Xing Zheng (5): clk: rockchip: rk3228: fix incorrect clock node names clk: rockchip: rk3228: include downstream muxes into fractional dividers clk: rockchip: rk3228:

[PATCH 0/5] Fix and improve clock controller for the RK322x SoCs

Hi, These patchset fix some clocks bugs, and improve clock configuration for i2s/spdif/MAC on RK322x SoCs. Thanks. Xing Zheng (5): clk: rockchip: rk3228: fix incorrect clock node names clk: rockchip: rk3228: include downstream muxes into fractional dividers clk: rockchip: rk3228:

[PATCH v20 14/20] perf, tools: Add support for event list topics

From: Andi Kleen Add support to group the output of perf list by the Topic field in the JSON file. Example output: % perf list ... Cache: l1d.replacement [L1D data line replacements] l1d_pend_miss.pending [L1D miss oustandings duration in cycles]

[PATCH v20 14/20] perf, tools: Add support for event list topics

From: Andi Kleen Add support to group the output of perf list by the Topic field in the JSON file. Example output: % perf list ... Cache: l1d.replacement [L1D data line replacements] l1d_pend_miss.pending [L1D miss oustandings duration in cycles]

Re: [RFC PATCH 2/2] xfs: map KM_MAYFAIL to __GFP_RETRY_HARD

On Mon, Jun 20, 2016 at 10:08:56AM +0200, Michal Hocko wrote: > On Fri 17-06-16 17:39:31, Johannes Weiner wrote: > > On Fri, Jun 17, 2016 at 10:30:06PM +0200, Vlastimil Babka wrote: > > > On 17.6.2016 20:22, Johannes Weiner wrote: > [...] > > > > - it allows !costly orders to fail > > > > > > > >

Re: [RFC PATCH 2/2] xfs: map KM_MAYFAIL to __GFP_RETRY_HARD

On Mon, Jun 20, 2016 at 10:08:56AM +0200, Michal Hocko wrote: > On Fri 17-06-16 17:39:31, Johannes Weiner wrote: > > On Fri, Jun 17, 2016 at 10:30:06PM +0200, Vlastimil Babka wrote: > > > On 17.6.2016 20:22, Johannes Weiner wrote: > [...] > > > > - it allows !costly orders to fail > > > > > > > >

Re: [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set\\

On 2016/6/21 9:43, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:48PM +0800, Yongji Xie wrote: The resource_alignment will releases memory resources allocated by firmware so that kernel can reassign new resources later on. But this will cause the problem that no resources can be allocated

Re: [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set\\

On 2016/6/21 9:43, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:48PM +0800, Yongji Xie wrote: The resource_alignment will releases memory resources allocated by firmware so that kernel can reassign new resources later on. But this will cause the problem that no resources can be allocated

Re: [PATCH] cgroup: Add pids controller event when fork fails because of pid limit

On Mon, Jun 20, 2016 at 08:09:22PM -0700, Kenny Yu wrote: > Summary: > This patch adds more visibility into the pids controller when the controller > rejects a fork request. Whenever fork fails because the limit on the number of > pids in the cgroup is reached, the controller will log this and

Re: [PATCH] cgroup: Add pids controller event when fork fails because of pid limit

On Mon, Jun 20, 2016 at 08:09:22PM -0700, Kenny Yu wrote: > Summary: > This patch adds more visibility into the pids controller when the controller > rejects a fork request. Whenever fork fails because the limit on the number of > pids in the cgroup is reached, the controller will log this and

Re: [PATCH 1/2] ARM: multi_v7_defconfig: Enable AHCI_IMX

Hi Toumas, We can apply this directly but I prefer to get an acked-by from the platform maintainer that it affects. I didn't even see them cc:d here so would you mind resubmit with them on the line? Alternatively send it to them and they can apply and feed up to us with other defconfig changes.

Re: [PATCH 1/2] ARM: multi_v7_defconfig: Enable AHCI_IMX

Hi Toumas, We can apply this directly but I prefer to get an acked-by from the platform maintainer that it affects. I didn't even see them cc:d here so would you mind resubmit with them on the line? Alternatively send it to them and they can apply and feed up to us with other defconfig changes.

Re: [PATCH v10 08/22] IB/hns: Add icm support

On 2016/6/20 21:04, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at 05:48:15PM +0800, Wei Hu (Xavier) wrote: On 2016/6/20 17:27, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at 03:49:24PM +0800, Wei Hu (Xavier) wrote: On 2016/6/20 14:06, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at

Re: [PATCH v10 08/22] IB/hns: Add icm support

On 2016/6/20 21:04, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at 05:48:15PM +0800, Wei Hu (Xavier) wrote: On 2016/6/20 17:27, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at 03:49:24PM +0800, Wei Hu (Xavier) wrote: On 2016/6/20 14:06, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at

[PATCH v4 4/5] ACPI 2.0 / AML: Enable correct ACPI subsystem initialization order for new table loading mode

This patch enables the following initialization order for the new table loading mode (which is enabled by setting acpi_gbl_parse_table_as_term_list to TRUE): 1. Install default region handlers (SystemMemory, SystemIo, PciConfig, EmbeddedControl via ECDT) without evaluating _REG; 2. Load

[PATCH v4 4/8] iommu/rockchip: Use DMA API to manage coherency

From: Shunqian Zheng Use DMA API instead of architecture internal functions like __cpuc_flush_dcache_area() etc. The biggest difficulty here is that dma_map and _sync calls require some struct device, while there is no real 1:1 relation between an IOMMU domain and some

[PATCH v4 1/5] ACPICA: Namespace: Fix a regression that MLC support triggers dead lock in dynamic table loading

The new MLC approach invokes MLC per-table basis. But the dynamic loading support of this is incorrect because of the lock order: acpi_ns_evaluate acpi_ex_enter_intperter acpi_ns_load_table (triggered by Load opcode) acpi_ns_exec_module_code_list acpi_ex_enter_intperter

[PATCH v4 3/5] ACPICA: ACPI 2.0, Interpreter: Fix MLC issues by switching to new TermList grammar for table loading

The MLC (Module Level Code) is an ACPICA terminology describing the AML code out of any control method, its support is the main contention of the interpreter behavior during the table loading. The original implementation of MLC in ACPICA had several issues: 1. Out of any control method, besides

[PATCH v4 4/5] ACPI 2.0 / AML: Enable correct ACPI subsystem initialization order for new table loading mode

This patch enables the following initialization order for the new table loading mode (which is enabled by setting acpi_gbl_parse_table_as_term_list to TRUE): 1. Install default region handlers (SystemMemory, SystemIo, PciConfig, EmbeddedControl via ECDT) without evaluating _REG; 2. Load

[PATCH v4 4/8] iommu/rockchip: Use DMA API to manage coherency

From: Shunqian Zheng Use DMA API instead of architecture internal functions like __cpuc_flush_dcache_area() etc. The biggest difficulty here is that dma_map and _sync calls require some struct device, while there is no real 1:1 relation between an IOMMU domain and some device. To overcome this,

[PATCH v4 1/5] ACPICA: Namespace: Fix a regression that MLC support triggers dead lock in dynamic table loading

The new MLC approach invokes MLC per-table basis. But the dynamic loading support of this is incorrect because of the lock order: acpi_ns_evaluate acpi_ex_enter_intperter acpi_ns_load_table (triggered by Load opcode) acpi_ns_exec_module_code_list acpi_ex_enter_intperter

[PATCH v4 3/5] ACPICA: ACPI 2.0, Interpreter: Fix MLC issues by switching to new TermList grammar for table loading

The MLC (Module Level Code) is an ACPICA terminology describing the AML code out of any control method, its support is the main contention of the interpreter behavior during the table loading. The original implementation of MLC in ACPICA had several issues: 1. Out of any control method, besides

[PATCH v4 1/8] iommu/rockchip: Fix devm_{request,free}_irq parameter

From: Simon Xue Even though the IOMMU shares IRQ with its master, the struct device passed to {request,free}_irq is supposed to represent the device that is signalling the interrupt. This patch makes the driver use IOMMU device instead of master's device to make things

[PATCH v4 1/8] iommu/rockchip: Fix devm_{request,free}_irq parameter

From: Simon Xue Even though the IOMMU shares IRQ with its master, the struct device passed to {request,free}_irq is supposed to represent the device that is signalling the interrupt. This patch makes the driver use IOMMU device instead of master's device to make things clear. Signed-off-by:

[PATCH v4 5/5] ACPI 2.0 / AML: Fix module level execution by correctly parsing table as TermList

This experiment follows de-facto standard behavior, parsing entire table as a single TermList, so that all module level executions are possible during the table loading. If regressions are found against the enabling of this experimental fix, this patch is the only one that should get bisected

Re: [PATCH -v2 14/33] locking,m68k: Implement atomic_fetch_{add,sub,and,or,xor}()

On Mon, 20 Jun 2016, Andreas Schwab wrote: > Peter Zijlstra writes: > > > Could either of you comment on the below patch? > > > > All atomic functions that return a value should imply full memory > > barrier semantics -- this very much includes a compiler barrier / > >

[PATCH v4 7/8] drm/rockchip: Use common IOMMU API to attach devices

From: Shunqian Zheng Rockchip DRM used the arm special API, arm_iommu_*(), to attach iommu for ARM32 SoCs. This patch convert to common iommu API so it would support ARM64 like RK3399. Since previous patch added support for direct IOMMU address space management, there is

[PATCH v4 8/8] iommu/rockchip: Enable Rockchip IOMMU on ARM64

From: Simon Xue This patch makes it possible to compile the rockchip-iommu driver on ARM64, so that it can be used with 64-bit SoCs equipped with this type of IOMMU. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng

[PATCH v4 5/5] ACPI 2.0 / AML: Fix module level execution by correctly parsing table as TermList

This experiment follows de-facto standard behavior, parsing entire table as a single TermList, so that all module level executions are possible during the table loading. If regressions are found against the enabling of this experimental fix, this patch is the only one that should get bisected

Re: [PATCH -v2 14/33] locking,m68k: Implement atomic_fetch_{add,sub,and,or,xor}()

On Mon, 20 Jun 2016, Andreas Schwab wrote: > Peter Zijlstra writes: > > > Could either of you comment on the below patch? > > > > All atomic functions that return a value should imply full memory > > barrier semantics -- this very much includes a compiler barrier / > > memory clobber. > > I

[PATCH v4 7/8] drm/rockchip: Use common IOMMU API to attach devices

From: Shunqian Zheng Rockchip DRM used the arm special API, arm_iommu_*(), to attach iommu for ARM32 SoCs. This patch convert to common iommu API so it would support ARM64 like RK3399. Since previous patch added support for direct IOMMU address space management, there is no need to use DMA API

[PATCH v4 8/8] iommu/rockchip: Enable Rockchip IOMMU on ARM64

From: Simon Xue This patch makes it possible to compile the rockchip-iommu driver on ARM64, so that it can be used with 64-bit SoCs equipped with this type of IOMMU. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng Signed-off-by: Tomasz Figa --- drivers/iommu/Kconfig | 2 +- 1 file

[PATCH v4 2/8] iommu/rockchip: Add map_sg callback for rk_iommu_ops

From: Simon Xue The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg() that requires the callback iommu_ops .map_sg(). Adding the default_iommu_map_sg() to Rockchip IOMMU accordingly. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng

[PATCH v4 2/8] iommu/rockchip: Add map_sg callback for rk_iommu_ops

From: Simon Xue The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg() that requires the callback iommu_ops .map_sg(). Adding the default_iommu_map_sg() to Rockchip IOMMU accordingly. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng Reviewed-on:

Re: [PATCH] dt-bindings: ci-hdrc-usb2: s/gadget-itc-setting/itc-setting in example

On Thu, Jun 16, 2016 at 04:13:18PM +0800, Jisheng Zhang wrote: > What the code expect is "itc-setting" rather than "gadget-itc-setting", > and this is also correctly described in the optional properties. > > Signed-off-by: Jisheng Zhang > --- >

Re: [PATCH] dt-bindings: ci-hdrc-usb2: s/gadget-itc-setting/itc-setting in example

On Thu, Jun 16, 2016 at 04:13:18PM +0800, Jisheng Zhang wrote: > What the code expect is "itc-setting" rather than "gadget-itc-setting", > and this is also correctly described in the optional properties. > > Signed-off-by: Jisheng Zhang > --- >

[PATCH v4 5/8] iommu/rockchip: Prepare to support generic DMA mapping

From: Shunqian Zheng Set geometry for allocated domains and fix .domain_alloc() callback to work with IOMMU_DOMAIN_DMA domain type, which is used for implicit domains on ARM64. Signed-off-by: Shunqian Zheng Signed-off-by: Tomasz Figa

[PATCH v4 5/8] iommu/rockchip: Prepare to support generic DMA mapping

From: Shunqian Zheng Set geometry for allocated domains and fix .domain_alloc() callback to work with IOMMU_DOMAIN_DMA domain type, which is used for implicit domains on ARM64. Signed-off-by: Shunqian Zheng Signed-off-by: Tomasz Figa --- drivers/iommu/rockchip-iommu.c | 16 +++-

[PATCH v4 6/8] drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain

The API is not suitable for subsystems consisting of multiple devices and requires severe hacks to use it. To mitigate this, this patch implements allocation and address space management locally by using helpers provided by DRM framework, like other DRM drivers do, e.g. Tegra. This patch should

[PATCH v4 3/8] iommu/rockchip: Fix allocation of bases array in driver probe

From: Shunqian Zheng In .probe(), devm_kzalloc() is called with size == 0 and works only by luck, due to internal behavior of the allocator and the fact that the proper allocation size is small. Let's use proper value for calculating the size. Fixes: cd6438c5f844

[PATCH v4 6/8] drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain

The API is not suitable for subsystems consisting of multiple devices and requires severe hacks to use it. To mitigate this, this patch implements allocation and address space management locally by using helpers provided by DRM framework, like other DRM drivers do, e.g. Tegra. This patch should

[PATCH v4 3/8] iommu/rockchip: Fix allocation of bases array in driver probe

From: Shunqian Zheng In .probe(), devm_kzalloc() is called with size == 0 and works only by luck, due to internal behavior of the allocator and the fact that the proper allocation size is small. Let's use proper value for calculating the size. Fixes: cd6438c5f844 ("iommu/rockchip: Reconstruct

[PATCH v4 0/8] iommu/rockchip: Fix bugs and enable on ARM64

This series intends mostly to enable support for ARM64 architecture in the rockchip-iommu driver. On the way to do so, some bugs are also fixed. The most important changes here are: - making the Rockchip IOMMU driver use DMA API for managing cache coherency of page tables, - making the

[PATCH v4 0/8] iommu/rockchip: Fix bugs and enable on ARM64

This series intends mostly to enable support for ARM64 architecture in the rockchip-iommu driver. On the way to do so, some bugs are also fixed. The most important changes here are: - making the Rockchip IOMMU driver use DMA API for managing cache coherency of page tables, - making the

[PATCH v4 0/5] ACPI 2.0: Enable TermList interpretion for table loading

MLC (module level code) is an ACPICA terminology describing the AML code out of any control method, currently only Type1Opcode (If/Else/While) wrapped MLC code blocks are executed by the AML interpreter after the table loading. But the issue which is fixed by this patchset is: Not only

[PATCH v4 2/5] ACPICA: Dispatcher: Fix an issue that the opregions created by the linked MLC were not tracked

Operation regions created by MLC were not tracked by acpi_check_address_range(), this patch fixes this issue. ACPICA BZ 1279. Fixed by Lv Zheng. Link: https://bugs.acpica.org/show_bug.cgi?id=1279 Signed-off-by: Lv Zheng --- drivers/acpi/acpica/dsopcode.c |6 ++ 1

[PATCH] drm/rockchip: Finish initialization before registering DRM device

Currently the driver calls drm_dev_register() directly after allocating the DRM device and then continues with further initialization. This is incorrect, because drm_dev_register() is supposed to be called after all initialization is done. This problem was masked by the fact that

[PATCH v4 0/5] ACPI 2.0: Enable TermList interpretion for table loading

MLC (module level code) is an ACPICA terminology describing the AML code out of any control method, currently only Type1Opcode (If/Else/While) wrapped MLC code blocks are executed by the AML interpreter after the table loading. But the issue which is fixed by this patchset is: Not only

[PATCH v4 2/5] ACPICA: Dispatcher: Fix an issue that the opregions created by the linked MLC were not tracked

Operation regions created by MLC were not tracked by acpi_check_address_range(), this patch fixes this issue. ACPICA BZ 1279. Fixed by Lv Zheng. Link: https://bugs.acpica.org/show_bug.cgi?id=1279 Signed-off-by: Lv Zheng --- drivers/acpi/acpica/dsopcode.c |6 ++ 1 file changed, 6

[PATCH] drm/rockchip: Finish initialization before registering DRM device

Currently the driver calls drm_dev_register() directly after allocating the DRM device and then continues with further initialization. This is incorrect, because drm_dev_register() is supposed to be called after all initialization is done. This problem was masked by the fact that

Re: [alsa-devel] [PATCH] ASoC: intel: fix build when ACPI is not enabled

On Mon, Jun 13, 2016 at 08:04:12AM -0700, Randy Dunlap wrote: > On 06/12/16 21:22, Vinod Koul wrote: > > On Thu, Jun 09, 2016 at 05:01:38PM -0700, Randy Dunlap wrote: > >> From: Randy Dunlap > >> > >> kconfig tools generate the following warning when CONFIG_ACPI is not > >>

Re: [alsa-devel] [PATCH] ASoC: intel: fix build when ACPI is not enabled

On Mon, Jun 13, 2016 at 08:04:12AM -0700, Randy Dunlap wrote: > On 06/12/16 21:22, Vinod Koul wrote: > > On Thu, Jun 09, 2016 at 05:01:38PM -0700, Randy Dunlap wrote: > >> From: Randy Dunlap > >> > >> kconfig tools generate the following warning when CONFIG_ACPI is not > >> enabled: > >> > >>

[PATCH v20 04/20] perf, tools: Support CPU ID matching for Powerpc

Implement code that returns the generic CPU ID string for Powerpc. This will be used to identify the specific table of PMU events to parse/compare user specified events against. Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa ---

[PATCH v20 02/20] perf, tools, jevents: Program to convert JSON file to C style file

From: Andi Kleen This is a modified version of an earlier patch by Andi Kleen. We expect architectures to describe the performance monitoring events for each CPU in a corresponding JSON file, which look like: [ { "EventCode": "0x00",

[PATCH v20 03/20] perf, tools: Use pmu_events table to create aliases

At run time (when 'perf' is starting up), locate the specific table of PMU events that corresponds to the current CPU. Using that table, create aliases for the each of the PMU events in the CPU. The use these aliases to parse the user specified perf event. In short this would allow the user to

[PATCH v20 00/20] perf, tools: Add support for PMU events in JSON format

CPUs support a large number of performance monitoring events (PMU events) and often these events are very specific to an architecture/model of the CPU. To use most of these PMU events with perf, we currently have to identify them by their raw codes: perf stat -e r100f2 sleep 1 This

[PATCH v20 07/20] perf, tools: Query terminal width and use in perf list

From: Andi Kleen Automatically adapt the now wider and word wrapped perf list output to wider terminals. This requires querying the terminal before the auto pager takes over, and exporting this information from the pager subsystem. Signed-off-by: Andi Kleen

[PATCH v20 00/20] perf, tools: Add support for PMU events in JSON format

CPUs support a large number of performance monitoring events (PMU events) and often these events are very specific to an architecture/model of the CPU. To use most of these PMU events with perf, we currently have to identify them by their raw codes: perf stat -e r100f2 sleep 1 This

[PATCH v20 07/20] perf, tools: Query terminal width and use in perf list

From: Andi Kleen Automatically adapt the now wider and word wrapped perf list output to wider terminals. This requires querying the terminal before the auto pager takes over, and exporting this information from the pager subsystem. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu

[PATCH v20 04/20] perf, tools: Support CPU ID matching for Powerpc

Implement code that returns the generic CPU ID string for Powerpc. This will be used to identify the specific table of PMU events to parse/compare user specified events against. Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- Changelog[v14] - [Jiri Olsa] Move this

[PATCH v20 02/20] perf, tools, jevents: Program to convert JSON file to C style file

From: Andi Kleen This is a modified version of an earlier patch by Andi Kleen. We expect architectures to describe the performance monitoring events for each CPU in a corresponding JSON file, which look like: [ { "EventCode": "0x00", "UMask": "0x01",

[PATCH v20 03/20] perf, tools: Use pmu_events table to create aliases

At run time (when 'perf' is starting up), locate the specific table of PMU events that corresponds to the current CPU. Using that table, create aliases for the each of the PMU events in the CPU. The use these aliases to parse the user specified perf event. In short this would allow the user to

[PATCH v20 01/20] perf, tools: Add jsmn `jasmine' JSON parser

From: Andi Kleen I need a JSON parser. This adds the simplest JSON parser I could find -- Serge Zaitsev's jsmn `jasmine' -- to the perf library. I merely converted it to (mostly) Linux style and added support for non 0 terminated input. The parser is quite straight forward

[PATCH v20 01/20] perf, tools: Add jsmn `jasmine' JSON parser

From: Andi Kleen I need a JSON parser. This adds the simplest JSON parser I could find -- Serge Zaitsev's jsmn `jasmine' -- to the perf library. I merely converted it to (mostly) Linux style and added support for non 0 terminated input. The parser is quite straight forward and does not copy any

[PATCH v20 06/20] perf, tools: Support alias descriptions

From: Andi Kleen Add support to print alias descriptions in perf list, which are taken from the generated event files. The sorting code is changed to put the events with descriptions at the end. The descriptions are printed as possibly multiple word wrapped lines. Example

[PATCH v20 05/20] perf, tools: Support CPU id matching for x86 v2

From: Andi Kleen Implement the code to match CPU types to mapfile types for x86 based on CPUID. This extends an existing similar function, but changes it to use the x86 mapfile cpu description. This allows to resolve event lists generated by jevents. Signed-off-by: Andi

[PATCH v20 06/20] perf, tools: Support alias descriptions

From: Andi Kleen Add support to print alias descriptions in perf list, which are taken from the generated event files. The sorting code is changed to put the events with descriptions at the end. The descriptions are printed as possibly multiple word wrapped lines. Example output: % perf list

[PATCH v20 05/20] perf, tools: Support CPU id matching for x86 v2

From: Andi Kleen Implement the code to match CPU types to mapfile types for x86 based on CPUID. This extends an existing similar function, but changes it to use the x86 mapfile cpu description. This allows to resolve event lists generated by jevents. Signed-off-by: Andi Kleen Signed-off-by:

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