drivers/mfd/syscon.c:67:9: error: implicit declaration of function 'ioremap'

Hi, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: da2f6aba4a21f8da3331e5251a117c52764da579 commit: ca668f0edfae65438c3f0a3ad5d3e59e3515915f mfd: syscon: Set regmap max_register in of_syscon_register date: 3

drivers/mfd/syscon.c:67:9: error: implicit declaration of function 'ioremap'

Hi, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: da2f6aba4a21f8da3331e5251a117c52764da579 commit: ca668f0edfae65438c3f0a3ad5d3e59e3515915f mfd: syscon: Set regmap max_register in of_syscon_register date: 3

[PATCH 3/3] ARM: dts: fix STMicroelectronics compatible strings

Replace the non-standard vendor prefix stm with st for STMicroelectronics. The drivers do not specify the vendor prefixes since the I2C Core strips them away from the DT provided compatible string. Therefore, changing existing device trees does not have any impact on device detection.

[PATCH 3/3] ARM: dts: fix STMicroelectronics compatible strings

Replace the non-standard vendor prefix stm with st for STMicroelectronics. The drivers do not specify the vendor prefixes since the I2C Core strips them away from the DT provided compatible string. Therefore, changing existing device trees does not have any impact on device detection.

[PATCH 2/3] powerpc/dts: fix STMicroelectronics compatible strings

Replace the non-standard vendor prefix stm and st-micro with st for STMicroelectronics. The drivers do not specify the vendor prefixes since the I2C Core strips them away from the DT provided compatible string. Therefore, changing existing device trees does not have any impact on device detection.

[PATCH 1/3] Documentation: dt: i2c: use correct STMicroelectronics vendor prefix

The documentation currently uses the non-standard vendor prefix stm and st-micro for STMicroelectronics. The drivers do not specify the vendor prefixes since the I2C Core strips them away from the DT provided compatible string. Therefor, changing documentation and existing device trees does not

[PATCH 2/3] powerpc/dts: fix STMicroelectronics compatible strings

Replace the non-standard vendor prefix stm and st-micro with st for STMicroelectronics. The drivers do not specify the vendor prefixes since the I2C Core strips them away from the DT provided compatible string. Therefore, changing existing device trees does not have any impact on device detection.

[PATCH 1/3] Documentation: dt: i2c: use correct STMicroelectronics vendor prefix

The documentation currently uses the non-standard vendor prefix stm and st-micro for STMicroelectronics. The drivers do not specify the vendor prefixes since the I2C Core strips them away from the DT provided compatible string. Therefor, changing documentation and existing device trees does not

Re: [PATCH 3/3] drivers core: allow id match override when manually binding driver

Hi Michal, On Sun, Jun 26, 2016 at 8:44 AM, Michal Suchanek wrote: > The SPI bus feature-wise is closest to serial UARTs form the other > buses available in kernel. Serial uart does not even have a bus > driver. That's being worked on, as currently you can't describe the

Re: [PATCH 3/3] drivers core: allow id match override when manually binding driver

Hi Michal, On Sun, Jun 26, 2016 at 8:44 AM, Michal Suchanek wrote: > The SPI bus feature-wise is closest to serial UARTs form the other > buses available in kernel. Serial uart does not even have a bus > driver. That's being worked on, as currently you can't describe the other side of the UART

Re: [PATCH] firmware: declare __{start,end}_builtin_fw as pointers

On 25 June 2016 at 23:06, Vegard Nossum wrote: > On 25 June 2016 at 17:04, Vegard Nossum wrote: >> The test in this loop: >> >> for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) { >> >> was getting completely compiled out by my

Re: [PATCH] firmware: declare __{start,end}_builtin_fw as pointers

On 25 June 2016 at 23:06, Vegard Nossum wrote: > On 25 June 2016 at 17:04, Vegard Nossum wrote: >> The test in this loop: >> >> for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) { >> >> was getting completely compiled out by my gcc, 7.0.0 20160520. The result >> was that the

Re: 4.6.2 frequent crashes under memory + IO pressure

Johannes Stezenbach wrote: > On Sun, Jun 26, 2016 at 02:04:40AM +0900, Tetsuo Handa wrote: > > It seems to me that somebody is using ALLOC_NO_WATERMARKS (with possibly > > __GFP_NOWARN), but I don't know how to identify such callers. Maybe print > > backtrace from __alloc_pages_slowpath() when

Re: 4.6.2 frequent crashes under memory + IO pressure

Johannes Stezenbach wrote: > On Sun, Jun 26, 2016 at 02:04:40AM +0900, Tetsuo Handa wrote: > > It seems to me that somebody is using ALLOC_NO_WATERMARKS (with possibly > > __GFP_NOWARN), but I don't know how to identify such callers. Maybe print > > backtrace from __alloc_pages_slowpath() when

[x86] 87194cac13: BUG: unable to handle kernel

1108/gcc-6/87194cac139aebecec89a68eff719ab44f0469a2/vmlinuz-4.7.0-rc4-00258-g87194ca -append 'root=/dev/ram0 user=lkp job=/lkp/scheduled/vm-vp-quantal-x86_64-2/bisect_boot-1-quantal-core-x86_64.cgz-x86_64-randconfig-v0-06261108-87194cac139aebecec89a68eff719ab44f0469a2-20160626-43628-vqpxp-0.yaml ARCH=x86_64 kconfig=x86_64-randconfig-v

[x86] 87194cac13: BUG: unable to handle kernel

1108/gcc-6/87194cac139aebecec89a68eff719ab44f0469a2/vmlinuz-4.7.0-rc4-00258-g87194ca -append 'root=/dev/ram0 user=lkp job=/lkp/scheduled/vm-vp-quantal-x86_64-2/bisect_boot-1-quantal-core-x86_64.cgz-x86_64-randconfig-v0-06261108-87194cac139aebecec89a68eff719ab44f0469a2-20160626-43628-vqpxp-0.yaml ARCH=x86_64 kconfig=x86_64-randconfig-v

[PATCH v2 0/5] ARM: dts: imx7d: add i.MX 7Solo and Colibri iMX7S/D dts

The two SoC's i.MX 7Solo and i.MX 7Dual are very similar, but there are some differences worth dividing the current i.MX 7Dual base device tree. This patchset adds new base device tree imx7s.dtsi which is meant to be used for i.MX 7Solo boards. Note that the SoC _family_ is called imx7d/IMX7D

[PATCH v2 0/5] ARM: dts: imx7d: add i.MX 7Solo and Colibri iMX7S/D dts

The two SoC's i.MX 7Solo and i.MX 7Dual are very similar, but there are some differences worth dividing the current i.MX 7Dual base device tree. This patchset adds new base device tree imx7s.dtsi which is meant to be used for i.MX 7Solo boards. Note that the SoC _family_ is called imx7d/IMX7D

[PATCH v2 5/5] ARM: dts: imx7: add Toradex Colibri iMX7S/iMX7D support

Add support for the Computer on Module Colibri iMX7S/iMX7D along with the development/evaluation carrier board device trees. Follow the usual hierarchic include model, maintaining shared configuration in imx7-colibri.dtsi and imx7-colibri-eval-v3.dtsi respectively. Signed-off-by: Stefan Agner

[PATCH v2 5/5] ARM: dts: imx7: add Toradex Colibri iMX7S/iMX7D support

Add support for the Computer on Module Colibri iMX7S/iMX7D along with the development/evaluation carrier board device trees. Follow the usual hierarchic include model, maintaining shared configuration in imx7-colibri.dtsi and imx7-colibri-eval-v3.dtsi respectively. Signed-off-by: Stefan Agner

[PATCH v2 4/5] ARM: dts: imx7d: move input header into base device tree

The base device tree uses KEY_POWER in the snvs-powerkey node, hence include the input.h header file in the base device tree. Signed-off-by: Stefan Agner Acked-by: Igor Grinberg --- arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 1 -

[PATCH v2 4/5] ARM: dts: imx7d: move input header into base device tree

The base device tree uses KEY_POWER in the snvs-powerkey node, hence include the input.h header file in the base device tree. Signed-off-by: Stefan Agner Acked-by: Igor Grinberg --- arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 1 - arch/arm/boot/dts/imx7d-nitrogen7.dts | 1 -

[PATCH v2 1/5] ARM: imx: add support for i.MX 7Solo

Add device tree compatible string "imx7s" for i.MX 7Solo. Signed-off-by: Stefan Agner --- arch/arm/mach-imx/mach-imx7d.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c index b450f52..36254a6 100644 ---

[PATCH v2 2/5] ARM: dts: imx7d: use imx7s.dtsi as base device tree

The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and 7Dual. The former has a subset of features of the latter, hence use imx7s.dtsi as the new base device tree. To keep diffstat nice, just move imx7d.dtsi to imx7s.dtsi temporarily and recreate imx7d.dtsi in a second commit.

[PATCH v2 3/5] ARM: dts: imx7d: recreate imx7d.dtsi with i.MX 7Dual specifics

The i.MX 7Solo implements a subset of features available on i.MX 7Dual. Recreate imx7s.dtsi as the base device tree for i.MX 7Dual boards. The i.MX 7Dual's additional features over i.MX 7Solo are: - Second Cortex-A7 core - Second Gigabit Ethernet controller - EPD (Electronc Paper Display, not yet

[PATCH v2 1/5] ARM: imx: add support for i.MX 7Solo

Add device tree compatible string "imx7s" for i.MX 7Solo. Signed-off-by: Stefan Agner --- arch/arm/mach-imx/mach-imx7d.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c index b450f52..36254a6 100644 ---

[PATCH v2 2/5] ARM: dts: imx7d: use imx7s.dtsi as base device tree

The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and 7Dual. The former has a subset of features of the latter, hence use imx7s.dtsi as the new base device tree. To keep diffstat nice, just move imx7d.dtsi to imx7s.dtsi temporarily and recreate imx7d.dtsi in a second commit.

[PATCH v2 3/5] ARM: dts: imx7d: recreate imx7d.dtsi with i.MX 7Dual specifics

The i.MX 7Solo implements a subset of features available on i.MX 7Dual. Recreate imx7s.dtsi as the base device tree for i.MX 7Dual boards. The i.MX 7Dual's additional features over i.MX 7Solo are: - Second Cortex-A7 core - Second Gigabit Ethernet controller - EPD (Electronc Paper Display, not yet

[PATCH] perf tools: Fix compiler error due to header file changes

The commit 41840d211c51 ("perf config: Move config declarations from util/cache.h to util/config.h") moved perf_config*(), causes the following errors when we build with LIBBABELTRACE=1: util/data-convert-bt.c: In function ‘convert__config’: util/data-convert-bt.c:1269:3: error: implicit

[PATCH] perf tools: Fix compiler error due to header file changes

The commit 41840d211c51 ("perf config: Move config declarations from util/cache.h to util/config.h") moved perf_config*(), causes the following errors when we build with LIBBABELTRACE=1: util/data-convert-bt.c: In function ‘convert__config’: util/data-convert-bt.c:1269:3: error: implicit

[PATCH 1/1] iommu/amd: initialize devid variable before using it

Commit 2a0cb4e2d423 ("iommu/amd: Add new map for storing IVHD dev entry type HID") added a call to DUMP_printk in init_iommu_from_acpi() which used the value of devid before this variable was initialized. Signed-off-by: Nicolas Iooss ---

[PATCH 1/1] iommu/amd: initialize devid variable before using it

Commit 2a0cb4e2d423 ("iommu/amd: Add new map for storing IVHD dev entry type HID") added a call to DUMP_printk in init_iommu_from_acpi() which used the value of devid before this variable was initialized. Signed-off-by: Nicolas Iooss --- drivers/iommu/amd_iommu_init.c | 2 +- 1 file changed, 1

[PATCH 1/1] usb: dwc2: add printf attribute to cat_printf()

As cat_printf() uses printf format strings in its parameters, adding __printf attribute allows the compiler to detect at compile-time some errors related to format strings (with -Wformat warning flag). Signed-off-by: Nicolas Iooss --- drivers/usb/dwc2/hcd_queue.c |

[PATCH 1/1] usb: dwc2: add printf attribute to cat_printf()

As cat_printf() uses printf format strings in its parameters, adding __printf attribute allows the compiler to detect at compile-time some errors related to format strings (with -Wformat warning flag). Signed-off-by: Nicolas Iooss --- drivers/usb/dwc2/hcd_queue.c | 3 ++- 1 file changed, 2

Job Vacancy!!! Escrow Officer Needed..‏

-- Job title: Escrow Officer #216 An-gang Steel Company Limited China Anshan Iron and Steel Co. Ltd. www.ansteel.com.cn It is my pleasure to announce to you the vacancy for the post of an Escrow Online Officer for An-gang Steel Company Limited China. if you are interested, please reply for

Job Vacancy!!! Escrow Officer Needed..‏

-- Job title: Escrow Officer #216 An-gang Steel Company Limited China Anshan Iron and Steel Co. Ltd. www.ansteel.com.cn It is my pleasure to announce to you the vacancy for the post of an Escrow Online Officer for An-gang Steel Company Limited China. if you are interested, please reply for

fs/xfs/xfs_ondisk.h:86:2: error: call to '__compiletime_assert_86' declared with attribute error: XFS: sizeof(xfs_dir2_data_unused_t) is wrong, expected 6

Hi, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: da2f6aba4a21f8da3331e5251a117c52764da579 commit: ab9d1e4f7b0217948a3b35a64178602ab30ff45d Merge branch 'xfs-misc-fixes-4.6-3' into for-next date: 4 months ago

fs/xfs/xfs_ondisk.h:86:2: error: call to '__compiletime_assert_86' declared with attribute error: XFS: sizeof(xfs_dir2_data_unused_t) is wrong, expected 6

Hi, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: da2f6aba4a21f8da3331e5251a117c52764da579 commit: ab9d1e4f7b0217948a3b35a64178602ab30ff45d Merge branch 'xfs-misc-fixes-4.6-3' into for-next date: 4 months ago

[PATCH v2] tty/serial: atmel: enforce tasklet init and termination sequences

As some race conditions are identified in the termination process of tasklets, enforce the atmel_shutdown() sequence. This way we make sure that no new tasklets or software timer are scheduled during shutdown process. An atomic flag is positioned to give this information throughout the code. We

[PATCH v2] tty/serial: atmel: enforce tasklet init and termination sequences

As some race conditions are identified in the termination process of tasklets, enforce the atmel_shutdown() sequence. This way we make sure that no new tasklets or software timer are scheduled during shutdown process. An atomic flag is positioned to give this information throughout the code. We

[PATCH] fujitsu-laptop: Support touchpad toggle hotkey on Skylake-based models

Haswell-based Fujitsu laptops (Lifebook E734/E744/E754) have a touchpad toggle hotkey (Fn+F4) which is handled transparently to the operating system: while an ACPI notification is sent to FUJ02B1 when Fn+F4 is pressed, touchpad state is properly toggled without any explicit support for this

[PATCH] fujitsu-laptop: Support touchpad toggle hotkey on Skylake-based models

Haswell-based Fujitsu laptops (Lifebook E734/E744/E754) have a touchpad toggle hotkey (Fn+F4) which is handled transparently to the operating system: while an ACPI notification is sent to FUJ02B1 when Fn+F4 is pressed, touchpad state is properly toggled without any explicit support for this

[PATCH 01/21] of: device: Support loading a module with OF based modalias

In the case of ULPI devices, we want to be able to load the driver before registering the device so that we don't get stuck in a loop waiting for the phy module to appear and failing usb controller probe. Currently we request the ulpi module via the ulpi ids, but in the DT case we might need to

[PATCH 01/21] of: device: Support loading a module with OF based modalias

In the case of ULPI devices, we want to be able to load the driver before registering the device so that we don't get stuck in a loop waiting for the phy module to appear and failing usb controller probe. Currently we request the ulpi module via the ulpi ids, but in the DT case we might need to

[PATCH 15/21] usb: chipidea: msm: Mux over secondary phy at the right time

We need to pick the correct phy at runtime based on how the SoC has been wired onto the board. If the secondary phy is used, take it out of reset and mux over to it by writing into the TCSR register. Make sure to do this on reset too, because this register is reset to the default value (primary

[PATCH 14/21] usb: chipidea: msm: Add proper clk and reset support

The msm chipidea controller uses two main clks, an AHB clk to read/write the MMIO registers and a core clk called the system clk that drives the controller itself. Add support for these clks as they're required in all designs. Also add support for an optional third clk that we need to turn on to

[PATCH 15/21] usb: chipidea: msm: Mux over secondary phy at the right time

We need to pick the correct phy at runtime based on how the SoC has been wired onto the board. If the secondary phy is used, take it out of reset and mux over to it by writing into the TCSR register. Make sure to do this on reset too, because this register is reset to the default value (primary

[PATCH 14/21] usb: chipidea: msm: Add proper clk and reset support

The msm chipidea controller uses two main clks, an AHB clk to read/write the MMIO registers and a core clk called the system clk that drives the controller itself. Add support for these clks as they're required in all designs. Also add support for an optional third clk that we need to turn on to

[PATCH 16/21] usb: chipidea: msm: Restore wrapper settings after reset

When the RESET bit is set in the USBCMD register it resets quite a few of the wrapper's registers to their reset state. This includes the GENCONFIG and GENCONFIG2 registers. Currently this is done by the usb phy and ehci-msm drivers writing into the controller wrapper's MMIO address space. Let's

[PATCH 16/21] usb: chipidea: msm: Restore wrapper settings after reset

When the RESET bit is set in the USBCMD register it resets quite a few of the wrapper's registers to their reset state. This includes the GENCONFIG and GENCONFIG2 registers. Currently this is done by the usb phy and ehci-msm drivers writing into the controller wrapper's MMIO address space. Let's

[PATCH 17/21] usb: chipidea: msm: Make platform data driver local instead of global

If two devices are probed with this same driver, they'll share the same platform data structure, while the chipidea core layer writes and modifies it. This can lead to interesting results especially if one device is an OTG type chipidea controller and another is a host. Let's create a copy of this

[PATCH 18/21] usb: chipidea: msm: Add reset controller for PHY POR bit

The MSM chipidea wrapper has two bits that are used to reset the first or second phy. Add support for these bits via the reset controller framework, so that phy drivers can reset their hardware at the right time during initialization. Cc: Peter Chen Cc: Greg Kroah-Hartman

[PATCH 03/21] usb: ulpi: Avoid reading/writing in device creation with OF devices

ULPI devices are matched up against ULPI drivers by reading the vendor id and product id registers in the ULPI address space. Before we try to read those registers we'll do a scratch write to test the interface. Unfortunately, this doesn't work well if the ULPI device is not powered at the time of

[PATCH 18/21] usb: chipidea: msm: Add reset controller for PHY POR bit

The MSM chipidea wrapper has two bits that are used to reset the first or second phy. Add support for these bits via the reset controller framework, so that phy drivers can reset their hardware at the right time during initialization. Cc: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen

[PATCH 03/21] usb: ulpi: Avoid reading/writing in device creation with OF devices

ULPI devices are matched up against ULPI drivers by reading the vendor id and product id registers in the ULPI address space. Before we try to read those registers we'll do a scratch write to test the interface. Unfortunately, this doesn't work well if the ULPI device is not powered at the time of

[PATCH 17/21] usb: chipidea: msm: Make platform data driver local instead of global

If two devices are probed with this same driver, they'll share the same platform data structure, while the chipidea core layer writes and modifies it. This can lead to interesting results especially if one device is an OTG type chipidea controller and another is a host. Let's create a copy of this

[PATCH 02/21] usb: ulpi: Support device discovery via DT

The qcom HSIC ulpi phy doesn't have any bits set in the vendor or product id ulpi registers. This makes it impossible to make a ulpi driver match against the id registers. Add support to discover the ulpi phys via DT to help alleviate this problem. We'll look for a ulpi bus node underneath the

[PATCH 04/21] usb: chipidea: Only read/write OTGSC from one place

With the id and vbus detection done via extcon we need to make sure we poll the status of OTGSC properly by considering what the extcon is saying, and not just what the register is saying. Let's move this hw_wait_reg() function to the only place it's used and simplify it for polling the OTGSC

[PATCH 19/21] usb: chipidea: msm: Be silent on probe defer errors

If something fails in ci_hdrc_add_device() due to probe defer, we shouldn't print an error message. Be silent in this case as we'll try probe again later. Cc: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen Boyd

[PATCH 04/21] usb: chipidea: Only read/write OTGSC from one place

With the id and vbus detection done via extcon we need to make sure we poll the status of OTGSC properly by considering what the extcon is saying, and not just what the register is saying. Let's move this hw_wait_reg() function to the only place it's used and simplify it for polling the OTGSC

[PATCH 19/21] usb: chipidea: msm: Be silent on probe defer errors

If something fails in ci_hdrc_add_device() due to probe defer, we shouldn't print an error message. Be silent in this case as we'll try probe again later. Cc: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen Boyd --- drivers/usb/chipidea/ci_hdrc_msm.c | 3 ++- 1 file changed, 2

[PATCH 02/21] usb: ulpi: Support device discovery via DT

The qcom HSIC ulpi phy doesn't have any bits set in the vendor or product id ulpi registers. This makes it impossible to make a ulpi driver match against the id registers. Add support to discover the ulpi phys via DT to help alleviate this problem. We'll look for a ulpi bus node underneath the

[PATCH 21/21] phy: Add support for Qualcomm's USB HS phy

The high-speed phy on qcom SoCs is controlled via the ULPI viewport. Cc: Kishon Vijay Abraham I Cc: Signed-off-by: Stephen Boyd --- .../devicetree/bindings/phy/qcom,usb-hs-phy.txt| 71 ++ drivers/phy/Kconfig

[PATCH 05/21] usb: chipidea: Handle extcon events properly

We're currently emulating the vbus and id interrupts in the OTGSC read API, but we also need to make sure that if we're handling the events with extcon that we don't enable the interrupts for those events in the hardware. Therefore, properly emulate this register if we're using extcon, but don't

[PATCH 20/21] phy: Add support for Qualcomm's USB HSIC phy

The HSIC USB controller on qcom SoCs has an integrated all digital phy controlled via the ULPI viewport. Cc: Kishon Vijay Abraham I Cc: Signed-off-by: Stephen Boyd --- .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt | 60

[PATCH 21/21] phy: Add support for Qualcomm's USB HS phy

The high-speed phy on qcom SoCs is controlled via the ULPI viewport. Cc: Kishon Vijay Abraham I Cc: Signed-off-by: Stephen Boyd --- .../devicetree/bindings/phy/qcom,usb-hs-phy.txt| 71 ++ drivers/phy/Kconfig| 8 + drivers/phy/Makefile

[PATCH 05/21] usb: chipidea: Handle extcon events properly

We're currently emulating the vbus and id interrupts in the OTGSC read API, but we also need to make sure that if we're handling the events with extcon that we don't enable the interrupts for those events in the hardware. Therefore, properly emulate this register if we're using extcon, but don't

[PATCH 20/21] phy: Add support for Qualcomm's USB HSIC phy

The HSIC USB controller on qcom SoCs has an integrated all digital phy controlled via the ULPI viewport. Cc: Kishon Vijay Abraham I Cc: Signed-off-by: Stephen Boyd --- .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt | 60 drivers/phy/Kconfig| 7 +

[PATCH 08/21] usb: chipidea: Kick OTG state machine for AVVIS with vbus extcon

Force the OTG state machine to go forward when we're using an extcon for vbus detection. In this case, the controller may never raise an interrupt for AVVIS, so we need to simulate the event by toggling the appropriate OTG fsm bits and kicking the state machine again. Cc: Peter Chen

[PATCH 07/21] usb: chipidea: Notify of reset when switching into host mode

The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to the wrapper drivers when it calls hw_device_reset(), but that function is not called from chipidea/host.c. The intent of this event is to allow the wrapper driver to do any wrapper specific things after the reset bit has been set in

[PATCH 06/21] usb: chipidea: Initialize and reinitialize phy later

The ULPI phy on qcom platforms needs to be initialized and powered on after a USB reset and before we toggle the run/stop bit. Otherwise, the phy locks up and doesn't work properly. Move the phy initialization to a later point, and shut it down outside of driver remove so that the phy state is

[PATCH 08/21] usb: chipidea: Kick OTG state machine for AVVIS with vbus extcon

Force the OTG state machine to go forward when we're using an extcon for vbus detection. In this case, the controller may never raise an interrupt for AVVIS, so we need to simulate the event by toggling the appropriate OTG fsm bits and kicking the state machine again. Cc: Peter Chen Cc: Greg

[PATCH 07/21] usb: chipidea: Notify of reset when switching into host mode

The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to the wrapper drivers when it calls hw_device_reset(), but that function is not called from chipidea/host.c. The intent of this event is to allow the wrapper driver to do any wrapper specific things after the reset bit has been set in

[PATCH 06/21] usb: chipidea: Initialize and reinitialize phy later

The ULPI phy on qcom platforms needs to be initialized and powered on after a USB reset and before we toggle the run/stop bit. Otherwise, the phy locks up and doesn't work properly. Move the phy initialization to a later point, and shut it down outside of driver remove so that the phy state is

[PATCH 12/21] usb: chipidea: msm: Keep device runtime enabled

Sometimes the usb wrapper device is part of a power domain that needs to stay on as long as the device is active. Let's get and put the device in driver probe/remove so that we keep the power domain powered as long as the device is attached. We can fine tune this later to handle wakeup interrupts,

[PATCH 12/21] usb: chipidea: msm: Keep device runtime enabled

Sometimes the usb wrapper device is part of a power domain that needs to stay on as long as the device is active. Let's get and put the device in driver probe/remove so that we keep the power domain powered as long as the device is attached. We can fine tune this later to handle wakeup interrupts,

[PATCH 09/21] usb: chipidea: Add support for ULPI PHY bus

Some phys for the chipidea controller are controlled via the ULPI viewport. Add support for the ULPI bus so that these sorts of phys can be probed and read/written automatically without having to duplicate the viewport logic in each phy driver. Cc: Peter Chen Cc: Greg

[PATCH 11/21] usb: chipidea: msm: Use hw_write_id_reg() instead of writel directly

The MSM_USB_BASE macro trick is not very clear, and we're using it for only one register write so let's just move to using hw_write_id_reg() and passing the ci pointer instead. That clearly shows what offset we're using and avoids needing to include the msm_hsusb_hw.h file when we're going to

[PATCH 13/21] usb: chipidea: msm: Allow core to get usb phy

The chipidea core gets the usb phy and initializes the phy at the right point now so we don't need to get the phy in this driver. Cc: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen Boyd ---

[PATCH 10/21] usb: chipidea: msm: Rely on core to override AHBBURST

The core framework already handles setting this parameter with a platform quirk. Add the appropriate flag so that we always set AHBBURST to 0. Technically DT should be doing this, but we always do it for msm chipidea devices so setting the flag in the driver works just as well. Cc: Peter Chen

[PATCH 09/21] usb: chipidea: Add support for ULPI PHY bus

Some phys for the chipidea controller are controlled via the ULPI viewport. Add support for the ULPI bus so that these sorts of phys can be probed and read/written automatically without having to duplicate the viewport logic in each phy driver. Cc: Peter Chen Cc: Greg Kroah-Hartman Cc: Heikki

[PATCH 11/21] usb: chipidea: msm: Use hw_write_id_reg() instead of writel directly

The MSM_USB_BASE macro trick is not very clear, and we're using it for only one register write so let's just move to using hw_write_id_reg() and passing the ci pointer instead. That clearly shows what offset we're using and avoids needing to include the msm_hsusb_hw.h file when we're going to

[PATCH 13/21] usb: chipidea: msm: Allow core to get usb phy

The chipidea core gets the usb phy and initializes the phy at the right point now so we don't need to get the phy in this driver. Cc: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen Boyd --- drivers/usb/chipidea/ci_hdrc_msm.c | 21 - 1 file changed, 21

[PATCH 10/21] usb: chipidea: msm: Rely on core to override AHBBURST

The core framework already handles setting this parameter with a platform quirk. Add the appropriate flag so that we always set AHBBURST to 0. Technically DT should be doing this, but we always do it for msm chipidea devices so setting the flag in the driver works just as well. Cc: Peter Chen

[PATCH 00/21] Support qcom's HSIC USB and rewrite USB2 HS phy support

The state of USB ChipIdea support on Qualcomm's platforms is not great. The DT description of these devices requires up to three different nodes for what amounts to be the same hardware block, when there should really only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)

[PATCH 00/21] Support qcom's HSIC USB and rewrite USB2 HS phy support

The state of USB ChipIdea support on Qualcomm's platforms is not great. The DT description of these devices requires up to three different nodes for what amounts to be the same hardware block, when there should really only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)

Re: [PATCH 2/2] locking/osq: Drop the overload of osq_lock()

> 在 2016年6月26日，18:41，Pan Xinhui 写道： > > An over-committed guest with more vCPUs than pCPUs has a heavy overload > in osq_lock(). > > This is because vCPU A hold the osq lock and yield out, vCPU B wait > per_cpu node->locked to be set. IOW, vCPU B wait vCPU A to

Re: [PATCH 2/2] locking/osq: Drop the overload of osq_lock()

> 在 2016年6月26日，18:41，Pan Xinhui 写道： > > An over-committed guest with more vCPUs than pCPUs has a heavy overload > in osq_lock(). > > This is because vCPU A hold the osq lock and yield out, vCPU B wait > per_cpu node->locked to be set. IOW, vCPU B wait vCPU A to run and > unlock the osq lock. >

Re: [PATCH] locking/osq: Drop the overload of osq lock

> 在 2016年6月26日，14:59，Boqun Feng 写道： > > On Sun, Jun 26, 2016 at 02:10:57PM +0800, Boqun Feng wrote: >> On Sun, Jun 26, 2016 at 01:21:04PM +0800, panxinhui wrote: >>> 在 2016年6月26日，03:20，Peter Zijlstra 写道： On Sun, Jun 26, 2016 at

Re: [PATCH] locking/osq: Drop the overload of osq lock

> 在 2016年6月26日，14:59，Boqun Feng 写道： > > On Sun, Jun 26, 2016 at 02:10:57PM +0800, Boqun Feng wrote: >> On Sun, Jun 26, 2016 at 01:21:04PM +0800, panxinhui wrote: >>> 在 2016年6月26日，03:20，Peter Zijlstra 写道： On Sun, Jun 26, 2016 at 01:27:56AM +0800, panxinhui wrote: >>> Would

Re: [PATCH] locking/osq: Drop the overload of osq lock

> 在 2016年6月26日，14:10，Boqun Feng 写道： > > On Sun, Jun 26, 2016 at 01:21:04PM +0800, panxinhui wrote: >> >>> 在 2016年6月26日，03:20，Peter Zijlstra 写道： >>> >>> On Sun, Jun 26, 2016 at 01:27:56AM +0800, panxinhui wrote: >> Would that not have issues

Re: [PATCH] locking/osq: Drop the overload of osq lock

> 在 2016年6月26日，14:10，Boqun Feng 写道： > > On Sun, Jun 26, 2016 at 01:21:04PM +0800, panxinhui wrote: >> >>> 在 2016年6月26日，03:20，Peter Zijlstra 写道： >>> >>> On Sun, Jun 26, 2016 at 01:27:56AM +0800, panxinhui wrote: >> Would that not have issues where the owner cpu is kept running but the

Re: [PATCH] locking/osq: Drop the overload of osq lock

On Sun, Jun 26, 2016 at 02:10:57PM +0800, Boqun Feng wrote: > On Sun, Jun 26, 2016 at 01:21:04PM +0800, panxinhui wrote: > > > > > 在 2016年6月26日，03:20，Peter Zijlstra 写道： > > > > > > On Sun, Jun 26, 2016 at 01:27:56AM +0800, panxinhui wrote: > > Would that not have

Re: [PATCH] locking/osq: Drop the overload of osq lock

On Sun, Jun 26, 2016 at 02:10:57PM +0800, Boqun Feng wrote: > On Sun, Jun 26, 2016 at 01:21:04PM +0800, panxinhui wrote: > > > > > 在 2016年6月26日，03:20，Peter Zijlstra 写道： > > > > > > On Sun, Jun 26, 2016 at 01:27:56AM +0800, panxinhui wrote: > > Would that not have issues where the owner cpu

Re: [PATCH 3/3] drivers core: allow id match override when manually binding driver

Hello, On 26 June 2016 at 06:14, Dan Williams wrote: > On Thu, Jun 23, 2016 at 10:41 AM, Michal Suchanek wrote: >> This allows binding spidev on any slave device by hand using sysfs >> without adding superfluous compatibles or any other needless >>

Re: [PATCH 3/3] drivers core: allow id match override when manually binding driver

Hello, On 26 June 2016 at 06:14, Dan Williams wrote: > On Thu, Jun 23, 2016 at 10:41 AM, Michal Suchanek wrote: >> This allows binding spidev on any slave device by hand using sysfs >> without adding superfluous compatibles or any other needless >> complication. >> >> Note that any slave driver

[PATCH 0/2] implement vcpu preempted check

This is to fix some bad issues on an over-commited guest. test-caes: perf record -a perf bench sched messaging -g 400 -p && perf report 18.09% sched-messaging [kernel.vmlinux] [k] osq_lock 12.28% sched-messaging [kernel.vmlinux] [k] rwsem_spin_on_owner 5.27% sched-messaging

[PATCH 1/2] kernel/sched: introduce vcpu preempted interface

From: pan xinhui this supports to fix lock holder preempted issue which run as a guest two interfaces, bool vcpu_is_preempted(int cpu); unsigned int vcpu_get_yield_count(int cpu); arch may need implement anyone of them. some spinneris may also need call

[PATCH 2/2] locking/osq: Drop the overload of osq_lock()

An over-committed guest with more vCPUs than pCPUs has a heavy overload in osq_lock(). This is because vCPU A hold the osq lock and yield out, vCPU B wait per_cpu node->locked to be set. IOW, vCPU B wait vCPU A to run and unlock the osq lock. So lets also use neet_yield_to() to detect if we need

[PATCH 0/2] implement vcpu preempted check

This is to fix some bad issues on an over-commited guest. test-caes: perf record -a perf bench sched messaging -g 400 -p && perf report 18.09% sched-messaging [kernel.vmlinux] [k] osq_lock 12.28% sched-messaging [kernel.vmlinux] [k] rwsem_spin_on_owner 5.27% sched-messaging

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