On Mon, Jul 11, 2016 at 07:06:14PM +0800, Songshan Gong wrote:
SNIP
> >
> > we have following functions in tools/lib/api/fs to read
> > single number from file, which I assume you do above:
> >
> > int sysfs__read_int(const char *entry, int *value);
> > int sysfs__read_ull(const char *entry, un
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Благодаря
Системен администратор. © 2016 вс
On 07/11/2016 01:48 PM, Andrey Utkin wrote:
> Thanks for review Hans!
>
> On Mon, Jul 11, 2016 at 07:58:38AM +0200, Hans Verkuil wrote:
>>> +" v4l2-ctl --device $dev --set-ctrl=video_gop_size=1; done\n"
>>
>> Replace $dev by /dev/videoX
>>
>> Wouldn't it make more sense to default to this? And sho
Am Montag, den 11.07.2016, 19:05 +0800 schrieb Yakir Yang:
> RK3399 and RK3288 shared the same HDMI IP controller, only some light
> difference with GRF configure.
>
> Signed-off-by: Yakir Yang
Reviewed-by: Philipp Zabel
regards
Philipp
On 03.07.2016 03:24, Alexander Popov wrote:
> If an irq_domain is auto-recursive and irq_domain_alloc_irqs_recursive()
> for its parent has returned an error, then do return and avoid calling
> irq_domain_free_irqs_recursive() uselessly, because:
> - if domain->ops->alloc() had failed for an auto-r
Thanks for review Hans!
On Mon, Jul 11, 2016 at 07:58:38AM +0200, Hans Verkuil wrote:
> > +" v4l2-ctl --device $dev --set-ctrl=video_gop_size=1; done\n"
>
> Replace $dev by /dev/videoX
>
> Wouldn't it make more sense to default to this? And show the warning only if
> P-frames are enabled?
I bel
[I just realised Ctrl+enter means "send" for gmail, see the end of the answers]
On Mon, Jul 11, 2016 at 1:42 PM, Benjamin Tissoires
wrote:
> On Mon, Jul 11, 2016 at 5:20 AM, Zheng, Lv wrote:
>> Hi,
>>
>>> From: Benjamin Tissoires [mailto:benjamin.tissoi...@gmail.com]
>>> Subject: Re: [PATCH v2 4
On Mon 11-07-16 07:03:31, Jeff Layton wrote:
> On Mon, 2016-07-11 at 09:23 +0200, Michal Hocko wrote:
> > On Fri 08-07-16 10:27:38, Jeff Layton wrote:
> > > On Fri, 2016-07-08 at 16:23 +0200, Michal Hocko wrote:
> > > > On Fri 08-07-16 08:51:54, Jeff Layton wrote:
> > > > >
> > > > > On Fri, 2016-
On Fri, Jul 08, 2016 at 04:49:01PM +0100, Will Deacon wrote:
> On Fri, Jul 08, 2016 at 11:43:50AM -0400, Chris Metcalf wrote:
> > I am hopeful that this patch [1] can be picked up for the 4.8 merge window
> > in the arm64 tree. As I mentioned in my last patch series that included
> > this patch [2
On Mon, Jul 11, 2016 at 5:20 AM, Zheng, Lv wrote:
> Hi,
>
>> From: Benjamin Tissoires [mailto:benjamin.tissoi...@gmail.com]
>> Subject: Re: [PATCH v2 4/4] ACPI / button: Add document for ACPI control
>> method lid device restrictions
>>
>> Hi,
>>
>> On Thu, Jul 7, 2016 at 9:11 AM, Lv Zheng wrote:
Hi,
[auto build test WARNING on net-next/master]
[also build test WARNING on v4.7-rc7 next-20160711]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/sunil-kovvuri-gmail-com/net-thunderx-Add
Please add some commit messge text, e.g.
This patch adds a driver for the SoC-wide (AKA uncore) PMU hardware
found in APM X-Gene SoCs.
On Wed, Jul 06, 2016 at 05:07:24PM -0700, Tai Nguyen wrote:
> Signed-off-by: Tai Nguyen
Modulo that, and Paul's comments:
Reviewed-by: Mark Rutland
Thanks,
M
On Mon, Jul 11 2016, Baolin Wang wrote:
> Some gadget device (such as dwc3 gadget) requires quirk_ep_out_aligned_size
> attribute, which means it need to align the request buffer's size to an ep's
> maxpacketsize.
>
> Thus we add usb_ep_align_maybe() function to check if it is need to align
> the r
On Monday, July 11, 2016 1:15:11 PM CEST Arnd Bergmann wrote:
> On Monday, June 27, 2016 1:33:51 PM CEST Krzysztof Kozlowski wrote:
> > On 06/27/2016 01:02 PM, Arnd Bergmann wrote:
> > > The change to simplify of_platform_populate() had an unintended
> > > side-effect of introducing a build warning
On Fri, Jul 8, 2016 at 7:51 PM, Dmitry Torokhov
wrote:
> On Fri, Jul 08, 2016 at 11:17:39AM +0200, Benjamin Tissoires wrote:
>> Hi,
>>
>> On Thu, Jul 7, 2016 at 9:11 AM, Lv Zheng wrote:
>> > There are many AML tables reporting wrong initial lid state, and some of
>> > them never reports lid state
On Mon, 11 Jul 2016, Benjamin Tissoires wrote:
> Hmm, I think before this gets pushed to Linus' tree, we'll also need to
> have battery support for HID++ 1.0 devices too (upower seems to be
> handling them, so this would introduce a regression). So depending on
> how much work we can do, it mig
On 07/11/2016 05:15 AM, Theodore Ts'o wrote:
On Mon, Jul 11, 2016 at 09:59:54AM +0800, kernel test robot wrote:
FYI, we noticed the following commit:
https://github.com/0day-ci/linux
Vegard-Nossum/ext4-validate-number-of-clusters-in-group/20160708-041426
commit 5405511e1a984ab644fa9e29a0d3d95
On Mon, Jul 11, 2016 at 12:04:58PM +0100, Morten Rasmussen wrote:
> One alternative to setting ASYM_CAP bottom up would be to set it only
> where the asymmetry can be observed, and instead come up with a more
> complicated way of setting BALANCE_WAKE bottom up until and including
> the first level
On Jul 08 2016 or thereabouts, Jiri Kosina wrote:
> On Fri, 8 Jul 2016, Bastien Nocera wrote:
>
> > Sorry about not being able to test this before it was merged for
> > inclusion.
>
> This is just in a topic branch of hid.git as of now, so we can still tweak
> things (including API) if/as neede
There are many basic ways to control processes, including capabilities,
cgroups and resource limits. However, there are far fewer ways to find
out useful values for the limits, except blind trial and error.
Currently, there is no way to know which capabilities are actually used.
Even the source co
On Wed, Jun 22, 2016 at 06:03:18PM +0100, Morten Rasmussen wrote:
> Currently, SD_WAKE_AFFINE always takes priority over wakeup balancing if
> SD_BALANCE_WAKE is set on the sched_domains. For asymmetric
> configurations SD_WAKE_AFFINE is only desirable if the waking task's
> compute demand (utiliza
On Monday, June 27, 2016 1:33:51 PM CEST Krzysztof Kozlowski wrote:
> On 06/27/2016 01:02 PM, Arnd Bergmann wrote:
> > The change to simplify of_platform_populate() had an unintended
> > side-effect of introducing a build warning on s3c64xx:
> >
> > In file included from arch/arm/mach-s3c64xx/mach
From: Douglas Anderson
Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL. In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin. We believe that
lowering the bandwidth like this is safe given sufficient testing.
For RK3399 HDMI, there is an external clock need for HDMI PHY,
and it should keep the same clock rate with VOP DCLK.
VPLL have supported the clock for HDMI PHY, but there is no
clock divider bewteen VPLL and HDMI PHY. So we need to set the
VPLL rate manually in HDMI driver.
Signed-off-by: Yakir Y
在 7/8/2016 11:21 PM, Jiri Olsa 写道:
On Thu, Jul 07, 2016 at 09:49:36AM +0800, Song Shan Gong wrote:
SNIP
+ char *line = NULL;
+ size_t n;
+ char *sep;
+
+ module_name[len - 1] = '\0';
+ module_name += 1;
+ snprintf(path, PATH_MAX, "%s/sys/module/%s/sections
From: Douglas Anderson
The previous tables for mpll_cfg and curr_ctrl were created using the
20-pages of example settings provided by the PHY vendor. Those
example settings weren't particularly dense, so there were places
where we were guessing what the settings would be for 10-bit and
12-bit (n
Dut to the high HDMI signal voltage driver, Mickey have meet
a serious RF/EMI problem, so we decided to reduce HDMI signal
voltage to a proper value.
The default params for phy is cklvl = 20 & txlvl = 13 (RF/EMI failed)
ck: lvl = 13, term=100, vlo = 2.71, vhi=3.14, vswing = 0.43
tx: lvl = 20,
RK3399 and RK3288 shared the same HDMI IP controller, only some light
difference with GRF configure.
Signed-off-by: Yakir Yang
---
.../devicetree/bindings/display/bridge/dw_hdmi.txt | 1 +
.../bindings/display/rockchip/dw_hdmi-rockchip.txt | 3 +-
drivers/gpu/drm/bridge/dw-hdmi.c
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang
---
.../bindings/display/rockchip/dw_hdmi-rockchip.txt
Mark,
RK3399 and RK3288 shared the same HDMI IP controller, only some
light difference with GRF configure, and an external VPLL clock
need to configure.
Thanks,
- Yakir
Douglas Anderson (2):
drm/rockchip: dw_hdmi: Set cur_ctr to 0 always
drm/rockchip: dw_hdmi: Use auto-generated tables
Yak
On Mon, 2016-07-11 at 09:23 +0200, Michal Hocko wrote:
> On Fri 08-07-16 10:27:38, Jeff Layton wrote:
> > On Fri, 2016-07-08 at 16:23 +0200, Michal Hocko wrote:
> > > On Fri 08-07-16 08:51:54, Jeff Layton wrote:
> > > >
> > > > On Fri, 2016-07-08 at 14:22 +0200, Michal Hocko wrote:
> > > [...]
> >
On Mon, Jul 11, 2016 at 11:37:18AM +0100, Morten Rasmussen wrote:
> On Mon, Jul 11, 2016 at 12:04:49PM +0200, Peter Zijlstra wrote:
> > On Wed, Jun 22, 2016 at 06:03:16PM +0100, Morten Rasmussen wrote:
> > > Systems with the SD_ASYM_CPUCAPACITY flag set indicate that sched_groups
> > > at this leve
On Jul 08 2016 or thereabouts, Bastien Nocera wrote:
> On Fri, 2016-07-08 at 16:35 +0200, Bastien Nocera wrote:
> > On Wed, 2016-06-29 at 19:28 +1000, Peter Hutterer wrote:
> > > +static int hidpp_battery_get_property(struct power_supply *psy,
> > > + enum power_
On Fri, Jul 8, 2016 at 8:58 PM, Hugh Dickins wrote:
> Hi Dmitry,
>
> On Tue, 5 Jul 2016, Kirill A. Shutemov wrote:
>> On Mon, Jul 04, 2016 at 04:10:53PM -0700, Hugh Dickins wrote:
>> > On Fri, 1 Jul 2016, Dmitry Vyukov wrote:
>> > > Hello,
>> > >
>> > > I am getting the following crashes while run
On 09.07.2016 00:19, Alexey Khoroshilov wrote:
If adp5520_bl_setup() fails, sysfs group left unremoved.
By the way, fix overcomplicated assignement of error code.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov
Acked-by: Michael Hennerich
On Mon, 2016-07-11 at 03:20 +, Zheng, Lv wrote:
>
> > This worries me as there is no plan after "During the period the
> > userspace hasn't been switched to use the new event".
> >
> > I really hope you'll keep sending SW_LID for reliable LID
> > platforms,
> > and not remove it entirely as
Hi,
[auto build test ERROR on ia64/next]
[also build test ERROR on v4.7-rc7 next-20160711]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Alexey-Dobriyan/kbuild-simpler-generation-of-assembly
Hi,
[auto build test ERROR on ia64/next]
[also build test ERROR on v4.7-rc7 next-20160711]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Alexey-Dobriyan/kbuild-simpler-generation-of-assembly
On Tue, Mar 29, 2016 at 08:55:45PM +0200, Paul Kocialkowski wrote:
> The current TWL6030 code for the TWL PWM driver does not reliably disable the
> PWM output, as tested with LEDs. The previous commit to that driver introduced
> that regression.
>
> However, it does make sense to disable the PWM
On Jul 08 2016 or thereabouts, Bastien Nocera wrote:
> On Wed, 2016-06-29 at 19:28 +1000, Peter Hutterer wrote:
> > +static int hidpp_battery_get_property(struct power_supply *psy,
> > + enum power_supply_property psp,
> > + un
Add support to enable/disable the alpha pll using hwfsm
Signed-off-by: Rajendra Nayak
---
drivers/clk/qcom/clk-alpha-pll.c | 109 ++-
drivers/clk/qcom/clk-alpha-pll.h | 1 +
2 files changed, 98 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/qcom/cl
Hi,
This series adds some additional support to the clk-alpha-pll and the
clk-pll drivers in preperation to add the CPU clock driver support
on msm8996
regards,
Rajendra
Rajendra Nayak (6):
clk: Fix inconsistencies in usage of data types
clk: qcom: Add support for alpha pll hwfsm ops
clk:
Some PLLs can support an alpha mode, and a single alpha
register (instead of registers to program the M/N values),
the contents of which depend on the alpha mode selected.
(They are either treated as two's complement or M/N value)
Add support for this in the clk PLL driver.
Signed-off-by: Rajendra
Add a function to do initial configuration of the alpha plls
Signed-off-by: Rajendra Nayak
---
drivers/clk/qcom/clk-alpha-pll.c | 23 +++
drivers/clk/qcom/clk-alpha-pll.h | 13 +
2 files changed, 36 insertions(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/dr
Am Freitag, den 08.07.2016, 19:30 +0900 schrieb Masahiro Yamada:
> The difference between with/without _optional variants is WARN_ON(1)
> when CONFIG_RESET_CONTROLLER is not defined.
>
> Signed-off-by: Masahiro Yamada
Applied, thank you.
regards
Philipp
Some PLLs can support dynamic reprogramming, which means just a L value
change is whats needed to change the PLL frequency without having to
explicitly enable/disable or bypass/re-lock the PLL.
Add support for such PLLs' initial configuration and the ops needed to
support the dynamic reprogramming
> > Hi Marc,
> >
> > Thanks for the reply.
> >
> > From PCIe Spec:
> > MSI Enable Bit:
> > If 1 and the MSI-X Enable bit in the MSI-X Message
> > Control register (see Section 6.8.2.3) is 0, the
> > function is permitted to use MSI to request service
> > and is prohibited from using its INTx# pin.
Some PLLs can have an additional early output (apart from
the main and aux outputs). Add support for the PLL driver
so it can be used to initialize/configure the early output
Signed-off-by: Rajendra Nayak
---
drivers/clk/qcom/clk-pll.c | 2 ++
drivers/clk/qcom/clk-pll.h | 1 +
2 files changed, 3
index is of type u8 in all places except in clk_hw_get_parent_by_index()
and return value of all round_rate functions is long except for
clk_hw_round_rate(). Make them consistent with the rest of the places
Signed-off-by: Rajendra Nayak
---
drivers/clk/clk.c| 4 ++--
include/linux/cl
On Fri, Jul 08, 2016 at 09:55:14AM +0200, Jiri Olsa wrote:
> On Thu, Jul 07, 2016 at 05:04:34PM +0100, Mark Rutland wrote:
> > + if (!cpu_map__has(evsel->cpus, evlist_cpu))
> > + continue;
> > +
> > + cpu = cpu_map__idx(evsel->cpus, evlist_cpu);
>
> you basica
From: Suravee Suthikulpanit
This patch adds AMD IOMMU guest virtual APIC log (GALOG) handler.
When IOMMU hardware receives an interrupt targeting a blocking vcpu,
it creates an entry in the GALOG, and generates an interrupt to notify
the AMD IOMMU driver.
At this point, the driver processes the
From: Suravee Suthikulpanit
Introduce struct iommu_dev_data.use_vapic flag, which IOMMU driver
uses to determine if it should enable vAPIC support, by setting
the ga_mode bit in the device's interrupt remapping table entry.
Currently, it is enabled for all pass-through device if vAPIC mode
is en
From: Suravee Suthikulpanit
This patch adds support to detect and initialize IOMMU Guest vAPIC log
(GALOG). By default, it also enable GALog interrupt to notify IOMMU driver
when GA Log entry is created.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd_iommu_init.c | 112 +++
From: Suravee Suthikulpanit
This patch introduces a new IOMMU driver parameter, amd_iommu_guest_ir,
which can be used to specify different interrupt remapping mode for
passthrough devices to VM guest:
* legacy: Legacy interrupt remapping (w/ 32-bit IRTE)
* vapic : Guest vAPIC interrupt re
From: Suravee Suthikulpanit
This patch enables support for the new 128-bit IOMMU IRTE format,
which can be used for both legacy and vapic interrupt remapping modes.
It replaces the existing operations on IRTE, which can only support
the older 32-bit IRTE format, with calls to the new struct amd_i
Ping!!
> -Original Message-
> From: Nava kishore Manne
> Sent: Monday, June 27, 2016 6:18 PM
> To: 'Rob Herring'
> Cc: pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org; Michal Simek
> ; Soren Brinkmann ;
> ba...@ti.com; gre...@linuxfoundation
On Fri, Jul 08, 2016 at 05:29:11PM +0100, Eric Engestrom wrote:
> Signed-off-by: Eric Engestrom
> ---
>
> This can't compile without this macro… Is this header really used by anyone?
> Should it be removed, to avoid bit-rot?
Probably better to define something like:
#define SCTP_BITMAP_LEN
On Mon, Jul 11, 2016 at 11:55:23AM +0200, Peter Zijlstra wrote:
> On Wed, Jun 22, 2016 at 06:03:15PM +0100, Morten Rasmussen wrote:
> > Add a topology flag to the sched_domain hierarchy indicating
> > sched_groups at this sched_domain level having different per cpu
> > capacity (e.g. big.LITTLE big
Hi,
[auto build test ERROR on ia64/next]
[also build test ERROR on v4.7-rc7 next-20160711]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Alexey-Dobriyan/kbuild-simpler-generation-of-assembly
On 11/07/2016 12:33, Yang Zhang wrote:
> On 2016/7/11 17:17, Paolo Bonzini wrote:
>> On 11/07/2016 10:56, Yang Zhang wrote:
>>> On 2016/7/11 15:44, Paolo Bonzini wrote:
On 11/07/2016 08:06, Yang Zhang wrote:
If interrupt remapping is on, KVM_CAP_X2APIC_API is needed even with 8
VCP
On Mon, Jul 11, 2016 at 11:32:55AM +0100, Robin Murphy wrote:
> On 04/07/16 10:38, Peng Fan wrote:
> > Use devm_request_irq to simplify error handling path,
> > when probe smmu device.
> >
> > Also devm_{request|free}_irq when init or destroy domain context.
> >
> > Signed-off-by: Peng Fan
> > C
On Sun, Jul 10, 2016 at 05:47:37AM +0200, Christoph Hellwig wrote:
> On Wed, Jul 06, 2016 at 10:05:45AM +0200, Alexander Gordeev wrote:
> > > + pci_enable_msi, pci_enable_msi_range, pci_enable_msi_exact,
> > > pci_disable_msi,
> > > + pci_msi_vec_count, pci_enable_msix_range, pci_enable_msix_exact
Aufmerksamkeit;
Hiermit teilen wir Ihnen mit, dass als privates Unternehmen, Kredite
Unternehmen mit Sitz in Großbritannien (Um Financial Ltd). Wir geben Kredite in
Höhe von $ 10.000 bis $ 300.000.000 bei 2% Zinssatz für alle Interessierten.
Land ist kein Hindernis, so fühlen sich frei, mit uns
On Mon, Jul 11, 2016 at 12:04:49PM +0200, Peter Zijlstra wrote:
> On Wed, Jun 22, 2016 at 06:03:16PM +0100, Morten Rasmussen wrote:
> > Systems with the SD_ASYM_CPUCAPACITY flag set indicate that sched_groups
> > at this level or below do not include cpus of all capacities available
> > (e.g. group
On 2016/7/11 17:17, Paolo Bonzini wrote:
On 11/07/2016 10:56, Yang Zhang wrote:
On 2016/7/11 15:44, Paolo Bonzini wrote:
On 11/07/2016 08:06, Yang Zhang wrote:
Changes to MSI addresses follow the format used by interrupt remapping
unit.
The upper address word, that used to be 0, contains u
From: Fenghua Yu
Each cache is described by cacheinfo and is unique in the same index
across the platform. But there is no id for a cache. We introduce cache
ID to identify a cache.
Intel Cache Allocation Technology (CAT) allows some control on the
allocation policy within each cache that it con
On Mon, Jul 11, 2016 at 12:06:29PM +0200, Thierry Reding wrote:
> On Mon, Jul 11, 2016 at 11:56:23AM +0200, Thierry Reding wrote:
> > On Tue, May 03, 2016 at 10:56:50AM -0500, Franklin S Cooper Jr wrote:
> > > Replace unit address from 0 to the proper physical address. Also insure
> > > that the un
On Monday, July 11, 2016 6:28:57 PM CEST Wan ZongShun wrote:
> 2016-07-11 18:24 GMT+08:00 Arnd Bergmann :
> > On Monday, July 11, 2016 5:07:01 PM CEST Wan Zongshun wrote:
> >>
> >> On 2016年07月11日 16:03, Arnd Bergmann wrote:
> >> > On Sunday, July 10, 2016 3:27:26 PM CEST Wan Zongshun wrote:
> >> >>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.hotplug
head: 0e5de16e9e45b4d853a31761fd74ff56998169a1
commit: 6b808294c6cbb28925fee0fedceb23196efbc367 [9/66] perf/x86: Convert the
core to the hotplug state machine
config: x86_64-allyesconfig (attached as .config)
compile
On 04/07/16 10:38, Peng Fan wrote:
> Use devm_request_irq to simplify error handling path,
> when probe smmu device.
>
> Also devm_{request|free}_irq when init or destroy domain context.
>
> Signed-off-by: Peng Fan
> Cc: Will Deacon
> Cc: Robin Murphy
> ---
[...]
> @@ -2050,7 +2046,7 @@ static
On Sun, Jul 10, 2016 at 11:48:11AM -0700, Stephane Eranian wrote:
> So we either redirect ref-cycles towards 0x013c
> (cpu_clk_unhalted:xlck) or another event maybe
Another solution is us introducing (another) fake event, say 0x0400,
which will have a constrained mask of: 0x0F | (6 << 32) and vari
From: Fenghua Yu
This patch set introduces cache id to identify a cache in platform. It can
be useful in such areas as Cach Allocation Technology (CAT) where user
needs to specify how much cache is allocated on which cache. Cache id
provides a concise way to identify the cache. CAT patches will b
From: Fenghua Yu
Add an ABI document entry for /sys/devices/system/cpu/cpu*/cache/index*/id.
Signed-off-by: Fenghua Yu
Acked-by: Borislav Petkov
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/ABI/test
From: Fenghua Yu
Enable cache id in x86. Cache id comes from APIC ID and CPUID4.
Signed-off-by: Fenghua Yu
Acked-by: Borislav Petkov
---
arch/x86/kernel/cpu/intel_cacheinfo.c | 20
1 file changed, 20 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c
b/arc
On Mon, Jul 11, 2016 at 12:22:38PM +0530, Yendapally Reddy Dhananjaya Reddy
wrote:
> Hi Thierry,
>
> On Fri, Jul 8, 2016 at 8:46 PM, Thierry Reding
> wrote:
> > On Tue, Jul 05, 2016 at 02:00:25AM -0400, Yendapally Reddy Dhananjaya Reddy
> > wrote:
> >> Add support for the PWM controller presen
Hi , Ingo
On Fri, 2016-07-08 at 09:38 +0200, Ingo Molnar wrote:
> * Eric W. Biederman wrote:
>
> > Sigh. Can we please just do the work to rip out the apic shutdown code
> > from the
> > kexec on panic code path?
> >
> > I forgetting details but the only reason we have do any apic shutdown i
On Mon, Jul 11, 2016 at 11:57 AM, Andrey Ryabinin
wrote:
>
>
> On 07/10/2016 03:47 PM, Andy Lutomirski wrote:
>> Hi all-
>>
>> I found two nasty issues with virtually mapped stacks if KASAN is
>> enabled. The first issue is a crash: the first non-init stack is
>> allocated and accessed before KAS
2016-07-11 18:24 GMT+08:00 Arnd Bergmann :
> On Monday, July 11, 2016 5:07:01 PM CEST Wan Zongshun wrote:
>>
>> On 2016年07月11日 16:03, Arnd Bergmann wrote:
>> > On Sunday, July 10, 2016 3:27:26 PM CEST Wan Zongshun wrote:
>> >> + ret = of_property_read_string(np, "compatible",
>> >> &soc_dev_
On Wed 06-07-16 11:28:42, Viresh Kumar wrote:
> On 01-07-16, 12:22, Tejun Heo wrote:
> I enabled traces with '-e all' to look at everything happening on the
> CPU.
>
> Following is what starts in the middle of the delayed-work handler:
>
> kworker/0:1H-40[000] d..1 2994.918766: console:
On Monday 11 July 2016 02:49 PM, prahlad venkata wrote:
> On Mon, Jul 11, 2016 at 2:45 PM, Vignesh R wrote:
[...]
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 29ea8d2..6c61f54 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi
[Please don't top-post]
On 11/07/16 10:33, Bharat Kumar Gogada wrote:
> Hi Marc,
>
> Thanks for the reply.
>
> From PCIe Spec:
> MSI Enable Bit:
> If 1 and the MSI-X Enable bit in the MSI-X Message
> Control register (see Section 6.8.2.3) is 0, the
> function is permitted to use MSI to request s
On Monday, July 11, 2016 5:07:01 PM CEST Wan Zongshun wrote:
>
> On 2016年07月11日 16:03, Arnd Bergmann wrote:
> > On Sunday, July 10, 2016 3:27:26 PM CEST Wan Zongshun wrote:
> >> + ret = of_property_read_string(np, "compatible",
> >> &soc_dev_attr->soc_id);
> >> + if (ret)
> >>
On 2016/7/8 22:46, Jiri Olsa wrote:
On Wed, Jul 06, 2016 at 08:16:52PM +0800, Wangnan (F) wrote:
On 2016/7/6 19:36, Jiri Olsa wrote:
On Mon, Jul 04, 2016 at 06:20:03AM +, Wang Nan wrote:
SNIP
+struct perf_evlist *perf_evlist__new_aux(struct perf_evlist *parent)
+{
+ struct perf_
On Sun, 2016-03-07 at 20:31:53 UTC, Paul Gortmaker wrote:
> The Kconfig/Makefile currently controlling compilation of this code is:
>
> drivers/misc/cxl/Kconfig:config CXL_BASE
> drivers/misc/cxl/Kconfig: bool
>
> drivers/misc/cxl/Makefile:obj-$(CONFIG_CXL_BASE) += base.o
>
> ...m
On Wed, 2016-15-06 at 20:26:41 UTC, Greg Kurz wrote:
> A strange behaviour is observed when comparing PCI hotplug in QEMU, between
> x86 and pseries. If you consider the following steps:
> - start a VM
> - add a PCI device via the QEMU monitor before the rtasd has started (for
> example starting
On Wed, Jun 22, 2016 at 06:03:17PM +0100, Morten Rasmussen wrote:
> @@ -6905,11 +6906,19 @@ static int build_sched_domains(const struct cpumask
> *cpu_map,
> /* Attach the domains */
> rcu_read_lock();
> for_each_cpu(i, cpu_map) {
> + rq = cpu_rq(i);
> s
Hi Andrew,
Will this fixes series be able to make it for 4.7 ?
--
Regards
Kieran
On 29/06/16 06:00, Jan Kiszka wrote:
> On 2016-06-28 17:22, Kieran Bingham wrote:
>> Hi Andrew,
>>
>> Please consider this series for integration into the current rc series.
>> I had hoped to get this to you, with
On Fri, May 13, 2016 at 01:09:37PM +0200, Guillermo Rodriguez wrote:
> When disabling a PWM channel, the PWM clock was being stopped
> immediately after writing to PWM_DIS. As a result, the disabling
> of the PWM channel did not complete properly, and the PWM output
> might be left at the wrong lev
On Tue, Jul 5, 2016 at 1:34 PM, Jeff Layton wrote:
> On Thu, 2016-06-30 at 15:46 +0200, Andreas Gruenbacher wrote:
>> A richacl consists of an NFSv4 acl and an owner, group, and other mask.
>> These three masks correspond to the owner, group, and other file
>> permission bits, but they contain NFS
On 2016/7/11 15:43, Paolo Bonzini wrote:
On 11/07/2016 08:07, Yang Zhang wrote:
mutex_lock(&kvm->arch.apic_map_lock);
+kvm_for_each_vcpu(i, vcpu, kvm)
+if (kvm_apic_present(vcpu))
+max_id = max(max_id, kvm_apic_id(vcpu->arch.apic));
+
+new = kzalloc(sizeof(st
From: Suravee Suthikulpanit
Currently, IOMMU support two interrupt remapping table entry formats,
32-bit (legacy) and 128-bit (GA). The spec also implies that it might
support additional modes/formats in the future.
So, this patch introduces the new struct amd_irte_ops, which allows
the same cod
From: Suravee Suthikulpanit
This patch introduces avic_ga_log_notifier, which will be called
by IOMMU driver whenever it handles the Guest vAPIC (GA) log entry.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/svm.c | 60 ++
From: Suravee Suthikulpanit
Introduces a new IOMMU API, amd_iommu_update_ga(), which allows
KVM (SVM) to update existing posted interrupt IOMMU IRTE when
load/unload vcpu.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd_iommu.c | 63 +
d
From: Suravee Suthikulpanit
This patch implements update_pi_irte function hook to allow SVM
communicate to IOMMU driver regarding how to set up IRTE for handling
posted interrupt.
In case AVIC is enabled, during vcpu_load/unload, SVM needs to update
IOMMU IRTE with appropriate host physical APIC
Hi,
We can use mprotect to set read only or read/write.
mprotect_fixup()
vma_set_page_prot()
vm_pgprot_modify()
vm_get_page_prot()
protection_map[vm_flags &
(VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)]
The following code s
From: Suravee Suthikulpanit
This patch implements irq_set_vcpu_affinity() function to set up interrupt
remapping table entry with vapic mode for pass-through devices.
In case requirements for vapic mode are not met, it falls back to set up
the IRTE in legacy mode.
Signed-off-by: Suravee Suthiku
From: Suravee Suthikulpanit
Move existing unions and structs for accessing/managing IRTE to a proper
header file. This is mainly to simplify variable declarations in subsequent
patches.
Besides, this patch also introduces new struct irte_ga for the new
128-bit IRTE format.
Signed-off-by: Surave
From: Suravee Suthikulpanit
CHANGES FROM V2
===
* Introduce struct irte_ops to avoid redundant "if/else" logics
for handling different IRTE formats. (patch 3 and 4)
(per Joerg's suggestion)
* Introduce proper #defines for a few magic numbers.
(per Joerg's suggestion)
On Fri, Jul 08, 2016 at 09:28:03AM -0700, Tim Chen wrote:
>
> From: Tim Chen
> Subject: [PATCH] crypto: Cleanup sha multi-buffer code to use || instead of |
> for condition comparison and cleanup multiline comment style
>
> In sha*_ctx_mgr_submit, we currently use the | operator instead of ||
>
From: Sunil Goutham
88xx has 128 VFs, 81xx has 8 VFs and 83xx will have 32VFs.
Made changes to PF driver such that mailbox interrupt enable
registers are configuired based on number of VFs HW supports.
Also cleanedup mailbox irq handler registration code.
Signed-off-by: Sunil Goutham
---
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