[PATCH v3 05/14] ACPI: platform-msi: retrieve dev id from IORT

From: Hanjun Guo For devices connecting to ITS, it needs dev id to identify itself, and this dev id is represented in the IORT table in named componant node [1] for platform devices, so in this patch we will scan the IORT to retrieve device's dev id. Introduce

Re: [PATCH 1/1] kthread: fix possible infinite wait for parking when kthread exits meanwhile

Well. I was going to ignore this patch, I will leave this to Thomas anyway... But can't resist, because I have to admit I dislike this one too ;) On 10/25, Roman Pen wrote: > > int kthread_park(struct task_struct *k) > { > - struct kthread *kthread = to_live_kthread_and_get(k); > +

[PATCH v3 13/14] irqchip: mbigen: introduce mbigen_of_create_domain()

From: Kefeng Wang Introduce mbigen_of_create_domain() to consolidate OF related code and prepare for ACPI later. Signed-off-by: Kefeng Wang Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc:

[PATCH v3 03/14] ACPI: ARM64: IORT: add missing comment for iort_dev_find_its_id()

From: Hanjun Guo We are missing req_id's comment for iort_dev_find_its_id(), add it back. Signed-off-by: Hanjun Guo Cc: Lorenzo Pieralisi Cc: Tomasz Nowicki --- drivers/acpi/arm64/iort.c | 1 + 1

[PATCH v3 05/14] ACPI: platform-msi: retrieve dev id from IORT

From: Hanjun Guo For devices connecting to ITS, it needs dev id to identify itself, and this dev id is represented in the IORT table in named componant node [1] for platform devices, so in this patch we will scan the IORT to retrieve device's dev id. Introduce iort_pmsi_get_dev_id() with

Re: [PATCH 1/1] kthread: fix possible infinite wait for parking when kthread exits meanwhile

Well. I was going to ignore this patch, I will leave this to Thomas anyway... But can't resist, because I have to admit I dislike this one too ;) On 10/25, Roman Pen wrote: > > int kthread_park(struct task_struct *k) > { > - struct kthread *kthread = to_live_kthread_and_get(k); > +

[PATCH v3 03/14] ACPI: ARM64: IORT: add missing comment for iort_dev_find_its_id()

From: Hanjun Guo We are missing req_id's comment for iort_dev_find_its_id(), add it back. Signed-off-by: Hanjun Guo Cc: Lorenzo Pieralisi Cc: Tomasz Nowicki --- drivers/acpi/arm64/iort.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/acpi/arm64/iort.c

[PATCH v3 13/14] irqchip: mbigen: introduce mbigen_of_create_domain()

From: Kefeng Wang Introduce mbigen_of_create_domain() to consolidate OF related code and prepare for ACPI later. Signed-off-by: Kefeng Wang Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc: Thomas Gleixner Cc: Ma Jun --- drivers/irqchip/irq-mbigen.c | 42

[PATCH v3 08/14] ACPI: ARM64: IORT: rework iort_node_get_id()

From: Hanjun Guo iort_node_get_id() has two output, one is the mapped ids, the other is the referenced parent node which is returned from the function. For now we need a API just return its parent node for single mapping, so just update this function slightly then reuse

Re: [RFC 0/8] Define coherent device memory node

On Tue, Oct 25, 2016 at 09:56:35AM +0530, Aneesh Kumar K.V wrote: > Jerome Glisse writes: > > > On Mon, Oct 24, 2016 at 10:01:49AM +0530, Anshuman Khandual wrote: > > > >> [...] > > > >>Core kernel memory features like reclamation, evictions etc. might > >> need to be

[PATCH v3 12/14] irqchip: mbigen: drop module owner

From: Kefeng Wang Module owner will be set by driver core, so drop it. Signed-off-by: Kefeng Wang Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc: Thomas Gleixner Cc: Ma

[PATCH v3 12/14] irqchip: mbigen: drop module owner

From: Kefeng Wang Module owner will be set by driver core, so drop it. Signed-off-by: Kefeng Wang Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc: Thomas Gleixner Cc: Ma Jun --- drivers/irqchip/irq-mbigen.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/irqchip/irq-mbigen.c

[PATCH v3 08/14] ACPI: ARM64: IORT: rework iort_node_get_id()

From: Hanjun Guo iort_node_get_id() has two output, one is the mapped ids, the other is the referenced parent node which is returned from the function. For now we need a API just return its parent node for single mapping, so just update this function slightly then reuse it later.

Re: [RFC 0/8] Define coherent device memory node

On Tue, Oct 25, 2016 at 09:56:35AM +0530, Aneesh Kumar K.V wrote: > Jerome Glisse writes: > > > On Mon, Oct 24, 2016 at 10:01:49AM +0530, Anshuman Khandual wrote: > > > >> [...] > > > >>Core kernel memory features like reclamation, evictions etc. might > >> need to be restricted or modified

[PATCH v3 02/14] irqchip: gic-v3-its: keep the head file include in alphabetic order

From: Hanjun Guo The head file is strictly in alphabetic order now, so let's be the rule breaker. As acpi_iort.h includes acpi.h so remove the duplidate acpi.h inclusion as well. Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc:

[PATCH v3 02/14] irqchip: gic-v3-its: keep the head file include in alphabetic order

From: Hanjun Guo The head file is strictly in alphabetic order now, so let's be the rule breaker. As acpi_iort.h includes acpi.h so remove the duplidate acpi.h inclusion as well. Signed-off-by: Hanjun Guo Cc: Marc Zyngier Cc: Tomasz Nowicki --- drivers/irqchip/irq-gic-v3-its.c | 3 +-- 1

[PATCH v3 04/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_prepare()

From: Hanjun Guo Adding ACPI support for platform MSI, we need to retrieve the dev id in ACPI way instead of device tree, we already have a well formed function its_pmsi_prepare() to get the dev id but it's OF dependent, so collect OF related code and put them into a

[PATCH v21 1/9] fpga: add bindings document for fpga region

New bindings document for FPGA Region to support programming FPGA's under Device Tree control Signed-off-by: Alan Tull Signed-off-by: Moritz Fischer Reviewed-by: Rob Herring --- v9: initial version added to this patchset

[PATCH v21 1/9] fpga: add bindings document for fpga region

New bindings document for FPGA Region to support programming FPGA's under Device Tree control Signed-off-by: Alan Tull Signed-off-by: Moritz Fischer Reviewed-by: Rob Herring --- v9: initial version added to this patchset v10: s/fpga/FPGA/g replace DT overlay example with slightly more

[PATCH v3 04/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_prepare()

From: Hanjun Guo Adding ACPI support for platform MSI, we need to retrieve the dev id in ACPI way instead of device tree, we already have a well formed function its_pmsi_prepare() to get the dev id but it's OF dependent, so collect OF related code and put them into a single function to make

Re: [PATCH] mm: memcontrol: do not recurse in direct reclaim

On Tue 25-10-16 11:01:42, Johannes Weiner wrote: > On Tue, Oct 25, 2016 at 04:45:44PM +0200, Michal Hocko wrote: > > On Tue 25-10-16 10:10:50, Johannes Weiner wrote: > > > Like other direct reclaimers, mark tasks in memcg reclaim PF_MEMALLOC > > > to avoid recursing into any other form of direct

Re: [PATCH v2 2/8] IB/core: Replace semaphore sm_sem with completion

On 25 October 2016 at 18:13, Jack Wang wrote: > Hi Binoy, > > snip >> >> port->ib_dev = device; >> port->port_num = port_num; >> - sema_init(>sm_sem, 1); >> + init_completion(>sm_comp); >> + complete(>sm_comp); > > Why complete here? > >>

[PATCH v3 07/14] irqchip: gicv3-its: platform-msi: scan MADT to create platform msi domain

From: Hanjun Guo With the introduction of its_pmsi_init_one(), we can add some code on top for ACPI support of platform MSI. We are scanning the MADT table to get the ITS entry(ies), then use the information to create the platform msi domain for devices connect to it,

[PATCH v21 2/9] doc: fpga-mgr: add fpga image info to api

This patch adds a minor change in the FPGA Manager API to hold information that is specific to an FPGA image file. This change is expected to bring little, if any, pain. An FPGA image file will have particulars that affect how the image is programmed to the FPGA. One example is that current

[PATCH v3 01/14] ACPI: ARM64: IORT: minor cleanup for iort_match_node_callback()

From: Hanjun Guo Cleanup iort_match_node_callback() a little bit to reduce some lines of code, aslo fix the indentation in iort_scan_node(). Signed-off-by: Hanjun Guo Cc: Lorenzo Pieralisi Cc: Marc Zyngier

[PATCH v3 14/14] irqchip: mbigen: Add ACPI support

From: Hanjun Guo With the preparation of platform msi support and interrupt producer in DSDT, we can add mbigen ACPI support now. We are using _PRS methd to indicate number of irq pins instead of num_pins in DT to avoid _DSD usage in this case. For mbi-gen,

[PATCH v21 8/9] fpga: add altera freeze bridge support

Add a low level driver for Altera Freeze Bridges to the FPGA Bridge framework. A freeze bridge is a bridge that exists in the FPGA fabric to isolate one region of the FPGA from the busses while that one region is being reprogrammed. Signed-off-by: Alan Tull

[PATCH v21 2/9] doc: fpga-mgr: add fpga image info to api

This patch adds a minor change in the FPGA Manager API to hold information that is specific to an FPGA image file. This change is expected to bring little, if any, pain. An FPGA image file will have particulars that affect how the image is programmed to the FPGA. One example is that current

[PATCH v3 01/14] ACPI: ARM64: IORT: minor cleanup for iort_match_node_callback()

From: Hanjun Guo Cleanup iort_match_node_callback() a little bit to reduce some lines of code, aslo fix the indentation in iort_scan_node(). Signed-off-by: Hanjun Guo Cc: Lorenzo Pieralisi Cc: Marc Zyngier Cc: Tomasz Nowicki --- drivers/acpi/arm64/iort.c | 10 +++--- 1 file changed, 3

[PATCH v3 14/14] irqchip: mbigen: Add ACPI support

From: Hanjun Guo With the preparation of platform msi support and interrupt producer in DSDT, we can add mbigen ACPI support now. We are using _PRS methd to indicate number of irq pins instead of num_pins in DT to avoid _DSD usage in this case. For mbi-gen, Device(MBI0) {

[PATCH v21 8/9] fpga: add altera freeze bridge support

Add a low level driver for Altera Freeze Bridges to the FPGA Bridge framework. A freeze bridge is a bridge that exists in the FPGA fabric to isolate one region of the FPGA from the busses while that one region is being reprogrammed. Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach ---

Re: [PATCH] mm: memcontrol: do not recurse in direct reclaim

On Tue 25-10-16 11:01:42, Johannes Weiner wrote: > On Tue, Oct 25, 2016 at 04:45:44PM +0200, Michal Hocko wrote: > > On Tue 25-10-16 10:10:50, Johannes Weiner wrote: > > > Like other direct reclaimers, mark tasks in memcg reclaim PF_MEMALLOC > > > to avoid recursing into any other form of direct

Re: [PATCH v2 2/8] IB/core: Replace semaphore sm_sem with completion

On 25 October 2016 at 18:13, Jack Wang wrote: > Hi Binoy, > > snip >> >> port->ib_dev = device; >> port->port_num = port_num; >> - sema_init(>sm_sem, 1); >> + init_completion(>sm_comp); >> + complete(>sm_comp); > > Why complete here? > >>

[PATCH v3 07/14] irqchip: gicv3-its: platform-msi: scan MADT to create platform msi domain

From: Hanjun Guo With the introduction of its_pmsi_init_one(), we can add some code on top for ACPI support of platform MSI. We are scanning the MADT table to get the ITS entry(ies), then use the information to create the platform msi domain for devices connect to it, just like the PCI MSI for

Re: [PATCH 2/2] staging: vc04_services: Replace dmac_map_area with dmac_map_sg

On Mon, 2016-10-24 at 10:31 -0700, Eric Anholt wrote: > mzo...@crowfest.net writes: > > >  */ > >   > >  static int > >  create_pagelist(char __user *buf, size_t count, unsigned short > > type, > > - struct task_struct *task, PAGELIST_T ** ppagelist) > > + struct task_struct *task,

[PATCH v3 10/14] msi: platform: make platform_msi_create_device_domain() ACPI aware

From: Hanjun Guo With the platform msi domain created for ITS, irqchip such as mbi-gen connecting ITS, which needs ctreate its own irqdomain. Fortunately with the platform msi support upstreamed by Marc, we just need to add minor code to make it run properly.

[PATCH v21 9/9] fpga-manager: Add Socfpga Arria10 support

Add low level driver to support reprogramming FPGAs for Altera SoCFPGA Arria10. Signed-off-by: Alan Tull Reviewed-by: Moritz Fischer --- v19: Added to this patchset as has been changed to use fpga image information struct a

Re: [PATCH 2/2] staging: vc04_services: Replace dmac_map_area with dmac_map_sg

On Mon, 2016-10-24 at 10:31 -0700, Eric Anholt wrote: > mzo...@crowfest.net writes: > > >  */ > >   > >  static int > >  create_pagelist(char __user *buf, size_t count, unsigned short > > type, > > - struct task_struct *task, PAGELIST_T ** ppagelist) > > + struct task_struct *task,

[PATCH v3 10/14] msi: platform: make platform_msi_create_device_domain() ACPI aware

From: Hanjun Guo With the platform msi domain created for ITS, irqchip such as mbi-gen connecting ITS, which needs ctreate its own irqdomain. Fortunately with the platform msi support upstreamed by Marc, we just need to add minor code to make it run properly.

[PATCH v21 9/9] fpga-manager: Add Socfpga Arria10 support

Add low level driver to support reprogramming FPGAs for Altera SoCFPGA Arria10. Signed-off-by: Alan Tull Reviewed-by: Moritz Fischer --- v19: Added to this patchset as has been changed to use fpga image information struct a checkpatch fix of a block comment do not use clk_put

Re: [PATCH/RFT v2 09/17] regulator: fixed: Add over current event

On Tue, Oct 25, 2016 at 4:57 PM, Axel Haslam wrote: > On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote: >> On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote: >> >>> To be able to use regulator to handle the overcurrent pin, i need to be able

[PATCH v3 06/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare for ACPI

From: Hanjun Guo Introduce its_pmsi_init_one() to refactor the code to isolate ACPI common code to prepare for ACPI later. Signed-off-by: Hanjun Guo Tested-by: Sinan Kaya Cc: Marc Zyngier Cc: Tomasz

Re: [PATCH/RFT v2 09/17] regulator: fixed: Add over current event

On Tue, Oct 25, 2016 at 4:57 PM, Axel Haslam wrote: > On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote: >> On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote: >> >>> To be able to use regulator to handle the overcurrent pin, i need to be able >>> to somehow retrieve the over current

[PATCH v3 06/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare for ACPI

From: Hanjun Guo Introduce its_pmsi_init_one() to refactor the code to isolate ACPI common code to prepare for ACPI later. Signed-off-by: Hanjun Guo Tested-by: Sinan Kaya Cc: Marc Zyngier Cc: Tomasz Nowicki Cc: Thomas Gleixner --- drivers/irqchip/irq-gic-v3-its-platform-msi.c | 45

[PATCH 4/6] arm64: dts: ls1046a: add MSI dts node

LS1046a has three MSI controllers. each controller is assigned four SPI interrupts. Signed-off-by: Minghuan Lian --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 32 ++ 1 file changed, 32 insertions(+) diff --git

Re: [PATCH 2/2] staging: vc04_services: Replace dmac_map_area with dmac_map_sg

On Tue, 2016-10-25 at 08:00 -0700, Michael Zoran wrote: > On Mon, 2016-10-24 at 10:31 -0700, Eric Anholt wrote: > > mzo...@crowfest.net writes: > > > > >  */ > > >   > > >  static int > > >  create_pagelist(char __user *buf, size_t count, unsigned short > > > type, > > > - struct task_struct

[PATCH 4/6] arm64: dts: ls1046a: add MSI dts node

LS1046a has three MSI controllers. each controller is assigned four SPI interrupts. Signed-off-by: Minghuan Lian --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 32 ++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

Re: [PATCH 2/2] staging: vc04_services: Replace dmac_map_area with dmac_map_sg

On Tue, 2016-10-25 at 08:00 -0700, Michael Zoran wrote: > On Mon, 2016-10-24 at 10:31 -0700, Eric Anholt wrote: > > mzo...@crowfest.net writes: > > > > >  */ > > >   > > >  static int > > >  create_pagelist(char __user *buf, size_t count, unsigned short > > > type, > > > - struct task_struct

[PATCH] KVM: nVMX: support descriptor table exits

These are never used by the host, but they can still be reflected to the guest. Signed-off-by: Paolo Bonzini --- arch/x86/include/asm/vmx.h | 1 + arch/x86/include/uapi/asm/vmx.h | 4 arch/x86/kvm/vmx.c | 3 +++ 3 files changed, 8 insertions(+) diff

[PATCH] KVM: nVMX: support descriptor table exits

These are never used by the host, but they can still be reflected to the guest. Signed-off-by: Paolo Bonzini --- arch/x86/include/asm/vmx.h | 1 + arch/x86/include/uapi/asm/vmx.h | 4 arch/x86/kvm/vmx.c | 3 +++ 3 files changed, 8 insertions(+) diff --git

[tip:timers/urgent] timers: Lock base for same bucket optimization

Commit-ID: 4da9152a4308dcbf611cde399c695c359fc9145f Gitweb: http://git.kernel.org/tip/4da9152a4308dcbf611cde399c695c359fc9145f Author: Thomas Gleixner AuthorDate: Mon, 24 Oct 2016 11:55:10 +0200 Committer: Thomas Gleixner CommitDate: Tue, 25 Oct

[tip:timers/urgent] timers: Plug locking race vs. timer migration

Commit-ID: b831275a3553c32091222ac619cfddd73a5553fb Gitweb: http://git.kernel.org/tip/b831275a3553c32091222ac619cfddd73a5553fb Author: Thomas Gleixner AuthorDate: Mon, 24 Oct 2016 11:41:56 +0200 Committer: Thomas Gleixner CommitDate: Tue, 25 Oct

[tip:timers/urgent] timers: Lock base for same bucket optimization

Commit-ID: 4da9152a4308dcbf611cde399c695c359fc9145f Gitweb: http://git.kernel.org/tip/4da9152a4308dcbf611cde399c695c359fc9145f Author: Thomas Gleixner AuthorDate: Mon, 24 Oct 2016 11:55:10 +0200 Committer: Thomas Gleixner CommitDate: Tue, 25 Oct 2016 16:27:39 +0200 timers: Lock base

[tip:timers/urgent] timers: Plug locking race vs. timer migration

Commit-ID: b831275a3553c32091222ac619cfddd73a5553fb Gitweb: http://git.kernel.org/tip/b831275a3553c32091222ac619cfddd73a5553fb Author: Thomas Gleixner AuthorDate: Mon, 24 Oct 2016 11:41:56 +0200 Committer: Thomas Gleixner CommitDate: Tue, 25 Oct 2016 16:27:39 +0200 timers: Plug

Re: [PATCH] mm: memcontrol: do not recurse in direct reclaim

On Tue, Oct 25, 2016 at 04:45:44PM +0200, Michal Hocko wrote: > On Tue 25-10-16 10:10:50, Johannes Weiner wrote: > > Like other direct reclaimers, mark tasks in memcg reclaim PF_MEMALLOC > > to avoid recursing into any other form of direct reclaim. Then let > > recursive charges from PF_MEMALLOC

Re: [Patch v5 04/12] irqchip: xilinx: Add support for parent intc

On Tue, 2016-10-25 at 12:49:33 +0200, Thomas Gleixner wrote: > On Tue, 25 Oct 2016, Zubair Lutfullah Kakakhel wrote: > > On 10/21/2016 10:48 AM, Marc Zyngier wrote: > > > Shouldn't you return an error if irq is zero? > > > > > > > I'll add the following for the error case > > > >

Re: [PATCH] mm: memcontrol: do not recurse in direct reclaim

On Tue, Oct 25, 2016 at 04:45:44PM +0200, Michal Hocko wrote: > On Tue 25-10-16 10:10:50, Johannes Weiner wrote: > > Like other direct reclaimers, mark tasks in memcg reclaim PF_MEMALLOC > > to avoid recursing into any other form of direct reclaim. Then let > > recursive charges from PF_MEMALLOC

Re: [Patch v5 04/12] irqchip: xilinx: Add support for parent intc

On Tue, 2016-10-25 at 12:49:33 +0200, Thomas Gleixner wrote: > On Tue, 25 Oct 2016, Zubair Lutfullah Kakakhel wrote: > > On 10/21/2016 10:48 AM, Marc Zyngier wrote: > > > Shouldn't you return an error if irq is zero? > > > > > > > I'll add the following for the error case > > > >

[tip:timers/urgent] timers: Prevent base clock corruption when forwarding

Commit-ID: 6bad6bccf2d717f652d37e63cf261eaa23466009 Gitweb: http://git.kernel.org/tip/6bad6bccf2d717f652d37e63cf261eaa23466009 Author: Thomas Gleixner AuthorDate: Sat, 22 Oct 2016 11:07:37 + Committer: Thomas Gleixner CommitDate: Tue, 25 Oct

[tip:timers/urgent] timers: Prevent base clock rewind when forwarding clock

Commit-ID: 041ad7bc758db259bb960ef795197dd14aab19a6 Gitweb: http://git.kernel.org/tip/041ad7bc758db259bb960ef795197dd14aab19a6 Author: Thomas Gleixner AuthorDate: Sat, 22 Oct 2016 11:07:35 + Committer: Thomas Gleixner CommitDate: Tue, 25 Oct

[tip:timers/urgent] timers: Prevent base clock corruption when forwarding

Commit-ID: 6bad6bccf2d717f652d37e63cf261eaa23466009 Gitweb: http://git.kernel.org/tip/6bad6bccf2d717f652d37e63cf261eaa23466009 Author: Thomas Gleixner AuthorDate: Sat, 22 Oct 2016 11:07:37 + Committer: Thomas Gleixner CommitDate: Tue, 25 Oct 2016 16:32:50 +0200 timers: Prevent

[tip:timers/urgent] timers: Prevent base clock rewind when forwarding clock

Commit-ID: 041ad7bc758db259bb960ef795197dd14aab19a6 Gitweb: http://git.kernel.org/tip/041ad7bc758db259bb960ef795197dd14aab19a6 Author: Thomas Gleixner AuthorDate: Sat, 22 Oct 2016 11:07:35 + Committer: Thomas Gleixner CommitDate: Tue, 25 Oct 2016 16:32:50 +0200 timers: Prevent

[PATCH v21 0/9] Device Tree support for FPGA Programming

This patchset supports FPGA programming under the control of Device Tree overlays. Changes since v20 are minor: * s/Mangager/Manager/ * altera-hps2fpga bridge: remove a clk_put * altera-hps2fpga bridge: don't need to look up l3regs for f2h bridge The following were acked so they are no

[PATCH v21 4/9] fpga-mgr: add fpga image information struct

This patch adds a minor change in the FPGA Manager API to hold information that is specific to an FPGA image file. This change is expected to bring little, if any, pain. The socfpga and zynq drivers are fixed up in this patch. An FPGA image file will have particulars that affect how the image

Re: [PATCH/RFT v2 09/17] regulator: fixed: Add over current event

On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote: > On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote: > >> To be able to use regulator to handle the overcurrent pin, i need to be able >> to somehow retrieve the over current pin state from the regulator driver. > >

[PATCH v21 0/9] Device Tree support for FPGA Programming

This patchset supports FPGA programming under the control of Device Tree overlays. Changes since v20 are minor: * s/Mangager/Manager/ * altera-hps2fpga bridge: remove a clk_put * altera-hps2fpga bridge: don't need to look up l3regs for f2h bridge The following were acked so they are no

[PATCH v21 4/9] fpga-mgr: add fpga image information struct

This patch adds a minor change in the FPGA Manager API to hold information that is specific to an FPGA image file. This change is expected to bring little, if any, pain. The socfpga and zynq drivers are fixed up in this patch. An FPGA image file will have particulars that affect how the image

Re: [PATCH/RFT v2 09/17] regulator: fixed: Add over current event

On Tue, Oct 25, 2016 at 4:33 PM, Mark Brown wrote: > On Tue, Oct 25, 2016 at 02:55:48PM +0200, Axel Haslam wrote: > >> To be able to use regulator to handle the overcurrent pin, i need to be able >> to somehow retrieve the over current pin state from the regulator driver. > > What makes you say

[PATCH v21 6/9] fpga: fpga-region: device tree control for FPGA

FPGA Regions support programming FPGA under control of the Device Tree. Signed-off-by: Alan Tull --- v9: initial version (this patch added during rest of patchset's v9) v10: request deferral if fpga mgr or bridges not available yet cleanup as fpga manager core

[PATCH v21 6/9] fpga: fpga-region: device tree control for FPGA

FPGA Regions support programming FPGA under control of the Device Tree. Signed-off-by: Alan Tull --- v9: initial version (this patch added during rest of patchset's v9) v10: request deferral if fpga mgr or bridges not available yet cleanup as fpga manager core goes into the real kernel

[PATCH v21 5/9] fpga: add fpga bridge framework

This framework adds API functions for enabling/ disabling FPGA bridges under kernel control. This allows the Linux kernel to disable FPGA bridges during FPGA reprogramming and to enable FPGA bridges when FPGA reprogramming is done. This framework is be manufacturer-agnostic, allowing it to be

[PATCH v21 5/9] fpga: add fpga bridge framework

This framework adds API functions for enabling/ disabling FPGA bridges under kernel control. This allows the Linux kernel to disable FPGA bridges during FPGA reprogramming and to enable FPGA bridges when FPGA reprogramming is done. This framework is be manufacturer-agnostic, allowing it to be

[PATCH v21 7/9] ARM: socfpga: fpga bridge driver support

Supports Altera SOCFPGA bridges: * fpga2sdram * fpga2hps * hps2fpga * lwhps2fpga Allows enabling/disabling the bridges through the FPGA Bridge Framework API functions. The fpga2sdram driver only supports enabling and disabling of the ports that been configured early on. This is due to a

[PATCH v21 7/9] ARM: socfpga: fpga bridge driver support

Supports Altera SOCFPGA bridges: * fpga2sdram * fpga2hps * hps2fpga * lwhps2fpga Allows enabling/disabling the bridges through the FPGA Bridge Framework API functions. The fpga2sdram driver only supports enabling and disabling of the ports that been configured early on. This is due to a

[PATCH v21 3/9] add sysfs document for fpga bridge class

Add documentation for new FPGA bridge class's sysfs interface. Signed-off-by: Alan Tull Acked-by: Moritz Fischer -- v15: Document added in v15 of patch set v16: No change to this patch in v16 of patch set v17: No change to this patch in v17

[PATCH v21 3/9] add sysfs document for fpga bridge class

Add documentation for new FPGA bridge class's sysfs interface. Signed-off-by: Alan Tull Acked-by: Moritz Fischer -- v15: Document added in v15 of patch set v16: No change to this patch in v16 of patch set v17: No change to this patch in v17 of patch set v18: No change to this patch in v18 of

Re: [PATCH 01/10] mpt3sas: Fix for improper info displayed in var log, while blocking or unblocking the device.

On 20.10.2016 14:20, Suganath Prabu S wrote: > Return value and Device_handle Arguments passed in correct order > to match with its format string. > > Signed-off-by: Chaitra P B > Signed-off-by: Sathya Prakash > Signed-off-by: Suganath

Re: [PATCH 01/10] mpt3sas: Fix for improper info displayed in var log, while blocking or unblocking the device.

On 20.10.2016 14:20, Suganath Prabu S wrote: > Return value and Device_handle Arguments passed in correct order > to match with its format string. > > Signed-off-by: Chaitra P B > Signed-off-by: Sathya Prakash > Signed-off-by: Suganath Prabu S > --- Reviewed-by: Tomas Henzl Tomas

[PATCH 1/4] scripts/faddr2line: fix "size mismatch" error

I'm not sure how we missed this problem before. When I take a function address and size from an oops and give it to faddr2line, it usually complains about a size mismatch: $ scripts/faddr2line ~/k/vmlinux write_sysrq_trigger+0x51/0x60 skipping write_sysrq_trigger address at

[PATCH 1/4] scripts/faddr2line: fix "size mismatch" error

I'm not sure how we missed this problem before. When I take a function address and size from an oops and give it to faddr2line, it usually complains about a size mismatch: $ scripts/faddr2line ~/k/vmlinux write_sysrq_trigger+0x51/0x60 skipping write_sysrq_trigger address at

Re: [Patch v5 04/12] irqchip: xilinx: Add support for parent intc

On 25/10/16 15:44, Sören Brinkmann wrote: > On Tue, 2016-10-25 at 12:49:33 +0200, Thomas Gleixner wrote: >> On Tue, 25 Oct 2016, Zubair Lutfullah Kakakhel wrote: >>> On 10/21/2016 10:48 AM, Marc Zyngier wrote: Shouldn't you return an error if irq is zero? >>> >>> I'll add the following

Re: [Patch v5 04/12] irqchip: xilinx: Add support for parent intc

On 25/10/16 15:44, Sören Brinkmann wrote: > On Tue, 2016-10-25 at 12:49:33 +0200, Thomas Gleixner wrote: >> On Tue, 25 Oct 2016, Zubair Lutfullah Kakakhel wrote: >>> On 10/21/2016 10:48 AM, Marc Zyngier wrote: Shouldn't you return an error if irq is zero? >>> >>> I'll add the following

[PATCH 2/4] x86/dumpstack: remove kernel text addresses from stack dump

Printing kernel text addresses in stack dumps is of questionable value, especially now that address randomization is becoming common. It can be a security issue because it leaks kernel addresses. It also affects the usefulness of the stack dump. Linus says: "I actually spend time cleaning up

[PATCH 2/4] x86/dumpstack: remove kernel text addresses from stack dump

Printing kernel text addresses in stack dumps is of questionable value, especially now that address randomization is becoming common. It can be a security issue because it leaks kernel addresses. It also affects the usefulness of the stack dump. Linus says: "I actually spend time cleaning up

Re: [PATCH] mm: memcontrol: do not recurse in direct reclaim

On Tue 25-10-16 10:10:50, Johannes Weiner wrote: > On Tue, Oct 25, 2016 at 11:07:47AM +0200, Michal Hocko wrote: > > Acked-by: Michal Hocko > > Thank you. > > > I would prefer to have the PF_MEMALLOC condition in a check on its own > > with a short explanation that we really do

Re: [PATCH] mm: memcontrol: do not recurse in direct reclaim

On Tue 25-10-16 10:10:50, Johannes Weiner wrote: > On Tue, Oct 25, 2016 at 11:07:47AM +0200, Michal Hocko wrote: > > Acked-by: Michal Hocko > > Thank you. > > > I would prefer to have the PF_MEMALLOC condition in a check on its own > > with a short explanation that we really do not want to

[PATCH 4/4] mm: remove kernel address exposure in free_reserved_area()

Linus suggested we try to remove some of the low-hanging fruit related to kernel address exposure in dmesg. The only leaks I see on my local system are: Freeing SMP alternatives memory: 32K (9e309000 - 9e311000) Freeing initrd memory: 10588K (a0b736b42000 -

[PATCH 0/4] x86: fix kernel address printk exposures

These are some changes suggested by Linus to remove some kernel address exposures in printk. Most notably, the x86 stack dump no longer prints full kernel text addresses. There's also a fix for the faddr2line script which is used for converting a function offset into a source code file name and

[PATCH 3/4] x86/dumpstack: remove raw stack dump

For mostly historical reasons, the x86 oops dump shows the raw stack values: ... [registers] Stack: 880079af7350 880079905400 c98f3ae0 a0196610 0001 0001 87654321 0002

[PATCH 4/4] mm: remove kernel address exposure in free_reserved_area()

Linus suggested we try to remove some of the low-hanging fruit related to kernel address exposure in dmesg. The only leaks I see on my local system are: Freeing SMP alternatives memory: 32K (9e309000 - 9e311000) Freeing initrd memory: 10588K (a0b736b42000 -

[PATCH 0/4] x86: fix kernel address printk exposures

These are some changes suggested by Linus to remove some kernel address exposures in printk. Most notably, the x86 stack dump no longer prints full kernel text addresses. There's also a fix for the faddr2line script which is used for converting a function offset into a source code file name and

[PATCH 3/4] x86/dumpstack: remove raw stack dump

For mostly historical reasons, the x86 oops dump shows the raw stack values: ... [registers] Stack: 880079af7350 880079905400 c98f3ae0 a0196610 0001 0001 87654321 0002

Re: [PATCH 4/9] pinctrl: meson: allow gpio to request irq

On 25/10/16 15:22, Jerome Brunet wrote: > On Tue, 2016-10-25 at 14:38 +0100, Marc Zyngier wrote: >> On 25/10/16 14:08, Jerome Brunet wrote: >>> >>> On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote: > > On 25/10/16 10:14, Linus Walleij wrote: > > > On Fri, Oct 21,

Re: [v2 2/2] fpga: Add support for Lattice iCE40 FPGAs

On Tue, 25 Oct 2016, Joel Holdsworth wrote: > > > Hi Joel, > > > > Thanks for submitting your driver! > > > > I didn't see any huge problems, just minor things below... > > > > Alan > > > > Hi Alan, Thanks for your feedback. I've implemented all your suggestions and > I'll resubmit. > > I

Re: [PATCH 10/10] mpt3sas: Fix for Endianness issue.

On 20.10.2016 14:20, Suganath Prabu S wrote: > Use le16_to_cpu only for accessing two byte data provided by controller. > > Signed-off-by: Chaitra P B > Signed-off-by: Sathya Prakash > Signed-off-by: Suganath Prabu S

Re: [PATCH 4/9] pinctrl: meson: allow gpio to request irq

On 25/10/16 15:22, Jerome Brunet wrote: > On Tue, 2016-10-25 at 14:38 +0100, Marc Zyngier wrote: >> On 25/10/16 14:08, Jerome Brunet wrote: >>> >>> On Tue, 2016-10-25 at 11:38 +0100, Marc Zyngier wrote: > > On 25/10/16 10:14, Linus Walleij wrote: > > > On Fri, Oct 21,

Re: [v2 2/2] fpga: Add support for Lattice iCE40 FPGAs

On Tue, 25 Oct 2016, Joel Holdsworth wrote: > > > Hi Joel, > > > > Thanks for submitting your driver! > > > > I didn't see any huge problems, just minor things below... > > > > Alan > > > > Hi Alan, Thanks for your feedback. I've implemented all your suggestions and > I'll resubmit. > > I

Re: [PATCH 10/10] mpt3sas: Fix for Endianness issue.

On 20.10.2016 14:20, Suganath Prabu S wrote: > Use le16_to_cpu only for accessing two byte data provided by controller. > > Signed-off-by: Chaitra P B > Signed-off-by: Sathya Prakash > Signed-off-by: Suganath Prabu S Reviewed-by: Tomas Henzl Tomas

Re: [PATCH 09/10] mpt3sas: Use the new MPI 2.6 32-bit Atomic Request Descriptors for SAS35 devices.

On 20.10.2016 14:20, Suganath Prabu S wrote: > Support Atomic Request Descriptors for Ventura/SAS35 devices. > > Signed-off-by: Chaitra P B > Signed-off-by: Sathya Prakash > Signed-off-by: Suganath Prabu S

Re: [PATCH 09/10] mpt3sas: Use the new MPI 2.6 32-bit Atomic Request Descriptors for SAS35 devices.

On 20.10.2016 14:20, Suganath Prabu S wrote: > Support Atomic Request Descriptors for Ventura/SAS35 devices. > > Signed-off-by: Chaitra P B > Signed-off-by: Sathya Prakash > Signed-off-by: Suganath Prabu S > --- Reviewed-by: Tomas Henzl Tomas

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