Hi Ashok,
On Thu, Dec 22, 2016 at 03:45:08PM -0800, Raj, Ashok wrote:
> Hi Bjorn
>
> None in the platform group say they know about this. So i'm fairly sure
> we don't do that on Intel hardware (x86).
I'm pretty sure there was once an x86 prototype for which PCI bus
addresses were not identical
From: Colin Ian King
Trivial fixe to spelling mistake "Ivalid" to "Invalid" in
dev_err error message.
Signed-off-by: Colin Ian King
---
drivers/pinctrl/pinctrl-single.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinct
Hi James,
After merging the scsi tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/scsi/qedi/qedi_main.c: In function 'qedi_init':
drivers/scsi/qedi/qedi_main.c:2073:2: error: implicit declaration of function
'register_hotcpu_notifier' [-Werror=implicit-function-decl
From: Colin Ian King
Trivial fixes to spelling mistake "Ivalid" to "Invalid" in
brcmf_err error messages.
Signed-off-by: Colin Ian King
---
drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/b
On 12/22/2016 06:09 AM, Alexey Brodkin wrote:
> CONFIG_ARC_ICCM_SZ in menuconfig is specified in kB while
> "cpu->Xccm.sz" contains value in bytes thus direct comparison fails
> leading to boot-time panic like that:
> --->8-
> IDENTITY: ARCVER [0x52]
On 12/22/2016 06:09 AM, Alexey Brodkin wrote:
> It turned out current implementation of CCM support doesn't work at all.
> There're 2 isseus:
> * Data/code which is supposed to be in DCCM or ICCM accordingly gets
>merged in common .data and .text sections so CCMs won't be used
> * Kerenl will
On 12/22/2016 06:09 AM, Alexey Brodkin wrote:
> If Linux kernel is compiled with "-ffunction-sections" each function is
> placed in
> its own section named ".text.function_name". This is required for
> discarding of not-used functions during final linkage. But in the end
> all ".text.XXX" sections
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
> Clock enable/disable routine will get additional input parameter of
> pointer of array of clock struct's and clock count, it will use these
> pre initialized values to turn them up/down.
>
> Signed-off-by: Avaneesh Kumar Dwivedi
Look
On 12/22/2016 02:10 PM, Linus Torvalds wrote:
> Ok, so the numa issue was a red herring. With that fixed:
>
> On Thu, Dec 22, 2016 at 1:06 PM, Dave Chinner wrote:
>>
>> Better, but still bad. average files/s is not up to 200k files/s,
>> so still a good 10-15% off where it should be. xfs_repair i
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
> Regulator enable/disable routine will get additional input parameter
> of regulator info and count, It will read regulator info and will do
> appropriate voltage and load configuration before turning them up/down.
>
> Signed-off-by: Av
From: Chris Lapa
This commit adds the BQ27520G3 chip definition to specifically match the
bq27520-G3 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 44 +-
drivers/power/supply/bq27x
From: Chris Lapa
This commit adds the BQ27510G3 chip definition to specifically match the
bq27510-G3 functionality as described in the datasheet.
tested: yes
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 41 +-
drivers/power/supply/bq27
On 12/22/2016 5:02 AM, Bjorn Andersson wrote:
On Wed 21 Dec 19:16 PST 2016, Suman Anna wrote:
Hi Sarang,
On 12/15/2016 06:03 PM, Sarangdhar Joshi wrote:
The function wkup_m3_rproc_boot_thread waits for asynchronous
firmware loading to complete successfully before calling
rproc_boot(). The sam
From: Chris Lapa
This commit adds the BQ27520G4 chip definition to specifically match the
bq27520-G4 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 40 +-
drivers/power/supply/bq27x
Hannes Frederic Sowa wrote:
> A lockdep test should still be done. ;)
Adding might_lock() annotations will improve coverage a lot.
> Yes, that does look nice indeed. Accounting for bits instead of bytes
> shouldn't be a huge problem either. Maybe it gets a bit more verbose in
> case you can't sat
From: Chris Lapa
This commit adds the BQ27520G2 chip definition to specifically match the
bq27520-G2 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 44 +-
drivers/power/supply/bq27x
From: Chris Lapa
This commit adds the BQ27520G1 chip definition to specifically match the
bq27520-G1 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 43 +-
drivers/power/supply/bq27x
From: Chris Lapa
This commit adds the BQ27510G2 chip definition to specifically match the
bq27510-G2 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 44 +-
drivers/power/supply/bq27x
From: Chris Lapa
Separated the check out into its own function to make its functionality
easier to understand.
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/power/supply/bq27xxx
From: Chris Lapa
The bq275xx binding is a standard i2c style binding, however the
deprecated compatible fields and different revisions warrant its own
documentation.
Signed-off-by: Chris Lapa
---
.../devicetree/bindings/power/supply/bq275xx.txt | 27 ++
1 file changed, 27
From: Chris Lapa
This commit adds the BQ27510G1 chip definition to specifically match the
bq27510-G1 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 46 --
drivers/power/supply/bq27x
From: Chris Lapa
This patch series separates out support for each revision chip in
the bq27500, bq27510 and bq27520 family. Each revision has enough
register address changes to justify individual register mappings.
It also cleans up the large if statement checking the overtemp flags.
I had a ch
From: Chris Lapa
The BQ275XX definition exists only to satisfy backwards compatibility.
tested: yes
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 8
drivers/power/supply/bq27xxx_battery_i2c.c | 6 +++---
include/linux/power/bq27xxx_battery.h | 2 +-
From: Chris Lapa
This commit adds the BQ27500 chip definition to specifically match the
bq27500/1 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
---
drivers/power/supply/bq27xxx_battery.c | 44 +-
drivers/power/supply/bq27xxx_
On Fri, Dec 23, 2016 at 07:53:50AM +0800, Ming Lei wrote:
> On Fri, Dec 23, 2016 at 2:50 AM, Chris Leech wrote:
> > I'm not reproducing any problems with xfstests running over iscsi_tcp
> > right now. Two 10G luns exported from an LIO target, attached directly
> > to a test VM as sda/sdb and xfst
Assorted cleanups and fixes all over the place.
The following changes since commit e93b1cc8a8965da137ffea0b88e5f62fa1d2a9e6:
Merge branch 'for_linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs (2016-12-19
08:23:53 -0800)
are available in the git repository at:
Hi Suman,
On 12/21/2016 7:16 PM, Suman Anna wrote:
Hi Sarang,
On 12/15/2016 06:03 PM, Sarangdhar Joshi wrote:
The function wkup_m3_rproc_boot_thread waits for asynchronous
firmware loading to complete successfully before calling
rproc_boot(). The same can be achieved by just setting
rproc->aut
Good day dear
From: Colin Ian King
ralink_soc sould be assigned to RT3883_SOC, replace incorrect
comparision with assignment.
Signed-off-by: Colin Ian King
---
arch/mips/ralink/rt3883.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
On Fri, Dec 23, 2016 at 2:50 AM, Chris Leech wrote:
> On Thu, Dec 22, 2016 at 05:50:12PM +1100, Dave Chinner wrote:
>> On Wed, Dec 21, 2016 at 09:46:37PM -0800, Linus Torvalds wrote:
>> > On Wed, Dec 21, 2016 at 9:13 PM, Dave Chinner wrote:
>> > >
>> > > There may be deeper issues. I just started
On Sat, Dec 17 2016, Matthew Wilcox wrote:
> From: Matthew Wilcox
>> From: Rasmus Villemoes [mailto:li...@rasmusvillemoes.dk]
>> > This sounds good. I think there may still be a lot of users that never
>> > allocate more than a handful of IDAs, making a 128 byte allocation still
>> > somewhat exc
Hi Bjorn
None in the platform group say they know about this. So i'm fairly sure
we don't do that on Intel hardware (x86).
I'm not sure about the usage, it appears maybe it was a hack
pre-virtualization for some direct access? (just wild guessing)
On Thu, Dec 22, 2016 at 03:32:38PM -0800, Raj
Dear Joonsoo,
Joonsoo Kim writes:
> Anyway, I find that there is an issue in early boot phase in
> !CONFIG_SPARSEMEM. Could you try following one?
> (It's an completely untested patch, even I don't try to compile it.)
Finally got JTAG to work just enough to dive into this. Turned out to be
anot
Hi,
On Thu, Dec 22, 2016 at 11:42:26PM +0100, Pavel Machek wrote:
> On Thu 2016-12-22 15:32:44, Sebastian Reichel wrote:
> > Hi Pavel,
> >
> > On Thu, Dec 22, 2016 at 02:39:38PM +0100, Pavel Machek wrote:
> > > N900 contains front and back camera, with a switch between the
> > > two. This adds su
Hi Bjorn
On Thu, Dec 22, 2016 at 02:28:03PM -0600, Bjorn Helgaas wrote:
> On Thu, Dec 22, 2016 at 05:27:14PM +0100, Joerg Roedel wrote:
> > Hi Bjorn,
> >
> > On Mon, Dec 19, 2016 at 03:20:44PM -0600, Bjorn Helgaas wrote:
> > > I have some questions about dmar_init_reserved_ranges(). On systems
>
On 12/20/2016 4:27 AM, Paolo Bonzini wrote:
On 16/12/2016 22:00, Chris Metcalf wrote:
Sorry, I think I wasn't clear. Normally when you are running task
isolated and you enter the kernel, you will get a fatal signal. The
exception is if you call prctl itself (or exit), the kernel tolerates
it w
On Thu, Dec 22, 2016 at 11:45:21AM +0100, Vyacheslav V. Yurkov wrote:
> Use valid value for 'enabled' in status field
>
> Signed-off-by: Vyacheslav V. Yurkov
> ---
> Documentation/devicetree/bindings/net/can/m_can.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Docu
Hi,
On Thu, Dec 22, 2016 at 09:53:17PM +0100, Pavel Machek wrote:
> > 1. Settings must be applied before the streaming starts instead of
> > at probe time, since the settings may change (based one the selected
> > camera). That should be fairly easy to implement by just moving the
> > code to the
Hi,
On Wed, Dec 21, 2016 at 12:54:05PM -0500, Jonathan Toppins wrote:
> This patch allows a user to configure ACPI to be preferred over
> device-tree.
>
> Currently for ACPI to be used a user either has to set acpi=on on the
> kernel command line or make sure any device tree passed to the kernel
On Thu, Dec 22, 2016 at 10:55 PM, Dan Streetman wrote:
> On Sun, Dec 18, 2016 at 3:15 AM, Vitaly Wool wrote:
>> On Tue, Nov 29, 2016 at 11:39 PM, Andrew Morton
>> wrote:
>>> On Tue, 29 Nov 2016 17:33:19 -0500 Dan Streetman wrote:
>>>
On Sat, Nov 26, 2016 at 2:15 PM, Vitaly Wool wrote:
>>>
On Wed, Dec 21, 2016 at 11:18:33PM -0500, Geoff Lansberry wrote:
> The TRF7970A has configuration options for supporting hardware designs
> with 1.8 Volt or 3.3 Volt IO. This commit adds a device tree option,
> using a fixed regulator binding, for setting the io voltage to match
> the hardware co
On Wed, Dec 21, 2016 at 11:18:32PM -0500, Geoff Lansberry wrote:
> The TRF7970A has configuration options to support hardware designs
> which use a 27.12MHz clock. This commit adds a device tree option
> 'clock-frequency' to support configuring the this chip for default
> 13.56MHz clock or the opti
From: K. Y. Srinivasan
The host can rescind a channel that has been offered to the
guest and once the channel is rescinded, the host does not
respond to any requests on that channel. Deal with the case where
the guest may be blocked waiting for a response from the host.
Signed-off-by: K. Y. Srin
From: K. Y. Srinivasan
VSS may use a char device to support the communication between
the user level daemon and the driver. When the VSS channel is rescinded
we need to make sure that the char device is fully cleaned up before
we can process a new VSS offer from the host. Implement this logic.
S
On 12/22/2016 10:49 PM, Reza Arbab wrote:
> On Thu, Dec 22, 2016 at 06:52:45AM +0100, Heinrich Schuchardt wrote:
>> diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
>> index c9b5cac03b36..fd129b6e5396 100644
>> --- a/drivers/of/fdt.c
>> +++ b/drivers/of/fdt.c
>> @@ -1057,7 +1057,7 @@ int __init ear
From: K. Y. Srinivasan
Fcopy may use a char device to support the communication between
the user level daemon and the driver. When the Fcopy channel is rescinded
we need to make sure that the char device is fully cleaned up before
we can process a new Fcopy offer from the host. Implement this log
From: K. Y. Srinivasan
KVP may use a char device to support the communication between
the user level daemon and the driver. When the KVP channel is rescinded
we need to make sure that the char device is fully cleaned up before
we can process a new KVP offer from the host. Implement this logic.
S
From: K. Y. Srinivasan
Fix some rescind handling issues.
K. Y. Srinivasan (4):
Drivers: hv: vmbus: Fix a rescind handling bug
Drivers: hv: util: kvp: Fix a rescind processing issue
Drivers: hv: util: Fcopy: Fix a rescind processing issue
Drivers: hv: util: Backup: Fix a rescind processin
On Thu, Dec 22, 2016 at 05:13:27PM +1300, Chris Packham wrote:
> The Marvell 98DX3236, 98DX3336, 98DX4521 and variants are switch ASICs
> with integrated CPUs. They are similar to the Armada XP SoCs but have
> different I/O interfaces.
>
> Signed-off-by: Chris Packham
> ---
> .../devicetree/bind
Hi,
On Wed, Dec 21, 2016 at 04:03:40PM +0100, Alexander Stein wrote:
> This driver can only built into the kernel. So disallow driver bind/unbind
> and also prevent a kernel error in case DEBUG_TEST_DRIVER_REMOVE is
> enabled.
>
> Signed-off-by: Alexander Stein
> ---
> arch/arm/kernel/perf_even
On Thu, Dec 22, 2016 at 05:13:26PM +1300, Chris Packham wrote:
> From: Kalyan Kinthada
>
> This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
> from Marvell.
>
> Signed-off-by: Kalyan Kinthada
> Signed-off-by: Chris Packham
> ---
> .../pinctrl/marvell,armada-98dx3236-pinctr
On Thu, Dec 22, 2016 at 05:13:25PM +1300, Chris Packham wrote:
> Compared to the armada-xp the 98DX3336 uses different registers to set
> the boot address for the secondary CPU so a new enable-method is needed.
> This will only work if the machine definition doesn't define an overall
> smp_ops beca
On Thu 2016-12-22 15:32:44, Sebastian Reichel wrote:
> Hi Pavel,
>
> On Thu, Dec 22, 2016 at 02:39:38PM +0100, Pavel Machek wrote:
> > N900 contains front and back camera, with a switch between the
> > two. This adds support for the swich component.
> >
> > Signed-off-by: Sebastian Reichel
> > S
On Wed, Dec 21, 2016 at 10:29:52PM +0100, Peter Rosin wrote:
> It is possible to verify AC adapter presence via a register read, without
> any physical connection to the ACOK pin on the charger. Allow this.
>
> Signed-off-by: Peter Rosin
> ---
> Documentation/devicetree/bindings/power/supply/ti,
On Wed, Dec 21, 2016 at 12:33:51PM -0800, Rajat Jain wrote:
> Some onboard BT chips (e.g. Marvell 8997) contain a wakeup pin that
> can be connected to a gpio on the CPU side, and can be used to wakeup
> the host out-of-band. This can be useful in situations where the
> in-band wakeup is not possib
On Wed, Dec 21, 2016 at 04:24:42PM +0100, Andreas Klinger wrote:
> Add DT bindings for avia,hx711
> Add vendor avia to vendor list
>
> [PATCH v3 1/2] of this patch was Acked-by: Rob Herring
> Sorry, but i had to add the regulator (avdd-supply) and therefore it
> needs to be acked once again.
Th
On Thu, Dec 22, 2016 at 10:15:20AM +0100, Michal Hocko wrote:
>On Wed 21-12-16 23:30:33, Wei Yang wrote:
>> memblock_reserve() would add a new range to memblock.reserved in case the
>> new range is not totally covered by any of the current memblock.reserved
>> range. If the memblock.reserved is ful
On Fri, Dec 23, 2016 at 09:15:00AM +1100, Dave Chinner wrote:
> On Thu, Dec 22, 2016 at 01:10:19PM -0800, Linus Torvalds wrote:
> > Ok, so the numa issue was a red herring. With that fixed:
> >
> > On Thu, Dec 22, 2016 at 1:06 PM, Dave Chinner wrote:
> > >
> > > Better, but still bad. average fil
On Tue, Dec 20, 2016 at 05:09:45PM -0500, Murali Karicheri wrote:
> From: WingMan Kwok
>
> The 10GBASE-R Physical Coding Sublayer (PCS-R) module provides
> functionality of a physical coding sublayer (PCS) on data being
> transferred between a demuxed XGMII and SerDes supporting a 16
> or 32 bit
On Thu, 22 Dec 2016, Peter Zijlstra wrote:
> On Wed, Dec 21, 2016 at 03:43:43PM +0100, Michal Hocko wrote:
> > anon_vma locking is clever^Wsubtle as hell. CC Peter...
> >
> > On Tue 20-12-16 09:32:27, Dashi DS1 Cao wrote:
> > > I've collected four crash dumps with similar backtrace.
> > >
> > >
On Thu, Dec 22, 2016 at 01:10:19PM -0800, Linus Torvalds wrote:
> Ok, so the numa issue was a red herring. With that fixed:
>
> On Thu, Dec 22, 2016 at 1:06 PM, Dave Chinner wrote:
> >
> > Better, but still bad. average files/s is not up to 200k files/s,
> > so still a good 10-15% off where it sh
On Sun, 18 Dec 2016, Vegard Nossum wrote:
> Apart from adding the helper function itself, the rest of the kernel is
> converted mechanically using:
>
> git grep -l 'atomic_inc.*mm_count' | xargs sed -i
> 's/atomic_inc(&\(.*\)->mm_count);/mmgrab\(\1\);/'
> git grep -l 'atomic_inc.*mm_count' |
On Thu, Dec 22, 2016 at 02:57:07PM -0600, Rob Herring
wrote:
> On Sun, Dec 18, 2016 at 8:07 PM, Serge Semin wrote:
> > It's necessary to check whether retrieved from dts memory regions
> > fits to page alignment and limits restrictions. Sometimes it is
> > necessary to perform the same checks, b
On Sun, Dec 18, 2016 at 3:15 AM, Vitaly Wool wrote:
> On Tue, Nov 29, 2016 at 11:39 PM, Andrew Morton
> wrote:
>> On Tue, 29 Nov 2016 17:33:19 -0500 Dan Streetman wrote:
>>
>>> On Sat, Nov 26, 2016 at 2:15 PM, Vitaly Wool wrote:
>>> > Here come 2 patches with z3fold fixes for chunks counting an
On Thu, Dec 22, 2016 at 06:52:45AM +0100, Heinrich Schuchardt wrote:
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index c9b5cac03b36..fd129b6e5396 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -1057,7 +1057,7 @@ int __init early_init_dt_scan_memory(unsigned long node,
const char *u
It looks like this is ready. Should I take this in the IPMI tree, or is
there a better tree for it?
-corey
On 12/20/2016 01:15 AM, Andrew Jeffery wrote:
Hi Lee,
Here's v4 of the Aspeed LPC MFD devicetree bindings series. v3 can be found at:
https://lkml.org/lkml/2016/12/5/835
Changes si
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
> -static int q6v5_regulator_init(struct q6v5 *qproc)
> +static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
> + const struct qcom_mss_reg_res *reg_res)
> {
> - int ret;
> + int c
On Thu, Dec 22, 2016 at 08:17:19PM +0100, Michal Hocko wrote:
> TL;DR I still do not see what is going on here and it still smells like
> multiple issues. Please apply the patch below on _top_ of what you had.
I've run the usual procedure again with the new patch on top and the
log is now up at:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
> Certain regulators and clocks need voting by rproc on behalf of hexagon
> only during restart operation but certain clocks and voltage need to be
> voted till hexagon is up, these regulators and clocks are identified as
> proxy and acti
On 22.12.2016 22:11, George Spelvin wrote:
>> I do tend to like Ted's version in which we use batched
>> get_random_bytes() output. If it's fast enough, it's simpler and lets
>> us get the full strength of a CSPRNG.
>
> With the ChaCha20 generator, that's fine, although note that this abandons
>
And the patch to be fixed was merged via akpm, so adding him.
Fixes: 41a9ada3e6b4 ("of/fdt: mark hotpluggable memory")
-Frank
On 12/21/16 21:52, Heinrich Schuchardt wrote:
> scripts/get_maintainers.pl did not show the people involved in creating
> the code to be changed.
>
> On 12/22/2016 06:34
On Tue, Dec 20, 2016 at 05:09:44PM -0500, Murali Karicheri wrote:
> From: WingMan Kwok
>
> 10gbe phy driver needs to access the 10gbe subsystem control
> register during phy initialization. To facilitate the shared
> access of the subsystem register region between the 10gbe Ethernet
> driver and
On 12/22/2016 6:01 AM, Stephen Boyd wrote:
> On 12/21, Imran Khan wrote:
>> On 12/21/2016 4:20 AM, Stephen Boyd wrote:
>>>
>>> I'll wait to see what the next patch version has. We will
>>> probably need to have some way to know which ODM the kernel is
>>> running on, so we can interpret the platfor
On 12/17/2016 05:29 AM, Bhumika Goyal wrote:
> Declare rproc_ops structures as const as they are only passed as an
> argument to the function rproc_alloc. This argument is of type const, so
> rproc_ops structures having this property can be declared const too.
> Done using Coccinelle:
>
> @r1 disa
Add a pmdp_huge_clear_flush() stub for configs that don't define
CONFIG_TRANSPARENT_HUGEPAGE.
We use a WARN_ON_ONCE() instead of a BUILD_BUG() because in the DAX code at
least we do want this compile successfully even for configs without
CONFIG_TRANSPARENT_HUGEPAGE. It'll be a runtime decision wh
Currently dax_mapping_entry_mkclean() fails to clean and write protect the
pmd_t of a DAX PMD entry during an *sync operation. This can result in
data loss, as detailed in patch 4.
You can find a working tree here:
https://git.kernel.org/cgit/linux/kernel/git/zwisler/linux.git/log/?h=dax_pmd_cle
From: Dan Williams
The lack of common transparent-huge-page helpers for UML is becoming
increasingly painful for fs/dax.c now that it is growing more pmd
functionality. Add UML to the list of unsupported architectures.
Cc: Jan Kara
Cc: Christoph Hellwig
Cc: Dave Chinner
Cc: Dave Hansen
Cc: M
Currently dax_mapping_entry_mkclean() fails to clean and write protect the
pmd_t of a DAX PMD entry during an *sync operation. This can result in
data loss in the following sequence:
1) mmap write to DAX PMD, dirtying PMD radix tree entry and making the
pmd_t dirty and writeable
2) fsync, flus
On Tue, Dec 20, 2016 at 02:23:02PM -0600, David Lechner wrote:
> This adds the ti,da830-uart compatible string to serial 8250 UART bindings.
>
> Signed-off-by: David Lechner
> ---
> Documentation/devicetree/bindings/serial/8250.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
Similar to follow_pte(), follow_pte_pmd() allows either a PTE leaf or a
huge page PMD leaf to be found and returned.
Signed-off-by: Ross Zwisler
Suggested-by: Dave Hansen
---
include/linux/mm.h | 2 ++
mm/memory.c| 37 ++---
2 files changed, 32 insertion
On Tue, Dec 20, 2016 at 10:33:48PM +0530, Vivek Gautam wrote:
> Qualcomm chipsets have QUSB2 phy controller that provides
> HighSpeed functionality for DWC3 controller.
> Adding dt binding information for the same.
>
> Signed-off-by: Vivek Gautam
> ---
>
> Changes since v2:
> - Removed binding
Functionality of the xen-tpmfront driver was lost secondary to
the introduction of xenbus multi-page support in the following
commit:
ccc9d90a9a8b5c4ad7e9708ec41f75ff9e98d61d
xenbus_client: Extend interface to support multi-page ring
In this commit a pointer to the shared page address was being
Hi Cyrille,
[auto build test WARNING on cryptodev/master]
[also build test WARNING on next-20161222]
[cannot apply to v4.9]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Cyrille-Pitchen/crypto
> I do tend to like Ted's version in which we use batched
> get_random_bytes() output. If it's fast enough, it's simpler and lets
> us get the full strength of a CSPRNG.
With the ChaCha20 generator, that's fine, although note that this abandons
anti-backtracking entirely.
It also takes locks, so
Ok, so the numa issue was a red herring. With that fixed:
On Thu, Dec 22, 2016 at 1:06 PM, Dave Chinner wrote:
>
> Better, but still bad. average files/s is not up to 200k files/s,
> so still a good 10-15% off where it should be. xfs_repair is back
> down to 10-15% off where it should be, too. bu
On Fri, Dec 23, 2016 at 07:42:40AM +1100, Dave Chinner wrote:
> On Thu, Dec 22, 2016 at 09:24:12AM -0800, Linus Torvalds wrote:
> > On Wed, Dec 21, 2016 at 10:28 PM, Dave Chinner wrote:
> > >
> > > This sort of thing is normally indicative of a memory reclaim or
> > > lock contention problem. Prof
On Thu, 22 Dec 2016, Michal Hocko wrote:
> > Currently, when defrag is set to "madvise", thp allocations will direct
> > reclaim. However, when defrag is set to "defer", all thp allocations do
> > not attempt reclaim regardless of MADV_HUGEPAGE.
> >
> > This patch always directly reclaims for MA
On Tue, Dec 20, 2016 at 06:05:48PM +1030, Andrew Jeffery wrote:
> The System Control Unit IP block in the Aspeed SoCs is typically where
> the pinmux configuration is found, but not always. A number of pins
> depend on state in one of LPC Host Control (LHC) or SoC Display
> Controller (GFX) IP bloc
On Wed 21 Dec 19:16 PST 2016, Suman Anna wrote:
> Hi Sarang,
>
> On 12/15/2016 06:03 PM, Sarangdhar Joshi wrote:
> > The function wkup_m3_rproc_boot_thread waits for asynchronous
> > firmware loading to complete successfully before calling
> > rproc_boot(). The same can be achieved by just settin
On Tue, Dec 20, 2016 at 06:05:47PM +1030, Andrew Jeffery wrote:
> Reference the SoC-specific compatible string in the examples as
> required.
>
> Signed-off-by: Andrew Jeffery
> ---
> Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 11 ---
> 1 file changed, 8 insertions(+)
On Tue, Dec 20, 2016 at 05:45:34PM +1030, Andrew Jeffery wrote:
> The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends
> on bits in both the System Control Unit and the LPC Host Controller.
>
> The Aspeed LPC Host Controller is described as a child node of the
> LPC host-range
On Mon, 19 Dec 2016, Jiri Kosina wrote:
> > This is a couple of patches which fix issues with the (1292:4745)
> > Innomedia INNEX GENESIS/ATARI controller USB adapter. I've personally
> > tested these patches against the master of the hid tree.
> >
> > Patch 2 depends on patch 1.
> >
> > I wasn'
On Sun, Dec 18, 2016 at 8:07 PM, Serge Semin wrote:
> It's necessary to check whether retrieved from dts memory regions
> fits to page alignment and limits restrictions. Sometimes it is
> necessary to perform the same checks, but ito add the memory regions
s/ito/to/
> into a different subsystem.
Hi!
> > I see this needs dts documentation, anything else than needs to be
> > done?
>
> Yes. This driver takes care of the switch gpio, but the cameras also
> use different bus settings. Currently omap3isp gets the bus-settings
> from the link connected to the CCP2 port in DT at probe time (*).
This is mostly stuff which missed the initial pull. There's a new
driver: qedi, some ufs, ibmvscsis and ncr5380 updates plus some
assorted driver fixes and also a fix for the bug where if a device goes
into a blocked state between configuration and sysfs device add (which
can be a long time under
On Thu, Dec 22, 2016 at 09:24:12AM -0800, Linus Torvalds wrote:
> On Wed, Dec 21, 2016 at 10:28 PM, Dave Chinner wrote:
> >
> > This sort of thing is normally indicative of a memory reclaim or
> > lock contention problem. Profile showed unusual spinlock contention,
> > but then I realised there wa
Enable NAND flash on Sierra Wireless's WP8548 module used on MangOH
Green board. The patch set consists of device tree descriptions for
ADM DMA engine, NAND controller and NAND flash partitioned for
Sierra Wireless Legato framework, as well as definition of EBI2
clock used by NAND controller.
This
Rodolfo,
I'd like to get some feedback on what would be an upstreamable patch
series for correcting some issues with a 64-bit kernel and using a
32-bit userspace.
First issue is the compat_ioctl has to be sort of hacked since the
IOCTL defines are using pointer sizes in the macro generation (whic
On Wed, Nov 23, 2016 at 12:05 PM, Thomas Petazzoni
wrote:
> On Wed, 23 Nov 2016 11:12:32 +0200, Tomi Valkeinen wrote:
>> Or do you mean that we should keep the drivers in staging until there's
>> a matching DRM driver, but drop any plans to move the drivers from
>> staging to drivers/video/? If s
On Mon, Dec 19, 2016 at 01:15:52PM +0100, Jan Glauber wrote:
> Add description of Cavium Octeon and ThunderX SOC device tree bindings.
>
> CC: Ulf Hansson
> CC: Rob Herring
> CC: Mark Rutland
> CC: devicet...@vger.kernel.org
>
> Signed-off-by: Jan Glauber
> ---
> .../devicetree/bindings/mmc/
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