Re: [GIT PULL] scheduler changes for v4.11

* Peter Zijlstra wrote: > On Wed, Feb 22, 2017 at 08:51:44PM +, Matt Fleming wrote: > > On Wed, 22 Feb, at 12:41:01PM, Linus Torvalds wrote: > > > I think Peter has the fix for this somewhere, but it doesn't look like > > it made it to tip/sched/core. > > > > Peter,

Re: [GIT PULL] scheduler changes for v4.11

* Peter Zijlstra wrote: > On Wed, Feb 22, 2017 at 08:51:44PM +, Matt Fleming wrote: > > On Wed, 22 Feb, at 12:41:01PM, Linus Torvalds wrote: > > > I think Peter has the fix for this somewhere, but it doesn't look like > > it made it to tip/sched/core. > > > > Peter, this is the original

Re: [PATCH] x86: Implement __WARN using UD0

* Peter Zijlstra wrote: > 0016 : > 16: 55 push %rbp > 17: 8b 16 mov(%rsi),%edx > 19: 41 83 c8 ff or $0x,%r8d > 1d: 48 89 e5mov%rsp,%rbp > 20: 85 d2

Re: [PATCH] x86: Implement __WARN using UD0

* Peter Zijlstra wrote: > 0016 : > 16: 55 push %rbp > 17: 8b 16 mov(%rsi),%edx > 19: 41 83 c8 ff or $0x,%r8d > 1d: 48 89 e5mov%rsp,%rbp > 20: 85 d2 test

Re: [PATCH] /proc/kcore: Update physical address for kcore ram and text

CC Eric too. On 02/13/17 at 02:25pm, Kees Cook wrote: > On Mon, Jan 30, 2017 at 11:00 AM, Pratyush Anand wrote: > > CCing Andrew and Kees for their review comments. > > > > > > On Wednesday 25 January 2017 10:14 AM, Pratyush Anand wrote: > >> Currently all the p_paddr of

Re: [PATCH] /proc/kcore: Update physical address for kcore ram and text

CC Eric too. On 02/13/17 at 02:25pm, Kees Cook wrote: > On Mon, Jan 30, 2017 at 11:00 AM, Pratyush Anand wrote: > > CCing Andrew and Kees for their review comments. > > > > > > On Wednesday 25 January 2017 10:14 AM, Pratyush Anand wrote: > >> Currently all the p_paddr of PT_LOAD headers are

Re: [PATCH] docs: Make CodingStyle and SubmittingPatches symlinks

On Tue, Feb 14, 2017 at 02:34:38PM -0700, Jonathan Corbet wrote: > On Mon, 23 Jan 2017 08:34:58 -0200 > Mauro Carvalho Chehab wrote: > > > The main difference between a "pointer file" and a symlink is that the > > first indicates a temporary solution, teaching people

Re: [PATCH] docs: Make CodingStyle and SubmittingPatches symlinks

On Tue, Feb 14, 2017 at 02:34:38PM -0700, Jonathan Corbet wrote: > On Mon, 23 Jan 2017 08:34:58 -0200 > Mauro Carvalho Chehab wrote: > > > The main difference between a "pointer file" and a symlink is that the > > first indicates a temporary solution, teaching people that the > > file got

[ANNOUNCE] kmod 24

kmod 24 is out: ftp://ftp.kernel.org/pub/linux/utils/kernel/kmod/kmod-24.tar.xz ftp://ftp.kernel.org/pub/linux/utils/kernel/kmod/kmod-24.tar.sign - Improvements: - Add more information on dependency loop - Sanitize use of strcpy and allow to grow from small

[ANNOUNCE] kmod 24

kmod 24 is out: ftp://ftp.kernel.org/pub/linux/utils/kernel/kmod/kmod-24.tar.xz ftp://ftp.kernel.org/pub/linux/utils/kernel/kmod/kmod-24.tar.sign - Improvements: - Add more information on dependency loop - Sanitize use of strcpy and allow to grow from small

[PATCH v3 2/2] perf/sdt: Directly record SDT events with 'perf record'

From: Hemant Kumar Add support for directly recording SDT events which are present in the probe cache. Without this patch, we could probe into SDT events using 'perf probe' and 'perf record'. With this patch, we can probe the SDT events directly using 'perf record'.

[PATCH v3 2/2] perf/sdt: Directly record SDT events with 'perf record'

From: Hemant Kumar Add support for directly recording SDT events which are present in the probe cache. Without this patch, we could probe into SDT events using 'perf probe' and 'perf record'. With this patch, we can probe the SDT events directly using 'perf record'. For example : $ perf list

[PATCH v3 1/2] perf/sdt: Introduce util func is_sdt_event()

No Functionality changes. Signed-off-by: Ravi Bangoria --- tools/perf/util/probe-event.c | 9 + tools/perf/util/util.c| 12 tools/perf/util/util.h| 2 ++ 3 files changed, 15 insertions(+), 8 deletions(-) diff --git

[PATCH v3 0/2] perf/sdt: Directly record SDT events with 'perf record'

All events from 'perf list', except SDT events, can be directly recorded with 'perf record'. But, the flow is little different for SDT events. Probe point for SDT event needs to be created using 'perf probe' before recording it using 'perf record'. As suggested by Ingo[1], it's better to make

Re: [PATCH 2/2] selftests, x86, pkeys: test with random, unallocated protection keys

* Shuah Khan wrote: > On 02/23/2017 03:26 PM, Dave Hansen wrote: > > Shuah, I assume you'll take this patch in through the selftests tree. > > Yes I can do that. No, let's not do that please, we have a fix and a self-tests update, I'd like them to be next in the Git space.

[PATCH v3 1/2] perf/sdt: Introduce util func is_sdt_event()

No Functionality changes. Signed-off-by: Ravi Bangoria --- tools/perf/util/probe-event.c | 9 + tools/perf/util/util.c| 12 tools/perf/util/util.h| 2 ++ 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/tools/perf/util/probe-event.c

[PATCH v3 0/2] perf/sdt: Directly record SDT events with 'perf record'

All events from 'perf list', except SDT events, can be directly recorded with 'perf record'. But, the flow is little different for SDT events. Probe point for SDT event needs to be created using 'perf probe' before recording it using 'perf record'. As suggested by Ingo[1], it's better to make

Re: [PATCH 2/2] selftests, x86, pkeys: test with random, unallocated protection keys

* Shuah Khan wrote: > On 02/23/2017 03:26 PM, Dave Hansen wrote: > > Shuah, I assume you'll take this patch in through the selftests tree. > > Yes I can do that. No, let's not do that please, we have a fix and a self-tests update, I'd like them to be next in the Git space. I'll apply the

RE: [PATCH 0/9] tools subsystem refcounter conversions

> Em Thu, Feb 23, 2017 at 11:39:10AM +, Reshetova, Elena escreveu: > > > Em Wed, Feb 22, 2017 at 08:23:29PM -0300, Arnaldo Carvalho de Melo > > > escreveu: > > > > Em Tue, Feb 21, 2017 at 12:39:35PM -0300, Arnaldo Carvalho de Melo > > > escreveu: > > > > > Em Tue, Feb 21, 2017 at 05:34:54PM

RE: [PATCH 0/9] tools subsystem refcounter conversions

> Em Thu, Feb 23, 2017 at 11:39:10AM +, Reshetova, Elena escreveu: > > > Em Wed, Feb 22, 2017 at 08:23:29PM -0300, Arnaldo Carvalho de Melo > > > escreveu: > > > > Em Tue, Feb 21, 2017 at 12:39:35PM -0300, Arnaldo Carvalho de Melo > > > escreveu: > > > > > Em Tue, Feb 21, 2017 at 05:34:54PM

Re: [PATCH] /proc/kcore: Update physical address for kcore ram and text

Hi Andrew/Kees, On Tuesday 14 February 2017 07:16 AM, Pratyush Anand wrote: Well, CONFIG_PROC_KCORE is a generalized root KASLR exposure (though there are lots of such exposures). Why is the actual physical address needed? Can this just report the virtual address instead? Then the tool can

Re: [PATCH] /proc/kcore: Update physical address for kcore ram and text

Hi Andrew/Kees, On Tuesday 14 February 2017 07:16 AM, Pratyush Anand wrote: Well, CONFIG_PROC_KCORE is a generalized root KASLR exposure (though there are lots of such exposures). Why is the actual physical address needed? Can this just report the virtual address instead? Then the tool can

[PATCH] ASoC: atmel-classd: fix audio clock rate

Fix the audio clock rate according to the datasheet. Reported-by: Dushara Jayasinghe Signed-off-by: Songjun Wu --- sound/soc/atmel/atmel-classd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH] ASoC: atmel-classd: fix audio clock rate

Fix the audio clock rate according to the datasheet. Reported-by: Dushara Jayasinghe Signed-off-by: Songjun Wu --- sound/soc/atmel/atmel-classd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/atmel/atmel-classd.c b/sound/soc/atmel/atmel-classd.c index

Re: [tpmdd-devel] [PATCH v2 6/7] tpm: expose spaces via a device link /dev/tpms

On 02/17/2017 12:55 AM, Jarkko Sakkinen wrote: From: James Bottomley Currently the tpm spaces are not exposed to userspace. Make this exposure via a separate device, which can now be opened multiple times because each read/write transaction goes

Re: [tpmdd-devel] [PATCH v2 6/7] tpm: expose spaces via a device link /dev/tpms

On 02/17/2017 12:55 AM, Jarkko Sakkinen wrote: From: James Bottomley Currently the tpm spaces are not exposed to userspace. Make this exposure via a separate device, which can now be opened multiple times because each read/write transaction goes separately via the space. Concurrency is

[PATCH v2] mm/vmscan: fix high cpu usage of kswapd if there are no reclaimable pages

In a numa server, topology looks like available: 3 nodes (0,2-3) node 0 cpus: node 0 size: 0 MB node 0 free: 0 MB node 2 cpus: 0 1 2 3 4 5 6 7 node 2 size: 15299 MB node 2 free: 289 MB node 3 cpus: node 3 size: 15336 MB node 3 free: 184 MB node distances: node 0 2 3 0: 10 40 40 2: 40

[PATCH v2] mm/vmscan: fix high cpu usage of kswapd if there are no reclaimable pages

In a numa server, topology looks like available: 3 nodes (0,2-3) node 0 cpus: node 0 size: 0 MB node 0 free: 0 MB node 2 cpus: 0 1 2 3 4 5 6 7 node 2 size: 15299 MB node 2 free: 289 MB node 3 cpus: node 3 size: 15336 MB node 3 free: 184 MB node distances: node 0 2 3 0: 10 40 40 2: 40

[PATCH] PCI, pciehp: Reuse set_slot_off()

Now set_slot_off() is used in board_added() err path. We could reuse in remove_board. Also need to move green_led and attention_status out it. and make code more readable. Signed-off-by: Yinghai Lu --- drivers/pci/hotplug/pciehp_ctrl.c | 16 +++- 1 file

[PATCH] PCI, pciehp: Reuse set_slot_off()

Now set_slot_off() is used in board_added() err path. We could reuse in remove_board. Also need to move green_led and attention_status out it. and make code more readable. Signed-off-by: Yinghai Lu --- drivers/pci/hotplug/pciehp_ctrl.c | 16 +++- 1 file changed, 3

[PATCH] PCI,pciehp: Skip not changed command write

Notice two systems with different cpu hve different print out when power on slots: First one: pciehp :60:03.2:pcie004: pciehp_green_led_on: SLOTCTRL a8 write cmd 100 pciehp :60:03.2:pcie004: pciehp_set_attention_status: SLOTCTRL a8 write cmd c0 pciehp :60:03.2:pcie004: pending

[PATCH] PCI,pciehp: Skip not changed command write

Notice two systems with different cpu hve different print out when power on slots: First one: pciehp :60:03.2:pcie004: pciehp_green_led_on: SLOTCTRL a8 write cmd 100 pciehp :60:03.2:pcie004: pciehp_set_attention_status: SLOTCTRL a8 write cmd c0 pciehp :60:03.2:pcie004: pending

[PATCH] clk: zynqmp: fix itnull.cocci warnings

Iterator variable bound on line 220 cannot be NULL Generated by: scripts/coccinelle/iterators/itnull.cocci CC: Shubhrajyoti Datta Signed-off-by: Julia Lawall Signed-off-by: Fengguang Wu --- tree:

[PATCH] clk: zynqmp: fix itnull.cocci warnings

Iterator variable bound on line 220 cannot be NULL Generated by: scripts/coccinelle/iterators/itnull.cocci CC: Shubhrajyoti Datta Signed-off-by: Julia Lawall Signed-off-by: Fengguang Wu --- tree: https://github.com/Xilinx/linux-xlnx master head: 1741e191412444e3ab3308b407a9328186c248e4

Re: [Outreachy kernel] [PATCH v3 1/3] staging: wilc1000: Rename struct tstrRSSI to rssi_history_buffer

On Fri, 24 Feb 2017, Tahia Khan wrote: > Rename struct tstrRSSI to rssi_history_buffer for clarity and to remove camel > casing. Here the commit log messge line is definitely too long. julia > > Signed-off-by: Tahia Khan > --- >

Re: [Outreachy kernel] [PATCH v3 1/3] staging: wilc1000: Rename struct tstrRSSI to rssi_history_buffer

On Fri, 24 Feb 2017, Tahia Khan wrote: > Rename struct tstrRSSI to rssi_history_buffer for clarity and to remove camel > casing. Here the commit log messge line is definitely too long. julia > > Signed-off-by: Tahia Khan > --- > drivers/staging/wilc1000/coreconfigurator.h | 4 ++-- > 1

Re: [Outreachy kernel] [PATCH v3 2/3] staging: wilc1000: Rename tstrRSSI members and change type of u8Full to bool

On Fri, 24 Feb 2017, Tahia Khan wrote: > Remove Hungarian notation and camel casing from all tstrRSSI members' names. > Additionally, change type of u8Full to bool since it only takes values 1 or 0. Acked-by: Julia Lawall Maybe the second line of the commit message is a

Re: [Outreachy kernel] [PATCH v3 2/3] staging: wilc1000: Rename tstrRSSI members and change type of u8Full to bool

On Fri, 24 Feb 2017, Tahia Khan wrote: > Remove Hungarian notation and camel casing from all tstrRSSI members' names. > Additionally, change type of u8Full to bool since it only takes values 1 or 0. Acked-by: Julia Lawall Maybe the second line of the commit message is a little too long. It

Re: [Outreachy kernel] [PATCH v3 3/3] staging: wilc1000: Rename network_info member str_rssi to rssi_history

On Fri, 24 Feb 2017, Tahia Khan wrote: > Change name of str_rssi to rssi_history within the network_info struct for > clarity. > > Signed-off-by: Tahia Khan Acked-by: Julia Lawall Good job at cutting up the patch in a meaningful way. julia >

Re: [Outreachy kernel] [PATCH v3 3/3] staging: wilc1000: Rename network_info member str_rssi to rssi_history

On Fri, 24 Feb 2017, Tahia Khan wrote: > Change name of str_rssi to rssi_history within the network_info struct for > clarity. > > Signed-off-by: Tahia Khan Acked-by: Julia Lawall Good job at cutting up the patch in a meaningful way. julia > --- >

[PATCH] treewide: Remove remaining executable attributes from source files

These are the current source files that should not have executable attributes set. Signed-off-by: Joe Perches --- Normally this would be sent through Andrew Morton's tree but his quilt tools don't like permission only patches.

[PATCH] treewide: Remove remaining executable attributes from source files

These are the current source files that should not have executable attributes set. Signed-off-by: Joe Perches --- Normally this would be sent through Andrew Morton's tree but his quilt tools don't like permission only patches. Documentation/devicetree/bindings/sound/rt5665.txt | 0

[PATCH 1/3] btusb: wake system up when receives a wake irq

Currrently we are disabling this wake irq after receiving it. If this happens before we finish suspend and the pm event check is disabled, the system will continue suspending, and this irq would not work again. We may need to abort system suspend to avoid that. Signed-off-by: Jeffy Chen

[PATCH 1/3] btusb: wake system up when receives a wake irq

Currrently we are disabling this wake irq after receiving it. If this happens before we finish suspend and the pm event check is disabled, the system will continue suspending, and this irq would not work again. We may need to abort system suspend to avoid that. Signed-off-by: Jeffy Chen ---

[PATCH 2/3] btmrvl: wake system up when receives a wake irq

Currrently we are disabling this wake irq after receiving it. If this happens before we finish suspend and the pm event check is disabled, the system will continue suspending, and this irq would not work again. We may need to abort system suspend to avoid that. Signed-off-by: Jeffy Chen

[PATCH 3/3] mwifiex: wake system up when receives a wake irq

Currrently we are disabling this wake irq after receiving it. If this happens before we finish suspend and the pm event check is disabled, the system will continue suspending, and this irq would not work again. We may need to abort system suspend to avoid that. Signed-off-by: Jeffy Chen

[PATCH 2/3] btmrvl: wake system up when receives a wake irq

Currrently we are disabling this wake irq after receiving it. If this happens before we finish suspend and the pm event check is disabled, the system will continue suspending, and this irq would not work again. We may need to abort system suspend to avoid that. Signed-off-by: Jeffy Chen ---

[PATCH 3/3] mwifiex: wake system up when receives a wake irq

Currrently we are disabling this wake irq after receiving it. If this happens before we finish suspend and the pm event check is disabled, the system will continue suspending, and this irq would not work again. We may need to abort system suspend to avoid that. Signed-off-by: Jeffy Chen ---

Re: [PATCH V4 3/6] mm: move MADV_FREE pages into LRU_INACTIVE_FILE list

On Fri, Feb 24, 2017 at 10:49:39AM +0900, Minchan Kim wrote: > On Wed, Feb 22, 2017 at 10:50:41AM -0800, Shaohua Li wrote: > > madv MADV_FREE indicate pages are 'lazyfree'. They are still anonymous > > pages, but they can be freed without pageout. To destinguish them > > against normal anonymous

Re: [PATCH V4 3/6] mm: move MADV_FREE pages into LRU_INACTIVE_FILE list

On Fri, Feb 24, 2017 at 10:49:39AM +0900, Minchan Kim wrote: > On Wed, Feb 22, 2017 at 10:50:41AM -0800, Shaohua Li wrote: > > madv MADV_FREE indicate pages are 'lazyfree'. They are still anonymous > > pages, but they can be freed without pageout. To destinguish them > > against normal anonymous

Re: [PATCH V4 4/6] mm: reclaim MADV_FREE pages

On Fri, Feb 24, 2017 at 11:12:18AM +0900, Minchan Kim wrote: > On Wed, Feb 22, 2017 at 10:50:42AM -0800, Shaohua Li wrote: > > When memory pressure is high, we free MADV_FREE pages. If the pages are > > not dirty in pte, the pages could be freed immediately. Otherwise we > > can't reclaim them. We

Re: [PATCH V4 4/6] mm: reclaim MADV_FREE pages

On Fri, Feb 24, 2017 at 11:12:18AM +0900, Minchan Kim wrote: > On Wed, Feb 22, 2017 at 10:50:42AM -0800, Shaohua Li wrote: > > When memory pressure is high, we free MADV_FREE pages. If the pages are > > not dirty in pte, the pages could be freed immediately. Otherwise we > > can't reclaim them. We

Re: [PATCH 4/4] perf annotate: Introduce source_code to collect actual code

Hi Taeung, On Wednesday 22 February 2017 03:38 PM, Taeung Song wrote: > + INIT_LIST_HEAD(>src->code); > + > + while (!feof(file)) { > + int nr; > + char *c, *parsed_line; > + struct source_code *code; > + > + if (getline(, , file) < 0) { > +

Re: [PATCH 4/4] perf annotate: Introduce source_code to collect actual code

Hi Taeung, On Wednesday 22 February 2017 03:38 PM, Taeung Song wrote: > + INIT_LIST_HEAD(>src->code); > + > + while (!feof(file)) { > + int nr; > + char *c, *parsed_line; > + struct source_code *code; > + > + if (getline(, , file) < 0) { > +

[PATCH v3 2/3] staging: wilc1000: Rename tstrRSSI members and change type of u8Full to bool

Remove Hungarian notation and camel casing from all tstrRSSI members' names. Additionally, change type of u8Full to bool since it only takes values 1 or 0. Signed-off-by: Tahia Khan --- drivers/staging/wilc1000/coreconfigurator.h | 6 +++---

[PATCH v3 2/3] staging: wilc1000: Rename tstrRSSI members and change type of u8Full to bool

Remove Hungarian notation and camel casing from all tstrRSSI members' names. Additionally, change type of u8Full to bool since it only takes values 1 or 0. Signed-off-by: Tahia Khan --- drivers/staging/wilc1000/coreconfigurator.h | 6 +++---

[PATCH v3 3/3] staging: wilc1000: Rename network_info member str_rssi to rssi_history

Change name of str_rssi to rssi_history within the network_info struct for clarity. Signed-off-by: Tahia Khan --- drivers/staging/wilc1000/coreconfigurator.h | 2 +- drivers/staging/wilc1000/wilc_wfi_cfgoperations.c | 14 +++--- 2 files changed, 8

[PATCH v3 3/3] staging: wilc1000: Rename network_info member str_rssi to rssi_history

Change name of str_rssi to rssi_history within the network_info struct for clarity. Signed-off-by: Tahia Khan --- drivers/staging/wilc1000/coreconfigurator.h | 2 +- drivers/staging/wilc1000/wilc_wfi_cfgoperations.c | 14 +++--- 2 files changed, 8 insertions(+), 8 deletions(-)

[PATCH v3 0/3] staging: wilc1000: multiple coding style changes to struct tstrRSSI

Multiple coding style changes to struct tstrRSSI. Initially reported by checkpath.pl: Avoid CamelCase: Avoid CamelCase: Avoid CamelCase: Changes since v2: Renaming tstrRSSI and members with more descriptive names, as suggested by Arend Van Spriel Tahia

[PATCH v3 1/3] staging: wilc1000: Rename struct tstrRSSI to rssi_history_buffer

Rename struct tstrRSSI to rssi_history_buffer for clarity and to remove camel casing. Signed-off-by: Tahia Khan --- drivers/staging/wilc1000/coreconfigurator.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH v3 0/3] staging: wilc1000: multiple coding style changes to struct tstrRSSI

Multiple coding style changes to struct tstrRSSI. Initially reported by checkpath.pl: Avoid CamelCase: Avoid CamelCase: Avoid CamelCase: Changes since v2: Renaming tstrRSSI and members with more descriptive names, as suggested by Arend Van Spriel Tahia Khan (3): staging: wilc1000:

[PATCH v3 1/3] staging: wilc1000: Rename struct tstrRSSI to rssi_history_buffer

Rename struct tstrRSSI to rssi_history_buffer for clarity and to remove camel casing. Signed-off-by: Tahia Khan --- drivers/staging/wilc1000/coreconfigurator.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/wilc1000/coreconfigurator.h

Re: [PATCH v2 1/3] mtd: nand: Cleanup/rework the atmel_nand driver

On Tue, Feb 21, 2017 at 9:14 AM, Alexandre Belloni wrote: > On 21/02/2017 at 18:43:35 +0200, Andy Shevchenko wrote: >> >> Come on, v4.10 has just been release and >> >> It doesn't build anymore. And current case even worse >> Face it. It's dead. >> > > I

Re: [PATCH v2 1/3] mtd: nand: Cleanup/rework the atmel_nand driver

On Tue, Feb 21, 2017 at 9:14 AM, Alexandre Belloni wrote: > On 21/02/2017 at 18:43:35 +0200, Andy Shevchenko wrote: >> >> Come on, v4.10 has just been release and >> >> It doesn't build anymore. And current case even worse >> Face it. It's dead. >> > > I agree it hasn't seen any significant

Re: [PATCH V3 0/4] Define coherent device memory node

On Fri, Feb 24, 2017 at 09:06:19AM +0800, Bob Liu wrote: > On 2017/2/21 21:39, Anshuman Khandual wrote: > > On 02/21/2017 04:41 PM, Michal Hocko wrote: > >> On Fri 17-02-17 17:11:57, Anshuman Khandual wrote: > >> [...] > >>> * User space using mbind() to get CDM memory is an additional benefit >

Re: [PATCH V3 0/4] Define coherent device memory node

On Fri, Feb 24, 2017 at 09:06:19AM +0800, Bob Liu wrote: > On 2017/2/21 21:39, Anshuman Khandual wrote: > > On 02/21/2017 04:41 PM, Michal Hocko wrote: > >> On Fri 17-02-17 17:11:57, Anshuman Khandual wrote: > >> [...] > >>> * User space using mbind() to get CDM memory is an additional benefit >

[PATCH v4 15/24] openrisc: Add optimized memcpy routine

The generic memcpy routine provided in kernel does only byte copies. Using word copies we can lower boot time and cycles spend in memcpy quite significantly. Booting on my de0 nano I see boot times go from 7.2 to 5.6 seconds. The avg cycles in memcpy during boot go from 6467 to 1887. I tested

[PATCH v4 15/24] openrisc: Add optimized memcpy routine

The generic memcpy routine provided in kernel does only byte copies. Using word copies we can lower boot time and cycles spend in memcpy quite significantly. Booting on my de0 nano I see boot times go from 7.2 to 5.6 seconds. The avg cycles in memcpy during boot go from 6467 to 1887. I tested

[PATCH v4 16/24] openrisc: Add .gitignore

This helps to suppress the vmlinux.lds file. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 arch/openrisc/kernel/.gitignore diff --git a/arch/openrisc/kernel/.gitignore

[PATCH v4 16/24] openrisc: Add .gitignore

This helps to suppress the vmlinux.lds file. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 arch/openrisc/kernel/.gitignore diff --git a/arch/openrisc/kernel/.gitignore b/arch/openrisc/kernel/.gitignore new file mode

[PATCH v4 14/24] openrisc: Add optimized memset

From: Olof Kindgren This adds a hand-optimized assembler version of memset and sets __HAVE_ARCH_MEMSET to use this version instead of the generic C routine Signed-off-by: Olof Kindgren Signed-off-by: Stafford Horne ---

[PATCH v4 14/24] openrisc: Add optimized memset

From: Olof Kindgren This adds a hand-optimized assembler version of memset and sets __HAVE_ARCH_MEMSET to use this version instead of the generic C routine Signed-off-by: Olof Kindgren Signed-off-by: Stafford Horne --- arch/openrisc/include/asm/string.h | 7 +++

Re: [PATCH V3 0/4] Define coherent device memory node

On 02/23/2017 05:06 PM, Bob Liu wrote: On 2017/2/21 21:39, Anshuman Khandual wrote: On 02/21/2017 04:41 PM, Michal Hocko wrote: On Fri 17-02-17 17:11:57, Anshuman Khandual wrote: [...] Could you also explain why the transparent view is really better than using a device specific mmap (aka CDM

Re: [PATCH V3 0/4] Define coherent device memory node

On 02/23/2017 05:06 PM, Bob Liu wrote: On 2017/2/21 21:39, Anshuman Khandual wrote: On 02/21/2017 04:41 PM, Michal Hocko wrote: On Fri 17-02-17 17:11:57, Anshuman Khandual wrote: [...] Could you also explain why the transparent view is really better than using a device specific mmap (aka CDM

[PATCH v4 07/24] openrisc: add atomic bitops

From: Stefan Kristiansson This utilize the load-link/store-conditional l.lwa and l.swa instructions to implement the atomic bitops. When those instructions are not available emulation is provided. Cc: Peter Zijlstra Signed-off-by: Stefan

[PATCH v4 07/24] openrisc: add atomic bitops

From: Stefan Kristiansson This utilize the load-link/store-conditional l.lwa and l.swa instructions to implement the atomic bitops. When those instructions are not available emulation is provided. Cc: Peter Zijlstra Signed-off-by: Stefan Kristiansson [sho...@gmail.com: remove

[PATCH v4 06/24] openrisc: add l.lwa/l.swa emulation

From: Stefan Kristiansson This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. Signed-off-by: Stefan Kristiansson

[PATCH v4 06/24] openrisc: add l.lwa/l.swa emulation

From: Stefan Kristiansson This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. Signed-off-by: Stefan Kristiansson [sho...@gmail.com: Added delay slot pc adjust logic] Signed-off-by:

[PATCH v4 23/24] openrisc: Export ioremap symbols used by modules

Noticed this when building with allyesconfig. Got build failures due to iounmap and __ioremap symbols missing. This patch exports them so modules can use them. This is inline with other architectures. Signed-off-by: Stafford Horne --- arch/openrisc/mm/ioremap.c | 2 ++ 1

[PATCH v4 18/24] scripts/checkstack.pl: Add openrisc support

Openrisc stack pointer is managed by decrementing r1. Add regexes to recognize this. Signed-off-by: Stafford Horne --- scripts/checkstack.pl | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl index dd83978..eea5b78 100755 ---

[PATCH v4 23/24] openrisc: Export ioremap symbols used by modules

Noticed this when building with allyesconfig. Got build failures due to iounmap and __ioremap symbols missing. This patch exports them so modules can use them. This is inline with other architectures. Signed-off-by: Stafford Horne --- arch/openrisc/mm/ioremap.c | 2 ++ 1 file changed, 2

[PATCH v4 18/24] scripts/checkstack.pl: Add openrisc support

Openrisc stack pointer is managed by decrementing r1. Add regexes to recognize this. Signed-off-by: Stafford Horne --- scripts/checkstack.pl | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl index dd83978..eea5b78 100755 ---

[PATCH v4 08/24] openrisc: add cmpxchg and xchg implementations

From: Stefan Kristiansson Optimized version that make use of the l.lwa and l.swa atomic instruction pair. Most openrisc cores provide these instructions now, if not available emulation is provided. Cc: Peter Zijlstra Signed-off-by:

[PATCH v4 05/24] openrisc: head: refactor out tlb flush into it's own function

From: Stefan Kristiansson This brings it inline with the other setup oprations done like the cache enables _ic_enable and _dc_enable. Also, this is going to make it easier to initialize additional cpu's when smp is introduced. Signed-off-by: Stefan

[PATCH v4 08/24] openrisc: add cmpxchg and xchg implementations

From: Stefan Kristiansson Optimized version that make use of the l.lwa and l.swa atomic instruction pair. Most openrisc cores provide these instructions now, if not available emulation is provided. Cc: Peter Zijlstra Signed-off-by: Stefan Kristiansson [sho...@gmail.com: remove

[PATCH v4 05/24] openrisc: head: refactor out tlb flush into it's own function

From: Stefan Kristiansson This brings it inline with the other setup oprations done like the cache enables _ic_enable and _dc_enable. Also, this is going to make it easier to initialize additional cpu's when smp is introduced. Signed-off-by: Stefan Kristiansson [sho...@gmail.com: Added commit

[PATCH v4 21/24] openrisc: head: Move init strings to rodata section

The strings used during the head/init phase of openrisc bootup were stored in the executable section of the binary. This causes compilation to fail when using CONFIG_DEBUG_INFO with error: Error: unaligned opcodes detected in executable segment Also, this patch removes unused strings.

[PATCH v4 21/24] openrisc: head: Move init strings to rodata section

The strings used during the head/init phase of openrisc bootup were stored in the executable section of the binary. This causes compilation to fail when using CONFIG_DEBUG_INFO with error: Error: unaligned opcodes detected in executable segment Also, this patch removes unused strings.

[PATCH v4 24/24] openrisc: head: Init r0 to 0 on start

Originally openrisc spec 0 specified that r0 would be wired to ground. This is no longer the case. r0 is not guaranteed to be 0 at init, so we need to initialize it to 0 before using it. Also, if we are clearing r0 we cant use r0 to clear itself. Change the the CLEAR_GPR macro to use movhi for

[PATCH v4 24/24] openrisc: head: Init r0 to 0 on start

Originally openrisc spec 0 specified that r0 would be wired to ground. This is no longer the case. r0 is not guaranteed to be 0 at init, so we need to initialize it to 0 before using it. Also, if we are clearing r0 we cant use r0 to clear itself. Change the the CLEAR_GPR macro to use movhi for

[PATCH v4 19/24] openrisc: entry: Whitespace and comment cleanups

Cleanups to whitespace and add some comments. Reading through the delay slot logic I noticed some things: - Delay slot instructions were not indented - Some comments are not lined up - Use tabs and spaces consistent with other code No functional change Signed-off-by: Stafford Horne

[PATCH v4 22/24] arch/openrisc/lib/memcpy.c: use correct OR1200 option

From: Valentin Rothberg The Kconfig option for OR12000 is OR1K_1200. Signed-off-by: Valentin Rothberg Signed-off-by: Stafford Horne --- arch/openrisc/lib/memcpy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH v4 20/24] openrisc: entry: Fix delay slot detection

Use execption SR stored in pt_regs for detection, the current SR is not correct as the handler is running after return from exception. Also, The code that checks for a delay slot uses a flag bitmask and then wants to check if the result is not zero. The test it implemented was wrong. Correct it

[PATCH v4 19/24] openrisc: entry: Whitespace and comment cleanups

Cleanups to whitespace and add some comments. Reading through the delay slot logic I noticed some things: - Delay slot instructions were not indented - Some comments are not lined up - Use tabs and spaces consistent with other code No functional change Signed-off-by: Stafford Horne ---

[PATCH v4 22/24] arch/openrisc/lib/memcpy.c: use correct OR1200 option

From: Valentin Rothberg The Kconfig option for OR12000 is OR1K_1200. Signed-off-by: Valentin Rothberg Signed-off-by: Stafford Horne --- arch/openrisc/lib/memcpy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/openrisc/lib/memcpy.c b/arch/openrisc/lib/memcpy.c index

[PATCH v4 20/24] openrisc: entry: Fix delay slot detection

Use execption SR stored in pt_regs for detection, the current SR is not correct as the handler is running after return from exception. Also, The code that checks for a delay slot uses a flag bitmask and then wants to check if the result is not zero. The test it implemented was wrong. Correct it

[PATCH v4 17/24] MAINTAINERS: Add the openrisc official repository

The openrisc official repository and patch work happens currently on github. Add the repo for reference. Signed-off-by: Stafford Horne --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 187b961..57809d6 100644 --- a/MAINTAINERS

[PATCH v4 17/24] MAINTAINERS: Add the openrisc official repository

The openrisc official repository and patch work happens currently on github. Add the repo for reference. Signed-off-by: Stafford Horne --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 187b961..57809d6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS

[PATCH v4 12/24] openrisc: Fix the bitmask for the unit present register

From: Sebastian Macke The bits were swapped, as per spec and processor implementation the power management present bit is 9 and PIC bit is 8. This patch brings the definitions into spec. Signed-off-by: Sebastian Macke [sho...@gmail.com: Added commit

[PATCH v4 12/24] openrisc: Fix the bitmask for the unit present register

From: Sebastian Macke The bits were swapped, as per spec and processor implementation the power management present bit is 9 and PIC bit is 8. This patch brings the definitions into spec. Signed-off-by: Sebastian Macke [sho...@gmail.com: Added commit body] Signed-off-by: Stafford Horne ---

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