[PATCH 07/26] x86/kexec: support p4d_t

Handle additional page table level in kexec code. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/kexec.h | 1 + arch/x86/kernel/machine_kexec_32.c | 4 +++- arch/x86/kernel/machine_kexec_64.c | 14 -- 3 files changed, 16

[PATCH 21/26] x86/mm: add support of additional page table level during early boot

This patch adds support for 5-level paging during early boot. It generalizes boot for 4- and 5-level paging on 64-bit systems with compile-time switch between them. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/compressed/head_64.S | 23

[PATCH 07/26] x86/kexec: support p4d_t

Handle additional page table level in kexec code. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/kexec.h | 1 + arch/x86/kernel/machine_kexec_32.c | 4 +++- arch/x86/kernel/machine_kexec_64.c | 14 -- 3 files changed, 16 insertions(+), 3 deletions(-) diff --git

[PATCH 21/26] x86/mm: add support of additional page table level during early boot

This patch adds support for 5-level paging during early boot. It generalizes boot for 4- and 5-level paging on 64-bit systems with compile-time switch between them. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/compressed/head_64.S | 23 +-- arch/x86/include/asm/pgtable.h

[PATCH 20/26] x86/espfix: support 5-level paging

We don't need extra virtual address space for ESPFIX, so it stays within one PUD page table for both 4- and 5-level paging. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/espfix_64.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff

[PATCH 20/26] x86/espfix: support 5-level paging

We don't need extra virtual address space for ESPFIX, so it stays within one PUD page table for both 4- and 5-level paging. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/espfix_64.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git

Re: [PATCH] [media] atmel-isc: fix off-by-one comparison and out of bounds read issue

On 3/9/2017 18:57, Hans Verkuil wrote: Hi Songjun, On 08/03/17 03:25, Wu, Songjun wrote: Hi Colin, Thank you for your comment. It is a bug, will be fixed in the next patch. Do you mean that you will provide a new patch for this? Is there anything wrong with this patch? It seems reasonable

Re: [PATCH] [media] atmel-isc: fix off-by-one comparison and out of bounds read issue

On 3/9/2017 18:57, Hans Verkuil wrote: Hi Songjun, On 08/03/17 03:25, Wu, Songjun wrote: Hi Colin, Thank you for your comment. It is a bug, will be fixed in the next patch. Do you mean that you will provide a new patch for this? Is there anything wrong with this patch? It seems reasonable

Re: [PATCH v3 1/2] net: sched: make default fifo qdiscs appear in the dump

From: Jiri Kosina Date: Wed, 8 Mar 2017 16:03:32 +0100 (CET) > From: Jiri Kosina > > The original reason [1] for having hidden qdiscs (potential scalability > issues in qdisc_match_from_root() with single linked list in case of large > amount of qdiscs) has

[PATCH 06/26] x86/power: support p4d_t in hibernate code

set_up_temporary_text_mapping() and relocate_restore_code() require trivial adjustments to handle additional page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/power/hibernate_64.c | 49 ++- 1 file changed,

[PATCH 24/26] x86/mm: add support for 5-level paging for KASLR

With 5-level paging randomization happens on P4D level instead of PUD. Maximum amount of physical memory also bumped to 52-bits for 5-level paging. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/kaslr.c | 82

Re: [PATCH v3 1/2] net: sched: make default fifo qdiscs appear in the dump

From: Jiri Kosina Date: Wed, 8 Mar 2017 16:03:32 +0100 (CET) > From: Jiri Kosina > > The original reason [1] for having hidden qdiscs (potential scalability > issues in qdisc_match_from_root() with single linked list in case of large > amount of qdiscs) has been invalidated by 59cc1f61f0

[PATCH 06/26] x86/power: support p4d_t in hibernate code

set_up_temporary_text_mapping() and relocate_restore_code() require trivial adjustments to handle additional page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/power/hibernate_64.c | 49 ++- 1 file changed, 35 insertions(+), 14 deletions(-)

[PATCH 24/26] x86/mm: add support for 5-level paging for KASLR

With 5-level paging randomization happens on P4D level instead of PUD. Maximum amount of physical memory also bumped to 52-bits for 5-level paging. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/kaslr.c | 82 - 1 file changed, 63

[PATCH 19/26] x86/kasan: extend to support 5-level paging

This patch bring support for non-folded additional page table level. Signed-off-by: Kirill A. Shutemov Cc: Dmitry Vyukov

[PATCH 12/26] x86: convert the rest of the code to support p4d_t

This patch converts x86 to use proper folding of new page table level with . That's a bit of kitchen sink, but I don't see how to split it further. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/paravirt.h | 33 +-

[PATCH 19/26] x86/kasan: extend to support 5-level paging

This patch bring support for non-folded additional page table level. Signed-off-by: Kirill A. Shutemov Cc: Dmitry Vyukov = 5 && i < PTRS_PER_P4D; i++) + kasan_zero_p4d[i] = __p4d(p4d_val); + kasan_map_early_shadow(early_level4_pgt);

[PATCH 12/26] x86: convert the rest of the code to support p4d_t

This patch converts x86 to use proper folding of new page table level with . That's a bit of kitchen sink, but I don't see how to split it further. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/paravirt.h | 33 +- arch/x86/include/asm/paravirt_types.h | 12 ++-

[PATCH 17/26] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL

Extends pagetable headers to support new paging mode. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/pgtable_64.h | 11 +++ arch/x86/include/asm/pgtable_64_types.h | 20 +++ arch/x86/include/asm/pgtable_types.h| 10

[PATCH 26/26] x86/mm: allow to have userspace mappings above 47-bits

On x86, 5-level paging enables 56-bit userspace virtual address space. Not all user space is ready to handle wide addresses. It's known that at least some JIT compilers use higher bits in pointers to encode their information. It collides with valid pointers with 5-level paging and leads to

[PATCH 17/26] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL

Extends pagetable headers to support new paging mode. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/pgtable_64.h | 11 +++ arch/x86/include/asm/pgtable_64_types.h | 20 +++ arch/x86/include/asm/pgtable_types.h| 10 +- arch/x86/mm/pgtable.c

[PATCH 26/26] x86/mm: allow to have userspace mappings above 47-bits

On x86, 5-level paging enables 56-bit userspace virtual address space. Not all user space is ready to handle wide addresses. It's known that at least some JIT compilers use higher bits in pointers to encode their information. It collides with valid pointers with 5-level paging and leads to

[PATCH 23/26] x86/mm: make kernel_physical_mapping_init() support 5-level paging

Properly populate addition pagetable level if CONFIG_X86_5LEVEL is enabled. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 71 --- 1 file changed, 62 insertions(+), 9 deletions(-) diff --git

[PATCH 23/26] x86/mm: make kernel_physical_mapping_init() support 5-level paging

Properly populate addition pagetable level if CONFIG_X86_5LEVEL is enabled. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 71 --- 1 file changed, 62 insertions(+), 9 deletions(-) diff --git a/arch/x86/mm/init_64.c

[PATCH 05/26] x86/mm: add support of p4d_t in vmalloc_fault()

With 4-level paging copying happens on p4d level, as we have pgd_none() always false when p4d_t folded. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/fault.c | 27 --- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git

[PATCH 15/26] x86/mm: define virtual memory map for 5-level paging

The first part of memory map (up to %esp fixup) simply scales existing map for 4-level paging by factor of 9 -- number of bits addressed by additional page table level. The rest of the map is uncahnged. Signed-off-by: Kirill A. Shutemov ---

[PATCH 11/26] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d

Split these helpers few per-level functions and add p4d support. Signed-off-by: Xiong Zhang [kirill.shute...@linux.intel.com: split off into separate patch] Signed-off-by: Kirill A. Shutemov --- arch/x86/xen/mmu.c | 245

[PATCH 05/26] x86/mm: add support of p4d_t in vmalloc_fault()

With 4-level paging copying happens on p4d level, as we have pgd_none() always false when p4d_t folded. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/fault.c | 27 --- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/fault.c

[PATCH 15/26] x86/mm: define virtual memory map for 5-level paging

The first part of memory map (up to %esp fixup) simply scales existing map for 4-level paging by factor of 9 -- number of bits addressed by additional page table level. The rest of the map is uncahnged. Signed-off-by: Kirill A. Shutemov --- Documentation/x86/x86_64/mm.txt | 33

[PATCH 11/26] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d

Split these helpers few per-level functions and add p4d support. Signed-off-by: Xiong Zhang [kirill.shute...@linux.intel.com: split off into separate patch] Signed-off-by: Kirill A. Shutemov --- arch/x86/xen/mmu.c | 245 - arch/x86/xen/mmu.h

[PATCH 18/26] x86/dump_pagetables: support 5-level paging

Simple extension to support one more page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/dump_pagetables.c | 49 --- 1 file changed, 42 insertions(+), 7 deletions(-) diff --git

[PATCH 18/26] x86/dump_pagetables: support 5-level paging

Simple extension to support one more page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/dump_pagetables.c | 49 --- 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/arch/x86/mm/dump_pagetables.c

[PATCH 00/26] x86: 5-level paging enabling for v4.12

Here is v5 of 5-level paging patchset. Please review and consider applying. == Overview == x86-64 is currently limited to 256 TiB of virtual address space and 64 TiB of physical address space. We are already bumping into this limit: some vendors offers servers with 64 TiB of memory today. To

[PATCH 16/26] x86/paravirt: make paravirt code support 5-level paging

Add operations to allocate/release p4ds. Xen requires more work. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/paravirt.h | 44 +++ arch/x86/include/asm/paravirt_types.h | 7 +-

[PATCH 25/26] x86: enable 5-level paging support

Most of things are in place and we can enable support of 5-level paging. Enabling XEN with 5-level paging requires more work. The patch makes XEN dependent on !X86_5LEVEL. Signed-off-by: Kirill A. Shutemov --- arch/x86/Kconfig | 5 +

[PATCH 16/26] x86/paravirt: make paravirt code support 5-level paging

Add operations to allocate/release p4ds. Xen requires more work. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/paravirt.h | 44 +++ arch/x86/include/asm/paravirt_types.h | 7 +- arch/x86/include/asm/pgalloc.h| 2 ++

[PATCH 25/26] x86: enable 5-level paging support

Most of things are in place and we can enable support of 5-level paging. Enabling XEN with 5-level paging requires more work. The patch makes XEN dependent on !X86_5LEVEL. Signed-off-by: Kirill A. Shutemov --- arch/x86/Kconfig | 5 + arch/x86/xen/Kconfig | 1 + 2 files changed, 6

[PATCH 00/26] x86: 5-level paging enabling for v4.12

Here is v5 of 5-level paging patchset. Please review and consider applying. == Overview == x86-64 is currently limited to 256 TiB of virtual address space and 64 TiB of physical address space. We are already bumping into this limit: some vendors offers servers with 64 TiB of memory today. To

[PATCH 10/26] x86/kasan: prepare clear_pgds() to switch to

With folded p4d, pgd_clear() is nop. Change clear_pgds() to use p4d_clear() instead. Signed-off-by: Kirill A. Shutemov Cc: Dmitry Vyukov --- arch/x86/mm/kasan_init_64.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff

[PATCH 10/26] x86/kasan: prepare clear_pgds() to switch to

With folded p4d, pgd_clear() is nop. Change clear_pgds() to use p4d_clear() instead. Signed-off-by: Kirill A. Shutemov Cc: Dmitry Vyukov --- arch/x86/mm/kasan_init_64.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/x86/mm/kasan_init_64.c

[PATCH 22/26] x86/mm: add sync_global_pgds() for configuration with 5-level paging

This basically restores slightly modified version of original sync_global_pgds() which we had before foldedl p4d was introduced. The only modification is protection against 'address' overflow. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 37

[PATCH 22/26] x86/mm: add sync_global_pgds() for configuration with 5-level paging

This basically restores slightly modified version of original sync_global_pgds() which we had before foldedl p4d was introduced. The only modification is protection against 'address' overflow. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 37

[PATCH 14/26] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert

We don't need it anymore. 17be0aec74fb ("x86/asm/entry/64: Implement better check for canonical addresses") made canonical address check generic wrt. address width. Signed-off-by: Kirill A. Shutemov --- arch/x86/entry/entry_64.S | 7 ++- 1 file changed, 2

[PATCH 14/26] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert

We don't need it anymore. 17be0aec74fb ("x86/asm/entry/64: Implement better check for canonical addresses") made canonical address check generic wrt. address width. Signed-off-by: Kirill A. Shutemov --- arch/x86/entry/entry_64.S | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff

[PATCH 09/26] x86/mm/pat: handle additional page table

Straight-forward extension of existing code to support additional page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/pageattr.c | 56 -- 1 file changed, 41 insertions(+), 15 deletions(-) diff

[PATCH 09/26] x86/mm/pat: handle additional page table

Straight-forward extension of existing code to support additional page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/pageattr.c | 56 -- 1 file changed, 41 insertions(+), 15 deletions(-) diff --git a/arch/x86/mm/pageattr.c

[PATCH 04/26] x86/ident_map: add 5-level paging support

Nothing special: just handle one more level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/ident_map.c | 47 --- 1 file changed, 40 insertions(+), 7 deletions(-) diff --git a/arch/x86/mm/ident_map.c

[PATCH 08/26] x86/efi: handle p4d in EFI pagetables

Allocate additional page table level and change efi_sync_low_kernel_mappings() to make syncing logic work with additional page table level. Signed-off-by: Kirill A. Shutemov Reviewed-by: Matt Fleming --- arch/x86/platform/efi/efi_64.c

[PATCH 02/26] x86: trivial portion of 5-level paging conversion

This patch covers simple cases only. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/tboot.c| 6 +- arch/x86/kernel/vm86_32.c | 6 +- arch/x86/mm/fault.c| 39 +-- arch/x86/mm/init_32.c

[PATCH 08/26] x86/efi: handle p4d in EFI pagetables

Allocate additional page table level and change efi_sync_low_kernel_mappings() to make syncing logic work with additional page table level. Signed-off-by: Kirill A. Shutemov Reviewed-by: Matt Fleming --- arch/x86/platform/efi/efi_64.c | 33 +++-- 1 file changed, 23

[PATCH 02/26] x86: trivial portion of 5-level paging conversion

This patch covers simple cases only. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/tboot.c| 6 +- arch/x86/kernel/vm86_32.c | 6 +- arch/x86/mm/fault.c| 39 +-- arch/x86/mm/init_32.c | 22

[PATCH 04/26] x86/ident_map: add 5-level paging support

Nothing special: just handle one more level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/ident_map.c | 47 --- 1 file changed, 40 insertions(+), 7 deletions(-) diff --git a/arch/x86/mm/ident_map.c b/arch/x86/mm/ident_map.c index

[PATCH 01/26] x86: basic changes into headers for 5-level paging

This patch extends x86 headers to enable 5-level paging support. It's still based on . We will get to the point where we can have later. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/pgtable-2level_types.h | 1 +

[PATCH 01/26] x86: basic changes into headers for 5-level paging

This patch extends x86 headers to enable 5-level paging support. It's still based on . We will get to the point where we can have later. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/pgtable-2level_types.h | 1 + arch/x86/include/asm/pgtable-3level_types.h | 1 +

[PATCH 03/26] x86/gup: add 5-level paging support

It's simply extension for one more page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/gup.c | 33 +++-- 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c index

[PATCH 13/26] x86: detect 5-level paging support

5-level paging support is required from hardware when compiled with CONFIG_X86_5LEVEL=y. We may implement runtime switch support later. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/cpucheck.c | 9 + arch/x86/boot/cpuflags.c

[PATCH 03/26] x86/gup: add 5-level paging support

It's simply extension for one more page table level. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/gup.c | 33 +++-- 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c index 1f3b6ef105cd..456dfdfd2249 100644 ---

[PATCH 13/26] x86: detect 5-level paging support

5-level paging support is required from hardware when compiled with CONFIG_X86_5LEVEL=y. We may implement runtime switch support later. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/cpucheck.c | 9 + arch/x86/boot/cpuflags.c | 12 ++--

Re: [RESEND PATCH v3 4/7] PCI: dwc: all: Modify dbi accessors to take dbi_base as argument

Hi Niklas, On Friday 10 March 2017 09:17 PM, Niklas Cassel wrote: > > > On 03/10/2017 01:56 PM, Kishon Vijay Abraham I wrote: >> Hi Niklas, >> >> On Friday 10 March 2017 06:01 PM, Niklas Cassel wrote: >>> On 03/10/2017 12:36 PM, Kishon Vijay Abraham I wrote: Hi, On Thursday 09

Re: [RESEND PATCH v3 4/7] PCI: dwc: all: Modify dbi accessors to take dbi_base as argument

Hi Niklas, On Friday 10 March 2017 09:17 PM, Niklas Cassel wrote: > > > On 03/10/2017 01:56 PM, Kishon Vijay Abraham I wrote: >> Hi Niklas, >> >> On Friday 10 March 2017 06:01 PM, Niklas Cassel wrote: >>> On 03/10/2017 12:36 PM, Kishon Vijay Abraham I wrote: Hi, On Thursday 09

Re: [Outreachy kernel] [PATCH] staging: iio: ade7753: replace mlock with driver private lock

On Mon, Mar 13, 2017 at 09:28:34AM +0530, SIMRAN SINGHAL wrote: > On Mon, Mar 13, 2017 at 12:03 AM, Alison Schofield > wrote: > > On Sun, Mar 12, 2017 at 07:02:50PM +0530, simran singhal wrote: > >> The IIO subsystem is redefining iio_dev->mlock to be used by > >> the IIO

Re: [Outreachy kernel] [PATCH] staging: iio: ade7753: replace mlock with driver private lock

On Mon, Mar 13, 2017 at 09:28:34AM +0530, SIMRAN SINGHAL wrote: > On Mon, Mar 13, 2017 at 12:03 AM, Alison Schofield > wrote: > > On Sun, Mar 12, 2017 at 07:02:50PM +0530, simran singhal wrote: > >> The IIO subsystem is redefining iio_dev->mlock to be used by > >> the IIO core only for

[PATCH] tpm: Add sysfs interface to show TPM hardware version

From: Limeng So far, there is not a sysfs interface for user space code to check the TPM hardware version(TPM1.x or TPM2). So, add a file named description in /sys/class/tpm/tpmX/ to show it. Signed-off-by: Meng Li --- drivers/char/tpm/tpm-chip.c

[PATCH] mm, gup: fix typo in gup_p4d_range()

gup_p4d_range() should call gup_pud_range(), not itself. Signed-off-by: Kirill A. Shutemov Reported-by: Chris Packham Fixes: c2febafc6773 ("mm: convert generic code to 5-level paging") --- mm/gup.c | 2 +- 1 file changed, 1

Re: [RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

Hi, On Sunday 12 March 2017 02:48 PM, Vivek Gautam wrote: > Hi Kishon, > > > On Thu, Mar 9, 2017 at 5:26 PM, Kishon Vijay Abraham I wrote: >> Hi, >> >> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote: >>> Make the "samsung" directory and move the Samsung specific files

[PATCH] mm, gup: fix typo in gup_p4d_range()

gup_p4d_range() should call gup_pud_range(), not itself. Signed-off-by: Kirill A. Shutemov Reported-by: Chris Packham Fixes: c2febafc6773 ("mm: convert generic code to 5-level paging") --- mm/gup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mm/gup.c b/mm/gup.c index

Re: [RFC PATCH] phy: samsung: move the Samsung specific phy files to "samsung" directory

Hi, On Sunday 12 March 2017 02:48 PM, Vivek Gautam wrote: > Hi Kishon, > > > On Thu, Mar 9, 2017 at 5:26 PM, Kishon Vijay Abraham I wrote: >> Hi, >> >> On Thursday 09 March 2017 05:03 PM, Jaehoon Chung wrote: >>> Make the "samsung" directory and move the Samsung specific files to >>> there for

[PATCH] tpm: Add sysfs interface to show TPM hardware version

From: Limeng So far, there is not a sysfs interface for user space code to check the TPM hardware version(TPM1.x or TPM2). So, add a file named description in /sys/class/tpm/tpmX/ to show it. Signed-off-by: Meng Li --- drivers/char/tpm/tpm-chip.c | 85

Re: [PATCH] mm: mark gup_pud_range as unused

On Mon, Mar 13, 2017 at 04:58:37PM +1300, Chris Packham wrote: > The last caller to gup_pud_range was removed in commit c2febafc6773 > ("mm: convert generic code to 5-level paging"). Mark it as unused to > silence a warning from gcc. > > Signed-off-by: Chris Packham

Re: [PATCH] mm: mark gup_pud_range as unused

On Mon, Mar 13, 2017 at 04:58:37PM +1300, Chris Packham wrote: > The last caller to gup_pud_range was removed in commit c2febafc6773 > ("mm: convert generic code to 5-level paging"). Mark it as unused to > silence a warning from gcc. > > Signed-off-by: Chris Packham > --- > I saw this warning

Re: memfill v2 now with ARM and x86 implementations

Hi Matthew, On Sat, Mar 11, 2017 at 06:56:40AM -0800, Matthew Wilcox wrote: > On Mon, Feb 06, 2017 at 12:16:44AM +0900, Minchan Kim wrote: > > +static inline void zram_fill_page(char *ptr, unsigned long len, > > + unsigned long value) > > +{ > > + int i; > > +

Re: memfill v2 now with ARM and x86 implementations

Hi Matthew, On Sat, Mar 11, 2017 at 06:56:40AM -0800, Matthew Wilcox wrote: > On Mon, Feb 06, 2017 at 12:16:44AM +0900, Minchan Kim wrote: > > +static inline void zram_fill_page(char *ptr, unsigned long len, > > + unsigned long value) > > +{ > > + int i; > > +

Re: [PATCH 1/7] regulator: max1586: Constify regulator_ops

Dear all, All patches in this series looks good to me. Reviewed-by: Chanwoo Choi Best Regards, Chanwoo Choi On 2017년 03월 12일 04:01, Krzysztof Kozlowski wrote: > Static struct regulator_ops is not modified so can be made const for > code safeness. > > Signed-off-by:

Re: [PATCH 1/7] regulator: max1586: Constify regulator_ops

Dear all, All patches in this series looks good to me. Reviewed-by: Chanwoo Choi Best Regards, Chanwoo Choi On 2017년 03월 12일 04:01, Krzysztof Kozlowski wrote: > Static struct regulator_ops is not modified so can be made const for > code safeness. > > Signed-off-by: Krzysztof Kozlowski > ---

Re: [PATCH v2] mtd: Fix mtdblock for >4GB MTD devices

On 03/01/2017 05:14 AM, lepton wrote: > If checking some calling side, the len is from cache_size of struct > mtdblk_dev, it's defined as unsigned int now. So it's not 64bit yet. Ummm ... since you're top-posting, I have no clue which part do you refer to , sorry. > BTW, seems it's just block

Re: [PATCH v2] mtd: Fix mtdblock for >4GB MTD devices

On 03/01/2017 05:14 AM, lepton wrote: > If checking some calling side, the len is from cache_size of struct > mtdblk_dev, it's defined as unsigned int now. So it's not 64bit yet. Ummm ... since you're top-posting, I have no clue which part do you refer to , sorry. > BTW, seems it's just block

Re: [PATCH 1/2] extcon: int3496: Use gpiod_get instead of gpiod_get_index

Hi, On 2017년 03월 11일 05:52, Hans de Goede wrote: > Now that we've an acpi mapping table we should be using gpiod_get > instead of gpiod_get_index. > > Cc: Andy Shevchenko > Signed-off-by: Hans de Goede > --- >

Re: [PATCH 1/2] extcon: int3496: Use gpiod_get instead of gpiod_get_index

Hi, On 2017년 03월 11일 05:52, Hans de Goede wrote: > Now that we've an acpi mapping table we should be using gpiod_get > instead of gpiod_get_index. > > Cc: Andy Shevchenko > Signed-off-by: Hans de Goede > --- > drivers/extcon/extcon-intel-int3496.c | 12 +++- > 1 file changed, 3

Re: [PATCH 2/7] regulator: max77693: Constify regulator_ops

Hi, On 2017년 03월 12일 04:01, Krzysztof Kozlowski wrote: > Static struct regulator_ops is not modified so can be made const for > code safeness. > > Signed-off-by: Krzysztof Kozlowski > --- > drivers/regulator/max77693-regulator.c | 2 +- > 1 file changed, 1 insertion(+), 1

Re: [PATCH 2/7] regulator: max77693: Constify regulator_ops

Hi, On 2017년 03월 12일 04:01, Krzysztof Kozlowski wrote: > Static struct regulator_ops is not modified so can be made const for > code safeness. > > Signed-off-by: Krzysztof Kozlowski > --- > drivers/regulator/max77693-regulator.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff

[PATCH v2-kernel 4.1] irqdomain: handle the per-CPU irq trigger type settings

when percpu devices set its IRQ trigger type using irq_of_parse and_map API,it will be failed because irq_set_irq_type is only for 1-N mode interrupt source,not for per-cpu interrupt source. so handle per-cpu IRQs for this failure. problem: per cpu device call irq_of_parse_and_map to set its

[PATCH v2-kernel 4.1] irqdomain: handle the per-CPU irq trigger type settings

when percpu devices set its IRQ trigger type using irq_of_parse and_map API,it will be failed because irq_set_irq_type is only for 1-N mode interrupt source,not for per-cpu interrupt source. so handle per-cpu IRQs for this failure. problem: per cpu device call irq_of_parse_and_map to set its

Re: [PATCH v2] statx: optimize copy of struct statx to userspace

On Mar 11, 2017, at 11:01 PM, Eric Biggers wrote: > > On Sat, Mar 11, 2017 at 08:02:06PM -0800, Eric Biggers wrote: >> On Sun, Mar 12, 2017 at 02:29:27AM +, Al Viro wrote: >>> >>> Oh, I agree that multiple __put_user() are wrong; I also agree that bulk >>> copy is the

Re: [PATCH v2] statx: optimize copy of struct statx to userspace

On Mar 11, 2017, at 11:01 PM, Eric Biggers wrote: > > On Sat, Mar 11, 2017 at 08:02:06PM -0800, Eric Biggers wrote: >> On Sun, Mar 12, 2017 at 02:29:27AM +, Al Viro wrote: >>> >>> Oh, I agree that multiple __put_user() are wrong; I also agree that bulk >>> copy is the right approach (when

Re: [PATCH v5 00/39] i.MX Media Driver

On 03/12/2017 01:22 PM, Russell King - ARM Linux wrote: On Sun, Mar 12, 2017 at 01:05:06PM -0700, Steve Longerbeam wrote: On 03/12/2017 12:57 PM, Russell King - ARM Linux wrote: On Sat, Mar 11, 2017 at 04:30:53PM -0800, Steve Longerbeam wrote: If it's too difficult to get the imx219 csi-2

Re: [PATCH v5 00/39] i.MX Media Driver

On 03/12/2017 01:22 PM, Russell King - ARM Linux wrote: On Sun, Mar 12, 2017 at 01:05:06PM -0700, Steve Longerbeam wrote: On 03/12/2017 12:57 PM, Russell King - ARM Linux wrote: On Sat, Mar 11, 2017 at 04:30:53PM -0800, Steve Longerbeam wrote: If it's too difficult to get the imx219 csi-2

Re: [PATCH 01/14] cpufreq: intel_pstate: Update pid_params.sample_rate_ns in pid_param_set()

On Sun, Mar 12, 2017 at 10:42 PM, Rafael J. Wysocki wrote: > From: Rafael J. Wysocki > > Fix the debugfs interface for PID tuning to actually update > pid_params.sample_rate_ns on PID parameters updates, as changing > pid_params.sample_rate_ms via

Re: [PATCH 01/14] cpufreq: intel_pstate: Update pid_params.sample_rate_ns in pid_param_set()

On Sun, Mar 12, 2017 at 10:42 PM, Rafael J. Wysocki wrote: > From: Rafael J. Wysocki > > Fix the debugfs interface for PID tuning to actually update > pid_params.sample_rate_ns on PID parameters updates, as changing > pid_params.sample_rate_ms via debugfs has no effect now. > > Fixes:

Re: [Outreachy kernel] [PATCH] staging: iio: ade7753: replace mlock with driver private lock

On Mon, Mar 13, 2017 at 12:03 AM, Alison Schofield wrote: > On Sun, Mar 12, 2017 at 07:02:50PM +0530, simran singhal wrote: >> The IIO subsystem is redefining iio_dev->mlock to be used by >> the IIO core only for protecting device operating mode changes. >> ie. Changes

[PATCH] mm: mark gup_pud_range as unused

The last caller to gup_pud_range was removed in commit c2febafc6773 ("mm: convert generic code to 5-level paging"). Mark it as unused to silence a warning from gcc. Signed-off-by: Chris Packham --- I saw this warning when compiling 4.11-rc2 with -Werror. An

Re: [Outreachy kernel] [PATCH] staging: iio: ade7753: replace mlock with driver private lock

On Mon, Mar 13, 2017 at 12:03 AM, Alison Schofield wrote: > On Sun, Mar 12, 2017 at 07:02:50PM +0530, simran singhal wrote: >> The IIO subsystem is redefining iio_dev->mlock to be used by >> the IIO core only for protecting device operating mode changes. >> ie. Changes between INDIO_DIRECT_MODE,

[PATCH] mm: mark gup_pud_range as unused

The last caller to gup_pud_range was removed in commit c2febafc6773 ("mm: convert generic code to 5-level paging"). Mark it as unused to silence a warning from gcc. Signed-off-by: Chris Packham --- I saw this warning when compiling 4.11-rc2 with -Werror. An equally valid fix would be to remove

Re: [PATCH for-4.11] ASoC: don't dereference NULL pcm_{new,free}

Hi Brian Thank you for your feedback > There are 4 drivers calling that: > > snd_soc_dummy_probe > rt5514_spi_probe > 2 instances of snd_dmaengine_pcm_register, via rockchip_i2s_probe > > Only the latter two seem to run the assignment here: > > if (platform_drv->pcm_new) >

Re: [PATCH for-4.11] ASoC: don't dereference NULL pcm_{new,free}

Hi Brian Thank you for your feedback > There are 4 drivers calling that: > > snd_soc_dummy_probe > rt5514_spi_probe > 2 instances of snd_dmaengine_pcm_register, via rockchip_i2s_probe > > Only the latter two seem to run the assignment here: > > if (platform_drv->pcm_new) >

Re: [PATCH 3.16 302/370] drm/radeon: Use mode h/vdisplay fields to hide out of bounds HW cursor

On 10/03/17 08:46 PM, Ben Hutchings wrote: > 3.16.42-rc1 review patch. If anyone has any objections, please let me know. > > -- > > From: Michel Dänzer > > commit d74c67dd7800fc7aae381f272875c337f268806c upstream. > > The crtc_h/vdisplay fields may not

Re: [PATCH 3.16 302/370] drm/radeon: Use mode h/vdisplay fields to hide out of bounds HW cursor

On 10/03/17 08:46 PM, Ben Hutchings wrote: > 3.16.42-rc1 review patch. If anyone has any objections, please let me know. > > -- > > From: Michel Dänzer > > commit d74c67dd7800fc7aae381f272875c337f268806c upstream. > > The crtc_h/vdisplay fields may not match the CRTC viewport

Re: [RFC] Add option to mount only a pids subset

On Sat, Mar 11, 2017 at 6:13 PM, Al Viro wrote: > PS: AFAICS, simple mount --bind of your pid-only mount will suddenly > expose the full thing. And as for the lifetimes making no sense... > note that you are simply not freeing these structures of yours. > Try to handle

Re: [RFC] Add option to mount only a pids subset

On Sat, Mar 11, 2017 at 6:13 PM, Al Viro wrote: > PS: AFAICS, simple mount --bind of your pid-only mount will suddenly > expose the full thing. And as for the lifetimes making no sense... > note that you are simply not freeing these structures of yours. > Try to handle that and you'll get a

[PATCH 1/1] Drivers: hv: vmbus: Don't leak memory when a channel is rescinded

From: K. Y. Srinivasan When we close a channel that has been rescinded, we will leak memory since vmbus_teardown_gpadl() returns an error. Fix this so that we can properly cleanup the memory allocated to the ring buffers. Fixes: ccb61f8a99e6 ("Drivers: hv: vmbus: Fix a

[PATCH 1/1] Drivers: hv: vmbus: Don't leak memory when a channel is rescinded

From: K. Y. Srinivasan When we close a channel that has been rescinded, we will leak memory since vmbus_teardown_gpadl() returns an error. Fix this so that we can properly cleanup the memory allocated to the ring buffers. Fixes: ccb61f8a99e6 ("Drivers: hv: vmbus: Fix a rescind handling bug")

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