The patch
regulator: max8660: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: max8660: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
On 13/03/2017 15:58, fangying wrote:
> Hi, Huang Kai
>
> After weeks of intensive testing, we think the problem is solved and
> this issue can be closed.
Thanks for the update. We got to the same conclusion.
Paolo
Le 11/03/2017 à 06:43, Masahiro Yamada a écrit :
[snip]
>
> I will take care of this.
Thank you.
>
>
>
>> kbuild tree has not been updated since two months (4.10-rc1) :/
>
> Michal's tree is not active these days.
Ok, I didn't know that.
> Going forward, I will queue up Kbuild patches in my
On 13/03/2017 15:58, fangying wrote:
> Hi, Huang Kai
>
> After weeks of intensive testing, we think the problem is solved and
> this issue can be closed.
Thanks for the update. We got to the same conclusion.
Paolo
Le 11/03/2017 à 06:43, Masahiro Yamada a écrit :
[snip]
>
> I will take care of this.
Thank you.
>
>
>
>> kbuild tree has not been updated since two months (4.10-rc1) :/
>
> Michal's tree is not active these days.
Ok, I didn't know that.
> Going forward, I will queue up Kbuild patches in my
The patch
ASoC: cs35l35: fix semicolon.cocci warnings
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to
The patch
ASoC: cs35l35: fix semicolon.cocci warnings
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to
The patch
regulator: s2mps11: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: s2mps11: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: pfuze100-regulator: add coin support
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The patch
regulator: pfuze100-regulator: add coin support
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The patch
regulator: max77693: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: max77693: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: s5m8767: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: s2mpa01: Fix inconsistent indenting
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The patch
regulator: s2mpa01: Fix inconsistent indenting
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The patch
regulator: s5m8767: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: s2mpa01: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: s2mpa01: Constify regulator_ops
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
On Mon, Mar 13, 2017 at 04:59:58PM +0200, Jarkko Sakkinen wrote:
> if (chip->flags & TPM_CHIP_FLAG_TPM2)
> ret = sprintf(buf, "TPM 2.0");
> else
> ret = sprintf(buf, "TPM 1.x");
And 1.x should be 1.2 or 1.1
Jason
On Mon, Mar 13, 2017 at 04:59:58PM +0200, Jarkko Sakkinen wrote:
> if (chip->flags & TPM_CHIP_FLAG_TPM2)
> ret = sprintf(buf, "TPM 2.0");
> else
> ret = sprintf(buf, "TPM 1.x");
And 1.x should be 1.2 or 1.1
Jason
On Fri, Mar 10, 2017 at 02:29:53PM +, Suzuki K Poulose wrote:
> On 09/03/17 17:59, Leo Yan wrote:
> >Hi Suziku,
> >>The problem is, it is not guaranteed that the EDPCSR_Hi, EDCIDSR & EDVIDSR
> >>are
> >>updated as a side effect of a memory mapped access (which is what we do
> >>here) to the
On Fri, Mar 10, 2017 at 02:29:53PM +, Suzuki K Poulose wrote:
> On 09/03/17 17:59, Leo Yan wrote:
> >Hi Suziku,
> >>The problem is, it is not guaranteed that the EDPCSR_Hi, EDCIDSR & EDVIDSR
> >>are
> >>updated as a side effect of a memory mapped access (which is what we do
> >>here) to the
On Fri, Dec 16, 2016 at 7:18 PM, Nicolas Pitre wrote:
> On Fri, 16 Dec 2016, Arnd Bergmann wrote:
>
>> With posix timers having become optional, we get a build error with
>> the cpts time sync option of the CPSW driver:
>>
>> drivers/net/ethernet/ti/cpts.c: In function
On Fri, Dec 16, 2016 at 7:18 PM, Nicolas Pitre wrote:
> On Fri, 16 Dec 2016, Arnd Bergmann wrote:
>
>> With posix timers having become optional, we get a build error with
>> the cpts time sync option of the CPSW driver:
>>
>> drivers/net/ethernet/ti/cpts.c: In function 'cpts_find_ts':
>>
On Mon, Mar 13, 2017 at 09:44:02AM -0700, Andy Lutomirski wrote:
> static void x86_pmu_event_mapped(struct perf_event *event)
> {
> if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED))
> return;
>
> if (atomic_inc_return(>mm->context.perf_rdpmc_allowed) == 1)
>
> <-- thread 1
On Mon, Mar 13, 2017 at 09:44:02AM -0700, Andy Lutomirski wrote:
> static void x86_pmu_event_mapped(struct perf_event *event)
> {
> if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED))
> return;
>
> if (atomic_inc_return(>mm->context.perf_rdpmc_allowed) == 1)
>
> <-- thread 1
On Mon, 2017-03-13 at 14:48 +0530, Abdul Haleem wrote:
> Hi,
>
> Mainline boot is broken on PowerPC bare metal with below traces:
> Machine Type : Power 8 Bare metal
>
> [ OK ] Mounted Debug File System.
> [ OK ] Started Nameserver information manager.
> [ OK ] Started LVM2 metadata
On Mon, 2017-03-13 at 14:48 +0530, Abdul Haleem wrote:
> Hi,
>
> Mainline boot is broken on PowerPC bare metal with below traces:
> Machine Type : Power 8 Bare metal
>
> [ OK ] Mounted Debug File System.
> [ OK ] Started Nameserver information manager.
> [ OK ] Started LVM2 metadata
Hello!
On 03/13/2017 07:36 PM, Bartosz Golaszewski wrote:
Add DT bindings for the onboard SATA controller present on the DM816x
SoCs.
Signed-off-by: Bartosz Golaszewski
---
Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20
1 file
Hello!
On 03/13/2017 07:36 PM, Bartosz Golaszewski wrote:
Add DT bindings for the onboard SATA controller present on the DM816x
SoCs.
Signed-off-by: Bartosz Golaszewski
---
Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20
1 file changed, 20 insertions(+)
Borislav Petkov writes:
> On Sun, Mar 12, 2017 at 03:55:08PM +0200, Andy Shevchenko wrote:
>
>> The only change that IMHO matters happened between v4.10 and v4.11-rc1 is
>> this:
>>
>> @@ -6276,8 +6274,8 @@ static int e1000e_pm_freeze(struct device *dev)
>> /*
Borislav Petkov writes:
> On Sun, Mar 12, 2017 at 03:55:08PM +0200, Andy Shevchenko wrote:
>
>> The only change that IMHO matters happened between v4.10 and v4.11-rc1 is
>> this:
>>
>> @@ -6276,8 +6274,8 @@ static int e1000e_pm_freeze(struct device *dev)
>> /* Quiesce the device
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> From: Christian König
>
> Try to resize BAR0 to let CPU access all of VRAM.
> +void amdgpu_resize_bar0(struct amdgpu_device *adev)
> +{
> + u32 size =
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> From: Christian König
>
> Try to resize BAR0 to let CPU access all of VRAM.
> +void amdgpu_resize_bar0(struct amdgpu_device *adev)
> +{
> + u32 size = max(ilog2(adev->mc.real_vram_size - 1) + 1, 20) - 20;
> + int r;
> +
> +
On 13/03/17 17:11, sean.w...@mediatek.com wrote:
From: Sean Wang
MT7530 is a 7-ports Gigabit Ethernet Switch that could be found on
Mediatek router platforms such as MT7623A or MT7623N which includes 7-port
Gigabit Ethernet MAC and 5-port Gigabit Ethernet PHY. Among
On 13/03/17 17:11, sean.w...@mediatek.com wrote:
From: Sean Wang
MT7530 is a 7-ports Gigabit Ethernet Switch that could be found on
Mediatek router platforms such as MT7623A or MT7623N which includes 7-port
Gigabit Ethernet MAC and 5-port Gigabit Ethernet PHY. Among these ports,
The port
This board has an external oscillator supplying the reference clock
signal for SATA. Its rate is fixed at 100Mhz. Add a corresponding
device tree node.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/dm8168-evm.dts | 6 ++
1 file changed, 6 insertions(+)
On Mon, Mar 13, 2017 at 8:46 AM, Michal Hocko wrote:
> On Mon 13-03-17 08:07:15, Shakeel Butt wrote:
>> On Mon, Mar 13, 2017 at 2:02 AM, Michal Hocko wrote:
>> > On Fri 10-03-17 11:46:20, Shakeel Butt wrote:
>> >> Recently kswapd has been modified to give up
This series implements support for the on-board SATA controller
on the dm8168-evm board.
The first patch adds the clock domain and hwmod entries for the
SATA module.
The second patch models the external reference clock used by SATA.
The third adds the SATA node to the SoC's device tree.
The
This board has an external oscillator supplying the reference clock
signal for SATA. Its rate is fixed at 100Mhz. Add a corresponding
device tree node.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/dm8168-evm.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git
On Mon, Mar 13, 2017 at 8:46 AM, Michal Hocko wrote:
> On Mon 13-03-17 08:07:15, Shakeel Butt wrote:
>> On Mon, Mar 13, 2017 at 2:02 AM, Michal Hocko wrote:
>> > On Fri 10-03-17 11:46:20, Shakeel Butt wrote:
>> >> Recently kswapd has been modified to give up after MAX_RECLAIM_RETRIES
>> >>
This series implements support for the on-board SATA controller
on the dm8168-evm board.
The first patch adds the clock domain and hwmod entries for the
SATA module.
The second patch models the external reference clock used by SATA.
The third adds the SATA node to the SoC's device tree.
The
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> From: Christian König
>
> This allows device drivers to request resizing their BARs.
>
> The function only tries to reprogram the windows of the bridge directly above
> the requesting
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> From: Christian König
>
> This allows device drivers to request resizing their BARs.
>
> The function only tries to reprogram the windows of the bridge directly above
> the requesting device and only the BAR of the same type (usually mem,
From: Kevin Hilman
Add the SATA clockdomain (part of CM_DEFAULT) and a hwmod for the SATA
block on dm81xx.
Tested on DM8168 EVM.
Signed-off-by: Kevin Hilman
Signed-off-by: Bartosz Golaszewski
---
Add the SATA controller node to the dm8168-evm device tree.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/dm8168-evm.dts | 4
arch/arm/boot/dts/dm816x.dtsi| 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dm8168-evm.dts
Add the SATA controller node to the dm8168-evm device tree.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/dm8168-evm.dts | 4
arch/arm/boot/dts/dm816x.dtsi| 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dm8168-evm.dts
From: Kevin Hilman
Add the SATA clockdomain (part of CM_DEFAULT) and a hwmod for the SATA
block on dm81xx.
Tested on DM8168 EVM.
Signed-off-by: Kevin Hilman
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-omap2/clockdomains81xx_data.c | 10 +
arch/arm/mach-omap2/cm81xx.h
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> Most BIOS don't enable this because of compatibility reasons.
>
> Manually enable a 64bit BAR of 64GB size so that we have
> enough room for PCI devices.
> +static void pci_amd_enable_64bit_bar(struct pci_dev
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> Most BIOS don't enable this because of compatibility reasons.
>
> Manually enable a 64bit BAR of 64GB size so that we have
> enough room for PCI devices.
> +static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> +{
> + const
This is now supported on the dm8168-evm board, so enable it in
the defconfig for omap2+.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
This is now supported on the dm8168-evm board, so enable it in
the defconfig for omap2+.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Add device-tree binding for Mediatek MT7530 switch.
>
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Sean Wang
> ---
> .../devicetree/bindings/net/dsa/mt7530.txt
On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Add device-tree binding for Mediatek MT7530 switch.
>
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Sean Wang
> ---
> .../devicetree/bindings/net/dsa/mt7530.txt | 94
> ++
> 1 file
On 03/13/2017 03:56 AM, James Hogan wrote:
On Fri, Mar 10, 2017 at 02:14:05PM -0800, David Daney wrote:
This let's us pass some additional "modprobe test-bpf" tests.
Reuse the code for SKF_AD_IFINDEX, but substitute the offset and size
of the "type" field.
Signed-off-by: David Daney
On Mon, Mar 13, 2017 at 6:58 AM, Vince Weaver wrote:
> Hello
>
> I've been trying to track this issue down for a few days and haven't been
> able to isolate it. So maybe someone who understands low-level perf mmap
> reference counting can help here.
>
> As you might
On 03/13/2017 03:56 AM, James Hogan wrote:
On Fri, Mar 10, 2017 at 02:14:05PM -0800, David Daney wrote:
This let's us pass some additional "modprobe test-bpf" tests.
Reuse the code for SKF_AD_IFINDEX, but substitute the offset and size
of the "type" field.
Signed-off-by: David Daney
I
On Mon, Mar 13, 2017 at 6:58 AM, Vince Weaver wrote:
> Hello
>
> I've been trying to track this issue down for a few days and haven't been
> able to isolate it. So maybe someone who understands low-level perf mmap
> reference counting can help here.
>
> As you might recall,
The newly added a5xx support fails to build when debugfs is diabled:
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs' has
no member named 'show'
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_show' undeclared
here (not in a function); did you mean
The newly added a5xx support fails to build when debugfs is diabled:
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs' has
no member named 'show'
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_show' undeclared
here (not in a function); did you mean
This SATA controller is quite similar to the one present on the DA850
SoC, but the PHY configuration is different and it supports two HBA
ports.
The IP suffers from the same PMP issue the DA850 does - if we enable
PMP but don't use it - softreset fails. Appropriate workaround was
implemented in
This SATA controller is quite similar to the one present on the DA850
SoC, but the PHY configuration is different and it supports two HBA
ports.
The IP suffers from the same PMP issue the DA850 does - if we enable
PMP but don't use it - softreset fails. Appropriate workaround was
implemented in
Add DT bindings for the onboard SATA controller present on the DM816x
SoCs.
Signed-off-by: Bartosz Golaszewski
---
Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20
1 file changed, 20 insertions(+)
create mode 100644
Add DT bindings for the onboard SATA controller present on the DM816x
SoCs.
Signed-off-by: Bartosz Golaszewski
---
Documentation/devicetree/bindings/ata/ahci-dm816.txt | 20
1 file changed, 20 insertions(+)
create mode 100644
> +- mediatek,reset-pin: Phandle to the pinctrl node used for the reset. Which
> + must be required if the property mediatek,mcm of specified as
> + "disabled". See
> + Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt for
> + the mediatek pintcrl setting for the
Add support for the on-board SATA controller present on TI DM816 SoCs.
This IP suffers from the same issue DA850 does, that is: if we enable
PMP, but connect the drive directly to the board, the disk cannot be
detected. A workaround similar to the one implemented in ahci-da850 is
included in this
> +- mediatek,reset-pin: Phandle to the pinctrl node used for the reset. Which
> + must be required if the property mediatek,mcm of specified as
> + "disabled". See
> + Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt for
> + the mediatek pintcrl setting for the
Add support for the on-board SATA controller present on TI DM816 SoCs.
This IP suffers from the same issue DA850 does, that is: if we enable
PMP, but connect the drive directly to the board, the disk cannot be
detected. A workaround similar to the one implemented in ahci-da850 is
included in this
On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Add the support for the 4-bytes tag for DSA port distinguishing inserted
> allowing receiving and transmitting the packet via the particular port.
> The tag is being added after the source MAC
On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Add the support for the 4-bytes tag for DSA port distinguishing inserted
> allowing receiving and transmitting the packet via the particular port.
> The tag is being added after the source MAC address in the ethernet
>
On Sat, Mar 11, 2017 at 03:02:14PM +0200, Jarkko Sakkinen wrote:
> Added two new callbacks to struct tpm_class_ops:
>
> - request_locality
> - relinquish_locality
>
> These are called before sending and receiving data from the TPM. We
> update also tpm_tis_core to use these callbacks. Small
On Sat, Mar 11, 2017 at 03:02:14PM +0200, Jarkko Sakkinen wrote:
> Added two new callbacks to struct tpm_class_ops:
>
> - request_locality
> - relinquish_locality
>
> These are called before sending and receiving data from the TPM. We
> update also tpm_tis_core to use these callbacks. Small
qcom_smd_register_edge() is provided by either QCOM_SMD or RPMSG_QCOM_SMD,
and if both of them are disabled, it does nothing.
The check for the PIL drivers however only checks for QCOM_SMD, so it breaks
with QCOM_SMD=n && RPMSG_QCOM_SMD=m:
drivers/remoteproc/built-in.o: In function
I ran into one corner case with the orion watchdog using the
atomic_io_modify interface:
drivers/watchdog/orion_wdt.o: In function `orion_stop':
orion_wdt.c:(.text.orion_stop+0x28): undefined reference to `atomic_io_modify'
drivers/watchdog/orion_wdt.o: In function `armada375_stop':
qcom_smd_register_edge() is provided by either QCOM_SMD or RPMSG_QCOM_SMD,
and if both of them are disabled, it does nothing.
The check for the PIL drivers however only checks for QCOM_SMD, so it breaks
with QCOM_SMD=n && RPMSG_QCOM_SMD=m:
drivers/remoteproc/built-in.o: In function
I ran into one corner case with the orion watchdog using the
atomic_io_modify interface:
drivers/watchdog/orion_wdt.o: In function `orion_stop':
orion_wdt.c:(.text.orion_stop+0x28): undefined reference to `atomic_io_modify'
drivers/watchdog/orion_wdt.o: In function `armada375_stop':
This is the implementation of HFI. It is charged with the
responsibility to comunicate with the firmware through an
interface commands and messages.
- hfi.c has interface functions used by the core, decoder
and encoder parts to comunicate with the firmware. For example
there are functions for
This is the implementation of HFI. It is charged with the
responsibility to comunicate with the firmware through an
interface commands and messages.
- hfi.c has interface functions used by the core, decoder
and encoder parts to comunicate with the firmware. For example
there are functions for
Hi Sean
Just looking at the GPIO handling at the moment.
> + /* Reset whole chip through gpio pin or
> + * memory-mapped registers for different
> + * type of hardware
> + */
> + if (priv->mcm) {
> + regmap_update_bits(priv->ethsys, SYSC_REG_RSTCTRL,
> +
Hi Sean
Just looking at the GPIO handling at the moment.
> + /* Reset whole chip through gpio pin or
> + * memory-mapped registers for different
> + * type of hardware
> + */
> + if (priv->mcm) {
> + regmap_update_bits(priv->ethsys, SYSC_REG_RSTCTRL,
> +
Here is the implementation of Venus video accelerator low-level
functionality. It contanins code which setup the registers and
startup uthe processor, allocate and manipulates with the shared
memory used for sending commands and receiving messages.
Signed-off-by: Stanimir Varbanov
Here is the implementation of Venus video accelerator low-level
functionality. It contanins code which setup the registers and
startup uthe processor, allocate and manipulates with the shared
memory used for sending commands and receiving messages.
Signed-off-by: Stanimir Varbanov
---
This adds Venus driver Makefile and changes v4l2 platform
Makefile/Kconfig in order to enable building of the driver.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/Kconfig | 14 ++
drivers/media/platform/Makefile|
This adds Venus driver Makefile and changes v4l2 platform
Makefile/Kconfig in order to enable building of the driver.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/Kconfig | 14 ++
drivers/media/platform/Makefile| 2 ++
* core.c has implemented the platform dirver methods, file
operations and v4l2 registration.
* helpers.c has implemented common helper functions for:
- buffer management
- vb2_ops and functions for format propagation,
- functions for allocating and freeing buffers for
internal
* core.c has implemented the platform dirver methods, file
operations and v4l2 registration.
* helpers.c has implemented common helper functions for:
- buffer management
- vb2_ops and functions for format propagation,
- functions for allocating and freeing buffers for
internal
@Chao Yu/@Jaegeuk Kim: I'm considering to add this to the regressions
report for 4.11; or is there a reason why it shouldn't be considered a
regression? Ciao, Thorsten
On 08.03.2017 02:21, kernel test robot wrote:
>
> Greeting,
>
> We noticed a -33.7 regression of aim7.jobs-per-min due to
On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Allowing CDM can recognize these packets with carrying port-distinguishing
> tag when CONFIG_NET_DSA_TAG_MTK is enabled. Otherwise, these packets will
> be dropped by CDM ingress.
>
>
@Chao Yu/@Jaegeuk Kim: I'm considering to add this to the regressions
report for 4.11; or is there a reason why it shouldn't be considered a
regression? Ciao, Thorsten
On 08.03.2017 02:21, kernel test robot wrote:
>
> Greeting,
>
> We noticed a -33.7 regression of aim7.jobs-per-min due to
On 03/13/2017 09:11 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Allowing CDM can recognize these packets with carrying port-distinguishing
> tag when CONFIG_NET_DSA_TAG_MTK is enabled. Otherwise, these packets will
> be dropped by CDM ingress.
>
> Signed-off-by: Sean Wang
>
Hi all,
Here is seventh version of the patch-set - no functional changes in
v4l2 APIs.
The changes since v6 are.
* changes in DT binding document - moved memory-region DT property
in video-codec node - see 2/9.
* improved recovery mechanism.
* fixed various issues found during
Hi all,
Here is seventh version of the patch-set - no functional changes in
v4l2 APIs.
The changes since v6 are.
* changes in DT binding document - moved memory-region DT property
in video-codec node - see 2/9.
* improved recovery mechanism.
* fixed various issues found during
Add an entry for Venus video encoder/decoder accelerator driver.
Signed-off-by: Stanimir Varbanov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 83a42ef1d1a7..cce2537d4d00 100644
--- a/MAINTAINERS
+++
Add binding document for Venus video encoder/decoder driver
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Acked-by: Rob Herring
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/media/qcom,venus.txt | 107
this add functions for:
- remove buffers from src/dst queue by index
- remove exact buffer from src/dst queue
also extends m2m API to iterate over a list of src/dst buffers
in safely and non-safely manner.
Signed-off-by: Stanimir Varbanov
---
Add an entry for Venus video encoder/decoder accelerator driver.
Signed-off-by: Stanimir Varbanov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 83a42ef1d1a7..cce2537d4d00 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10400,6
Add binding document for Venus video encoder/decoder driver
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Acked-by: Rob Herring
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/media/qcom,venus.txt | 107 +
1 file changed, 107 insertions(+)
create mode
this add functions for:
- remove buffers from src/dst queue by index
- remove exact buffer from src/dst queue
also extends m2m API to iterate over a list of src/dst buffers
in safely and non-safely manner.
Signed-off-by: Stanimir Varbanov
---
drivers/media/v4l2-core/v4l2-mem2mem.c | 37
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