Hey Vivien,
On 05/30/2017 11:33 AM, Vivien Didelot wrote:
> The struct dsa_device_ops defines the rcv function with 2 unused
> arguments struct packet_type *pt, and struct net_device *orig_dev.
>
> This patch removes them from the definition and implementations.
>
> Reviewed-by: Andrew Lunn
> S
On Tue, May 30, 2017 at 10:51:51AM -0700, Andi Kleen wrote:
> On Tue, May 30, 2017 at 07:40:14PM +0200, Peter Zijlstra wrote:
> > On Tue, May 30, 2017 at 10:22:08AM -0700, Andi Kleen wrote:
> > > > > You would only need a single one per system however, not one per CPU.
> > > > > RCU already tracks
On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
> Indicate the error number and make the message a bit more elaborate.
> + dev_err(dev,
> + "adding gpiochip failed: %d (base: %d, ngpio:
> %d)\n",
> + r
On 5/30/17 2:44 PM, Nick Kralevich wrote:
> On Tue, May 30, 2017 at 11:32 AM, Stephen Smalley wrote:
>>> Seccomp requires the program in question to "opt-in" so to speak and
>>> set
>>> certain restrictions on itself. However as you state above, any
>>> TIOCSTI
>>> protection doesn't matter if the
On 24 May 2017 at 14:45, David Howells wrote:
>
> Here's a set of patches to institute a "locked-down mode" in the kernel and
> to set that mode if the kernel is booted in secure-boot mode. This can be
> enabled with CONFIG_LOCK_DOWN_KERNEL. If a kernel is locked down, the
> lockdown can be lift
On Tue, May 30, 2017 at 06:25:54PM +0200, Johan Hovold wrote:
> Use the new helper for reusing a device-tree node of another device
> instead of managing the node references explicitly.
>
> This also makes sure that the new of_node_reuse flag is set if the
> device is ever reprobed, something whic
On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
> We currently shift bits here and there without actually explaining
> what we're doing. Add some helper variables with names indicating
> their purpose to improve the code readability.
> + /* Each chip is described by two values.
Hi Linus,
> But it sounds like your JIT case actually uses it for writing -
> but if you can write a small blurb about it, that would be nice.
yes, we use it for writing. Happy to describe the scheme in more detail.
> (b) it would probably be nice to limit FOLL_FORCE in general as much
> a
On Tue, May 30, 2017 at 01:55:33PM -0400, Vince Weaver wrote:
> So the issue is currently if you were sampling, and you were sampling on
> an event group, and you had set PERF_SAMPLE_READ to get all counts for a
> group, and the event was also inherited
No, anything PERF_SAMPLE_READ (group or
>From c57e3674efc609f8364f5e228a2c1309cfe99901 Mon Sep 17 00:00:00 2001
From: Roman Gushchin
Date: Tue, 23 May 2017 17:37:55 +0100
Subject: [PATCH v2] mm,oom: add tracepoints for oom reaper-related events
During the debugging of the problem described in
https://lkml.org/lkml/2017/5/17/542 and fix
On Tue, May 30, 2017 at 11:58 AM, Bartosz Golaszewski wrote:
> We're currently only checking the first character of the input to the
> debugfs event files, so a string like '0sdfdsf' is valid and indicates
> a falling edge event.
>
> Be more strict and only allow '0', '1', '0\n' & '1\n'.
>
> While
When registering for the Xenstore watch of the node control/sysrq the
handler will be called at once. Don't issue an error message if the
Xenstore node isn't there, as it will be created only when an event
is being triggered.
Signed-off-by: Juergen Gross
---
drivers/xen/manage.c | 12 ++-
Hi Russell,
I tried everything I could to run a ARMv6 machine in last 4 days but I
am not able to. If nobody is willing to test the code no there
machine, may be we should not merge the code.
I have been more than happy to assist anyone who want to test it but
it looks like other people don't need
On Tue, May 30, 2017 at 9:21 PM, sathyanarayanan kuppuswamy
wrote:
>> On Tue, May 30, 2017 at 3:47 AM,
>> wrote:
>>> + tristate "Intel USB Mux"
>>
>> It's indeed Intel's IP?
>
> Register map to control this MUX comes from Intel vendor defined XHCI
> extended cap region of SOC.
>>
>> I woul
On Tue, May 30, 2017 at 01:59:41PM -0400, Mikulas Patocka wrote:
> On Tue, 30 May 2017, Dominik Brodowski wrote:
>
> > Same boot problem here (Intel(R) Core(TM) i5-5200U CPU on a Dell XPS 13),
> > git-bisected to the same patch...
> >
> > On Mon, May 29, 2017 at 06:50:57PM -0400, Mikulas Patocka
On Tue, May 30, 2017 at 10:33 AM, Jan Kiszka wrote:
> Some cleanups of the way we probe DMI platforms in the driver. Reduces
> a bit of open-coding and makes the logic easier reusable for any
> potential DMI platform != Quark.
>
> Tested on IOT2000 and Galileo Gen2.
So, for patches 1-4,
Reviewed-
On Tue, May 30, 2017 at 11:32 AM, Stephen Smalley wrote:
>> Seccomp requires the program in question to "opt-in" so to speak and
>> set
>> certain restrictions on itself. However as you state above, any
>> TIOCSTI
>> protection doesn't matter if the program correctly allocates a
>> tty/pty pair.
>
On Sat, May 27, 2017 at 12:36 AM, Ingo Molnar wrote:
>
> * John Stultz wrote:
>
>> + u64 nsecps;
>
> What does the 'ps' postfix stand for? It's not obvious (to me).
>
I guess that nsecps stands for "nanoseconds per second", although the
code appears to be storing that value left shifted by
t
Hi Phil,
> Phil Elwell hat am 30. Mai 2017 um 18:28 geschrieben:
>
>
> Restrict clock sources for the PCM peripheral to the oscillator and
> PLLD_PER because other source may have varying rates or be switched off.
> Prevent other sources from being selected by replacing their names in
> the li
From: Michael Kelley
Add direct #include statements for declarations of csum_tcpudp_magic()
and csum_ipv6_magic(). While the needed #include's are picked up
indirectly for the x86 architecture, they aren't on other
architectures, resulting in compile errors.
Signed-off-by: Michael Kelley
---
On Tue, May 30, 2017 at 04:32:47PM +0200, Michal Hocko wrote:
> On Tue 30-05-17 14:37:24, Heiko Carstens wrote:
> > On Tue, May 30, 2017 at 02:18:06PM +0200, Michal Hocko wrote:
> > > > So ZONE_DMA ends within ZONE_NORMAL. This shouldn't be possible, unless
> > > > this restriction is gone?
> > >
On Tue, May 30, 2017 at 10:01 AM, Jan Kiszka wrote:
> This makes the gpio-exar driver usable, which was prevented by a number
> of fatal bugs, and adds support for the SIMATIC IOT2040 to the 8250-exar
> driver and, indirectly, to gpio-exar as well. It's a cross-subsystem
> series, so I'm also cros
On Tue, May 30, 2017 at 10:01 AM, Jan Kiszka wrote:
> This implements the setup of RS232 and the switch-over to RS485 or RS422
> for the Siemens IOT2040. That uses an EXAR XR17V352 with external logic
> to switch between the different modes. The external logic is controlled
> via MPIO pins of the
next-20170530]
[cannot apply to v4.12-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/John-Crispin/Documentation-devicetree-add-multiple-cpu-port-DSA-binding/20170530-224954
config: x86_64
The taggers are currently responsible to free the original SKB if they
made a copy of it, or in case of error.
This patch simplifies this by freeing the original SKB in the
dsa_slave_xmit caller, but only if an error (NULL) is returned.
It is still the responsibility of the tagger to free the ori
The struct dsa_device_ops defines the rcv function with 2 unused
arguments struct packet_type *pt, and struct net_device *orig_dev.
This patch removes them from the definition and implementations.
Reviewed-by: Andrew Lunn
Signed-off-by: Vivien Didelot
---
include/net/dsa.h | 4 +---
net/ds
dsa_ptr is not a void pointer anymore since Nov 2011, as of cf50dcc24f82
("dsa: Change dsa_uses_{dsa, trailer}_tags() into inline functions"),
but an explicit dsa_switch_tree pointer, thus remove the (void *) cast.
Signed-off-by: Vivien Didelot
---
net/dsa/dsa2.c | 2 +-
net/dsa/legacy.c | 2 +
The DSA layer uses inline helpers and copies of the tagging functions
for faster access in hot path. Add comments to detail that.
Signed-off-by: Vivien Didelot
---
include/net/dsa.h | 3 +++
net/dsa/dsa_priv.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/include/net/dsa.h b/include/net
This patchset removes the unused arguments of the taggers rcv function
and the unneeded labels in their implementations, and handles freeing of
the original SKB in the xmit caller.
Changes in v2:
- do not remove tagger function copies
- document hot path requirements
- make netdev_uses_dsa s
On Tue, May 30, 2017 at 10:01 AM, Jan Kiszka wrote:
> On the SIMATIC, IOT2040 only a single pin is exportable as GPIO, the
> rest is required to operate the UART. To allow modeling this case,
> expand the platform device data structure to specify a (consecutive) pin
> subset for exporting by the g
Many rcv functions from net/dsa/tag_*.c have a useless out_drop goto
label which simply returns NULL. Kill it in favor of the obvious.
Signed-off-by: Vivien Didelot
---
net/dsa/tag_brcm.c| 11 ---
net/dsa/tag_dsa.c | 13 +
net/dsa/tag_edsa.c| 13 +
net
Since dev->dsa_ptr is a pointer to a dsa_switch_tree, there is no need
to have another inline helper just to check rcv.
Remove dsa_uses_tagged_protocol and check dsa_ptr && dsa_ptr->rcv
together at the same time.
Signed-off-by: Vivien Didelot
---
include/net/dsa.h | 8 +---
1 file changed,
On Tue, May 30, 2017 at 10:01 AM, Jan Kiszka wrote:
> Commtech adapters need the MPIOs for internal purposes, and the
> gpio-exar driver already refused to pick them up. But there is actually
> no point in even creating the underlying platform device.
It still feels that partially you may do stuf
On Tue, 2017-05-30 at 12:28 -0400, Matt Brown wrote:
> On 5/30/17 8:24 AM, Alan Cox wrote:
> > Look there are two problems here
> >
> > 1. TIOCSTI has users
>
> I don't see how this is a problem.
>
> >
> > 2. You don't actually fix anything
> >
> > The underlying problem is that if you give yo
On 5/30/17 11:10 AM, Scott Branden wrote:
> Hi Ray,
>
>
> On 17-05-30 10:04 AM, Ray Jui wrote:
>> Hi Srinath and Scott,
>>
>> On 5/30/17 8:44 AM, Scott Branden wrote:
>>> Hi Srinath,
>>>
>>>
>>> On 17-05-30 02:08 AM, Srinath Mannam wrote:
We found a concurrency issue in NVMe Init when we i
Hi Andy,
On 05/30/2017 09:20 AM, Andy Shevchenko wrote:
On Tue, May 30, 2017 at 3:47 AM,
wrote:
From: Kuppuswamy Sathyanarayanan
In some Intel SOCs, a single USB port is shared between USB device and
SoCs
host controller and an internal mux is used to control the selection of
port by hos
Hi everyone,
Josef is working on a new approach to balancing slab caches and the
page cache. For this to work, he needs slab cache statistics on the
lruvec level. These patches implement that by adding infrastructure
that allows updating and reading generic VM stat items per lruvec,
then switches
Signed-off-by: Johannes Weiner
---
include/linux/swap.h | 1 -
mm/vmscan.c | 16
2 files changed, 17 deletions(-)
diff --git a/include/linux/swap.h b/include/linux/swap.h
index ba5882419a7d..6e3d1d0a7f48 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -
On Fri, 26 May 2017, Marcelo Tosatti wrote:
> > interrupts and scheduler ticks. But what does this have to do with vmstat?
> >
> > Show me your dpdk code running and trace the tick on / off events as well
> > as the vmstat invocations. Also show all system calls occurring on the cpu
> > that runs
Josef's redesign of the balancing between slab caches and the page
cache requires slab cache statistics at the lruvec level.
Signed-off-by: Johannes Weiner
---
mm/slab.c | 12
mm/slab.h | 18 +-
mm/slub.c | 4 ++--
3 files changed, 7 insertions(+), 27 deletions(-)
Now that the slab counters are moved from the zone to the node level
we can drop the private memcg node stats and use the official ones.
Signed-off-by: Johannes Weiner
---
include/linux/memcontrol.h | 2 --
mm/memcontrol.c| 8
mm/slab.h | 4 ++--
3 files cha
The kmem-specific functions do the same thing. Switch and drop.
Signed-off-by: Johannes Weiner
---
include/linux/memcontrol.h | 17 -
kernel/fork.c | 8
mm/slab.h | 16
3 files changed, 12 insertions(+), 29 deletions(-)
di
lruvecs are at the intersection of the NUMA node and memcg, which is
the scope for most paging activity.
Introduce a convenient accounting infrastructure that maintains
statistics per node, per memcg, and the lruvec itself.
Then convert over accounting sites for statistics that are already
tracke
To re-implement slab cache vs. page cache balancing, we'll need the
slab counters at the lruvec level, which, ever since lru reclaim was
moved from the zone to the node, is the intersection of the node, not
the zone, and the memcg.
We could retain the per-zone counters for when the page allocator
Hi,
There has been discussion spread over different threads on how to deal
with 'unused-function' warnings raised by clang on static inline
functions. gcc in general does not emit warnings for unused static
inline functions, clang does if the function is in a .c file.
When building the kernel wit
Hi Leonard,
On Tue, May 30, 2017 at 2:34 PM, Leonard Crestez
wrote:
> These bits seem to be lost after a suspend/resume cycle so just set them
> again.
>
> This patch fixes ethernet suspend/resume on imx6ul-14x14-evk boards.
>
> Signed-off-by: Leonard Crestez
When you send a v2 addressing Flori
From: Jagan Teki
NanoPi M1 Plus is designed and developed by FriendlyElec
for professionals, enterprise users, makers and hobbyists
using the Allwinner H3 SOC.
NanoPi M1 Plus key features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet
On Tue, May 30, 2017 at 02:54:21PM +0200, Radim Krčmář wrote:
> 2017-05-29 15:24+0200, Gioh Kim:
> > If so, why type is checked when setting segment registers?
>
> No idea. 19bca6ab75d8 ("KVM: SVM: Fix cross vendor migration issue with
> unusable bit") also moved the assigment up to initialize it
Hi Ray,
On 17-05-30 10:04 AM, Ray Jui wrote:
Hi Srinath and Scott,
On 5/30/17 8:44 AM, Scott Branden wrote:
Hi Srinath,
On 17-05-30 02:08 AM, Srinath Mannam wrote:
We found a concurrency issue in NVMe Init when we initialize
multiple NVMe connected over PCIe switch.
Setup details:
- SM
On 05/30/2017 10:34 AM, Leonard Crestez wrote:
> Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same
> register values can be set through the micrel phy driver by using dts
> properties.
>
> This seems preferable and allows cleanly fixing suspend/resume.
>
> Signed-off-by: Leona
From: Arnd Bergmann
Date: Mon, 29 May 2017 15:00:17 +0200
> Building the driver with CONFIG_SMP disabled results in a harmless
> warning:
>
> ethernet/mellanox/mlx5/core/main.c: In function 'mlx5_irq_set_affinity_hint':
> ethernet/mellanox/mlx5/core/main.c:615:6: error: unused variable 'irq'
>
From: Arnd Bergmann
Date: Mon, 29 May 2017 14:56:01 +0200
> 'static' was not enough, the helpers must be 'static inline'
>
> net/dsa/mv88e6xxx/global2.h:123:12: error: 'mv88e6xxx_g2_misc_4_bit_port'
> defined but not used [-Werror=unused-function]
> net/dsa/mv88e6xxx/global2.h:117:12: error: 'm
On 05/30/2017 10:34 AM, Leonard Crestez wrote:
> These bits seem to be lost after a suspend/resume cycle so just set them
> again.
>
> This patch fixes ethernet suspend/resume on imx6ul-14x14-evk boards.
>
> Signed-off-by: Leonard Crestez
> ---
> drivers/net/phy/micrel.c | 15 +++
>
1-Wire bus have very fast algorith for exchange with single slave
device. Fix incorrect count of slave devices on connect second slave
device. This case on slave device probe() step we need use generic
(multislave) functions for read/write device.
Signed-off-by: Alex A. Mihaylov
---
drivers/w1/w
Thanks Lee.
On 05/30/2017 01:54 AM, Lee Jones wrote:
For future reference, when submitting a patch-set, you really should
provide a cover letter ([PATCH 00/XX]).
Will do.
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
From: Stefan Wahren
Date: Mon, 29 May 2017 13:57:08 +0200
> The Qualcomm QCA7000 HomePlug GreenPHY supports two interfaces:
> UART and SPI. This patch series adds the missing support for UART.
>
> This driver based on the Qualcomm code [1], but contains some changes:
> * use random MAC address p
On Tue, 2017-05-30 at 10:43 -0700, Michael Kelley wrote:
> Add direct #include statements for declarations of csum_tcpudp_magic()
> and csum_ipv6_magic(). While the needed #include's are picked up
> indirectly for the x86 architecture, they aren't on other
> architectures, resulting in compile erro
On Tue, 30 May 2017, Dominik Brodowski wrote:
> Same boot problem here (Intel(R) Core(TM) i5-5200U CPU on a Dell XPS 13),
> git-bisected to the same patch...
>
> On Mon, May 29, 2017 at 06:50:57PM -0400, Mikulas Patocka wrote:
> > Please do the following three tests and test if the kernel boots
On Wed, May 24, 2017 at 7:16 AM, Djalal Harouni wrote:
> On Tue, May 23, 2017 at 9:19 PM, Kees Cook wrote:
>> On Tue, May 23, 2017 at 3:29 AM, Djalal Harouni wrote:
>> Even in the existing code, there is a sense about CAP_NET_ADMIN and
>> CAP_SYS_MODULE having different privilege levels, in that
Add support for Maxim Semiconductor MAX17211/MAX17215
Standlone Fuel Gauge 1-Wire family 0x26
Signed-off-by: Alex A. Mihaylov
---
drivers/w1/slaves/Kconfig | 12 +
drivers/w1/slaves/Makefile | 1 +
drivers/w1/slaves/w1_max1721x.c | 73
drivers/w1/s
Again resend patches. All wishes are realized.
Alex A. Mihaylov (3):
regmap: Add 1-Wire bus support
w1: MAX1721x Stanalone Fuel Gauge - add 1-Wire slave drivers
power: supply: Add support MAX1721x battery monitor
drivers/base/regmap/Kconfig | 6 +-
drivers/base/regmap/Makefil
Add support for battery monitor MAX1721x chips (power_supply class).
Maxim Semiconductor MAX1721x Standalone Fuel Gauge battery monitor.
MAX17211 used for singlecell, MAX17215 for multicell batteryes.
Signed-off-by: Alex A. Mihaylov
---
drivers/power/supply/Kconfig| 14 ++
drivers/p
Add basic support regmap (register map access) API for 1-Wire bus
Signed-off-by: Alex A. Mihaylov
---
drivers/base/regmap/Kconfig | 6 +-
drivers/base/regmap/Makefile| 1 +
drivers/base/regmap/regmap-w1.c | 239
include/linux/regmap.h
On 05/26/2017 04:29 PM, Michael Bringmann wrote:
>
> powerpc/numa: Correct the currently broken capability to set the
> topology for shared CPUs in LPARs. At boot time for shared CPU
> lpars, the topology for each shared CPU is set to node zero, however,
> this is now updated correctly using the
On Tue, May 30, 2017 at 07:40:14PM +0200, Peter Zijlstra wrote:
> On Tue, May 30, 2017 at 10:22:08AM -0700, Andi Kleen wrote:
> > > > You would only need a single one per system however, not one per CPU.
> > > > RCU already tracks all the CPUs, all we need is a single NMI watchdog
> > > > that make
Hi Peter,
Thanks for your comments.
On 05/30/2017 06:40 AM, Peter Rosin wrote:
On 2017-05-30 02:47, sathyanarayanan.kuppusw...@linux.intel.com wrote:
From: Kuppuswamy Sathyanarayanan
In some Intel SOCs, a single USB port is shared between USB device and
host controller and an internal mux is
On 5/26/2017 11:35 AM, Borislav Petkov wrote:
On Fri, May 26, 2017 at 11:22:36AM -0500, Tom Lendacky wrote:
In addition to the same issue as efi.memmap.phys_map, efi_phys has
the __initdata attribute so it will be released/freed which will cause
problems in checks performed afterwards.
Sounds
On 5/25/2017 11:17 PM, Xunlei Pang wrote:
On 04/19/2017 at 05:21 AM, Tom Lendacky wrote:
Provide support so that kexec can be used to boot a kernel when SME is
enabled.
Support is needed to allocate pages for kexec without encryption. This
is needed in order to be able to reboot in the kernel
Add direct #include statements for declarations of csum_tcpudp_magic()
and csum_ipv6_magic(). While the needed #include's are picked up
indirectly for the x86 architecture, they aren't on other
architectures, resulting in compile errors.
Signed-off-by: Michael Kelley
---
drivers/net/hyperv/netvs
Hello everybody,
While looking into Coverity ID 1362293 I ran into the following piece
of code at drivers/net/ethernet/qlogic/qed/qed_sriov.c:3863:
3863static int
3864qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
3865{
3866struct qed_vf_info *vf;
3867
From: Jagan Teki
NanoPi M1 Plus is designed and developed by FriendlyElec
using the Allwinner 64-bit H5 SOC.
NanoPi Neo2 key features
- Allwinner H5, Quad-core 64-bit Cortex-A53
- 512MB DDR3 RAM
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC MicroUSB power-supply
Signed-o
On Tue, May 30, 2017 at 10:22:08AM -0700, Andi Kleen wrote:
> > > You would only need a single one per system however, not one per CPU.
> > > RCU already tracks all the CPUs, all we need is a single NMI watchdog
> > > that makes sure RCU itself does not get stuck.
> > >
> > > So we just have to fi
On 5/30/17 9:51 AM, Peter Zijlstra wrote:
On Tue, May 30, 2017 at 08:52:14AM -0700, Alexei Starovoitov wrote:
+ if (!(event->attach_state & PERF_ATTACH_TASK) &&
+ event->cpu != cpu)
+ return false;
we do if (unlikely(event->oncpu != cpu))
as dynamic check inside
From: CQ Tang
Requires: https://patchwork.kernel.org/patch/9593891
After a FLR, pci-states need to be restored. This patch saves PASID features
and PRI reqs cached.
To: Bjorn Helgaas
To: Joerg Roedel
To: linux-...@vger.kernel.org
To: linux-kernel@vger.kernel.org
Cc: Jean-Phillipe Brucker
Cc
Resending Jean's patch so it can be included earlier than his large
SVM commits. Original patch https://patchwork.kernel.org/patch/9593891
was ack'ed by Bjorn. Let's commit these separately since we need
functionality earlier.
Resending this series as requested by Jean.
CQ Tang (1):
PCI: Save p
From: Jean-Philippe Brucker
Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in
order to know when they can use the SVM API. Cache PRI and PASID bits in
the pci_dev structure, similarly to what is currently done for ATS.
Signed-off-by: Jean-Philippe Brucker
---
drivers/pci/a
On 05/30/2017 06:41 AM, Michael Ellerman wrote:
> Michael Bringmann writes:
>
>> When adding or removing memory, the aa_index (affinity value) for the
>> memblock must also be converted to match the endianness of the rest
>> of the 'ibm,dynamic-memory' property. Otherwise, subsequent retrieval
>
On Tue, May 30, 2017 at 4:47 PM, Paolo Bonzini wrote:
>
>
> On 19/05/2017 18:14, Roman Penyaev wrote:
>> 2. A bit complicated, which makes sure the CPL field is preserved across
>>KVM_GET/SET_SREGS calls and makes svm_set_segment() and svm_get_segment()
>>functionality symmethric:
>
> I th
Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same
register values can be set through the micrel phy driver by using dts
properties.
This seems preferable and allows cleanly fixing suspend/resume.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6ul-14x14-evk.dts | 6 +
Right now attempting doing suspend/resume while root is mounted over NFS hangs
on imx6ul-14x14-evk. This is happening because ksz8081 phy fixups are lost on
resume.
Fix this by using equivalent devicetree properties instead of a phy fixup and
handling those properties on resume in the micrel drive
These bits seem to be lost after a suspend/resume cycle so just set them
again.
This patch fixes ethernet suspend/resume on imx6ul-14x14-evk boards.
Signed-off-by: Leonard Crestez
---
drivers/net/phy/micrel.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/phy/m
On Mon, 29 May 2017 23:30:52 -0400
Jon Masters wrote:
> Following up on this thread...
>
> On 05/23/2017 06:15 PM, Alex Williamson wrote:
> > On Tue, 23 May 2017 14:22:01 -0700
> > David Daney wrote:
> >
> >> On 05/23/2017 02:04 PM, Alex Williamson wrote:
> >>> On Tue, 23 May 2017 15:47:50
Hi All,
Ping again
Thanks
Hoan
On Fri, May 5, 2017 at 8:48 AM, Hoan Tran wrote:
> Ping!
>
> Thanks
> Hoan
>
> On Thu, Apr 13, 2017 at 10:50 AM, Hoan Tran wrote:
>> Hi All,
>>
>> Do you have any comments on this patch set?
>>
>> Thanks
>> Hoan
>>
>> On Mon, Apr 3, 2017 at 9:47 AM, Hoan Tran wr
On 5/30/2017 4:13 AM, Masanobu Koike wrote:
> This RFC provides implementation of WhiteEgret.
>
> Signed-off-by: Masanobu Koike
> ---
> security/Kconfig | 7 +-
> security/Makefile | 2 +
> security/whiteegret/Kconfig| 21 ++
> security/whiteegret/M
On Tue, May 30, 2017 at 02:16:53PM +0100, Ben Hutchings wrote:
> On Tue, 2017-05-23 at 22:08 +0200, Greg Kroah-Hartman wrote:
> > 4.4-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > From: Dennis Yang
> >
> > commit 583da48e388f472e8818d
On 30/05/17 18:16, Ray Jui wrote:
> Hi Marc,
>
> On 5/30/17 9:59 AM, Marc Zyngier wrote:
>> On 30/05/17 17:49, Ray Jui wrote:
>>> Hi Will,
>>>
>>> On 5/30/17 8:14 AM, Will Deacon wrote:
On Mon, May 29, 2017 at 06:18:45PM -0700, Ray Jui wrote:
> I'm writing to check with you to see if the
On 30/05/17 17:49, Ray Jui wrote:
> Hi Will,
>
> On 5/30/17 8:14 AM, Will Deacon wrote:
>> On Mon, May 29, 2017 at 06:18:45PM -0700, Ray Jui wrote:
>>> I'm writing to check with you to see if the latest arm-smmu.c driver in
>>> v4.12-rc Linux for smmu-500 can support mapping that is only specific
On Wed, May 24, 2017 at 12:01:50PM -0400, Vince Weaver wrote:
> I already have people really grumpy that you have to have one mmap() page
> per event, meaning you sacrifice one TLB entry for each event you are
> measuring.
So there is space in that page. We could maybe look at having an array
of
Same boot problem here (Intel(R) Core(TM) i5-5200U CPU on a Dell XPS 13),
git-bisected to the same patch...
On Mon, May 29, 2017 at 06:50:57PM -0400, Mikulas Patocka wrote:
> Please do the following three tests and test if the kernel boots.
>
> 1. use the PAT patch and revert the change to the fu
On Tue, 2017-05-30 at 09:59 -0700, Dmitry Torokhov wrote:
> On Tue, May 30, 2017 at 10:23:58AM +0200, Benjamin Tissoires wrote:
> > On May 29 2017 or thereabouts, Dmitry Torokhov wrote:
> > > Instead of printing bytes one by one, let's use %phN to print the buffer
> > > in
> > > one go.
> > >
> >
> > You would only need a single one per system however, not one per CPU.
> > RCU already tracks all the CPUs, all we need is a single NMI watchdog
> > that makes sure RCU itself does not get stuck.
> >
> > So we just have to find a single watchdog somewhere that can trigger
> > NMI.
>
> But then
On Tue, May 30, 2017 at 8:03 PM, Pali Rohár wrote:
> On Tuesday 30 May 2017 17:24:54 Andy Shevchenko wrote:
>> On Sat, 2017-05-27 at 14:07 -0700, Andy Lutomirski wrote:
>> > On Sat, May 27, 2017 at 4:14 AM, Pali Rohár
>> > wrote:
>> > > > Quite a few laptops (and maybe servers?) have embedded WM
On Tue, May 30, 2017 at 10:04 AM, Oleg Nesterov wrote:
>
> I can't comment, I never tried to understand the rationality behind the
> current
> behaviour. But at least the sending path should never drop a blocked SIG_DFL
> signal, there is no other way to ensure you won't miss a signal during exec
Hi,
On Tue, May 30, 2017 at 10:06 AM, Andy Shevchenko
wrote:
> On Tue, May 30, 2017 at 7:51 PM, Douglas Anderson
> wrote:
>> In commit 9a075265c6dc ("ASoC: Intel: sst: Remove unused function
>> sst_restore_shim64()"), we deleted the sst_restore_shim64() since it
>> was never used. ...but a qui
On 5/30/2017 4:11 AM, Masanobu Koike wrote:
> WhiteEgret is an LSM to simply provide a whitelisting-type
> execution control.
>
> An execution-whitelist, simply called whitelist, is a list
> of executable components (e.g., applications, libraries)
> that are approved to run on a host. The whitelist
Could you be more specific? E.g. how are other stores done in
__init_single_page safe then? I am sorry to be dense here but how does
the full 64B store differ from other stores done in the same function.
Hi Michal,
It is safe to do regular 8-byte and smaller stores (stx, st, sth, stb)
without
Hi Marc,
On 5/30/17 9:59 AM, Marc Zyngier wrote:
> On 30/05/17 17:49, Ray Jui wrote:
>> Hi Will,
>>
>> On 5/30/17 8:14 AM, Will Deacon wrote:
>>> On Mon, May 29, 2017 at 06:18:45PM -0700, Ray Jui wrote:
I'm writing to check with you to see if the latest arm-smmu.c driver in
v4.12-rc Linu
On 30/05/17 19:08, Boris Ostrovsky wrote:
> On 05/30/2017 11:03 AM, Juergen Gross wrote:
>> On 30/05/17 15:25, Boris Ostrovsky wrote:
>>> On 05/29/2017 05:13 AM, Juergen Gross wrote:
When registering for the Xenstore watch of the node control/sysrq the
handler will be called at once. Don'
ATENCIÓN;
Su buzón ha superado el límite de almacenamiento, que es de 5 GB definidos por
el administrador, quien actualmente está ejecutando en 10.9GB, no puede ser
capaz de enviar o recibir correo nuevo hasta que vuelva a validar su buzón de
correo electrónico. Para revalidar su buzón de corre
On 05/30/2017 11:03 AM, Juergen Gross wrote:
> On 30/05/17 15:25, Boris Ostrovsky wrote:
>> On 05/29/2017 05:13 AM, Juergen Gross wrote:
>>> When registering for the Xenstore watch of the node control/sysrq the
>>> handler will be called at once. Don't issue an error message if the
>>> Xenstore nod
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