Re: [PATCH 1/2] net: ethernet: ti: cpts: convert to use kthread_worker

On Fri, Jul 21, 2017 at 06:49:42PM -0500, Grygorii Strashko wrote: > There could be significant delay in CPTS work schedule under high system > load and on -RT which could cause CPTS misbehavior due to internal counter > overflow. Usage of own kthread_worker allows to avoid such kind of issues >

Re: [PATCH 1/2] net: ethernet: ti: cpts: convert to use kthread_worker

On Fri, Jul 21, 2017 at 06:49:42PM -0500, Grygorii Strashko wrote: > There could be significant delay in CPTS work schedule under high system > load and on -RT which could cause CPTS misbehavior due to internal counter > overflow. Usage of own kthread_worker allows to avoid such kind of issues >

Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

Hi Sinan, Bjorn: On 2017/7/14 21:54, Sinan Kaya wrote: > On 7/13/2017 9:26 PM, Ding Tianhong wrote: >> There is no code to enable the PCIe Relaxed Ordering bit in the >> configuration space, >> it is only be enable by default according to the PCIe Standard >> Specification, what we >> do is to

Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

Hi Sinan, Bjorn: On 2017/7/14 21:54, Sinan Kaya wrote: > On 7/13/2017 9:26 PM, Ding Tianhong wrote: >> There is no code to enable the PCIe Relaxed Ordering bit in the >> configuration space, >> it is only be enable by default according to the PCIe Standard >> Specification, what we >> do is to

[PATCH v2] irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES

From: Hanjun Guo When running 4.13-rc1 on top of D05, I got the boot log: [0.00] SRAT: PXM 0 -> ITS 0 -> Node 0 [0.00] SRAT: PXM 0 -> ITS 1 -> Node 0 [0.00] SRAT: PXM 0 -> ITS 2 -> Node 0 [0.00] SRAT: PXM 1 -> ITS 3 -> Node 1 [0.00]

[PATCH v2] irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES

From: Hanjun Guo When running 4.13-rc1 on top of D05, I got the boot log: [0.00] SRAT: PXM 0 -> ITS 0 -> Node 0 [0.00] SRAT: PXM 0 -> ITS 1 -> Node 0 [0.00] SRAT: PXM 0 -> ITS 2 -> Node 0 [0.00] SRAT: PXM 1 -> ITS 3 -> Node 1 [0.00] SRAT: ITS affinity

Re: [PATCH] irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES

On 2017/7/21 19:42, Ganapatrao Kulkarni wrote: > Hi Hanjun, > > > On Fri, Jul 21, 2017 at 4:50 PM, Marc Zyngier wrote: >> On 21/07/17 11:06, Hanjun Guo wrote: >>> On 2017/7/21 17:51, Hanjun Guo wrote: From: Hanjun Guo When running

Re: [PATCH] irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES

On 2017/7/21 19:42, Ganapatrao Kulkarni wrote: > Hi Hanjun, > > > On Fri, Jul 21, 2017 at 4:50 PM, Marc Zyngier wrote: >> On 21/07/17 11:06, Hanjun Guo wrote: >>> On 2017/7/21 17:51, Hanjun Guo wrote: From: Hanjun Guo When running 4.13-rc1 on top of D05, I got the boot log:

[PATCH 3/3] staging: pi433: - style fix, space at start of line

Fixed checkpatch errors of "please, no spaces at the start of a line" Signed-off-by: Derek Robson --- drivers/staging/pi433/rf69.c | 4 +- drivers/staging/pi433/rf69_enum.h | 206 +++--- 2 files changed, 105 insertions(+), 105

[PATCH 3/3] staging: pi433: - style fix, space at start of line

Fixed checkpatch errors of "please, no spaces at the start of a line" Signed-off-by: Derek Robson --- drivers/staging/pi433/rf69.c | 4 +- drivers/staging/pi433/rf69_enum.h | 206 +++--- 2 files changed, 105 insertions(+), 105 deletions(-) diff --git

[PATCH 2/3] staging: pi433: - style fix, space before tabs

Fixed checkpatch errors of "no space before tabs" Signed-off-by: Derek Robson --- drivers/staging/pi433/pi433_if.c | 12 ++-- drivers/staging/pi433/pi433_if.h | 4 ++-- drivers/staging/pi433/rf69.c | 8 drivers/staging/pi433/rf69.h | 6 +++--- 4

[PATCH 2/3] staging: pi433: - style fix, space before tabs

Fixed checkpatch errors of "no space before tabs" Signed-off-by: Derek Robson --- drivers/staging/pi433/pi433_if.c | 12 ++-- drivers/staging/pi433/pi433_if.h | 4 ++-- drivers/staging/pi433/rf69.c | 8 drivers/staging/pi433/rf69.h | 6 +++--- 4 files changed, 15

[PATCH 1/3] staging: pi433: Style fix - align block comments

Fixed the alignment of block comments Found using checkpatch Signed-off-by: Derek Robson --- drivers/staging/pi433/pi433_if.c | 38 +++-- drivers/staging/pi433/rf69.c | 10 +- drivers/staging/pi433/rf69_registers.h | 280 - 3

[PATCH 1/3] staging: pi433: Style fix - align block comments

Fixed the alignment of block comments Found using checkpatch Signed-off-by: Derek Robson --- drivers/staging/pi433/pi433_if.c | 38 +++-- drivers/staging/pi433/rf69.c | 10 +- drivers/staging/pi433/rf69_registers.h | 280 - 3 files changed, 169

[PATCH 0/3] Drivers: pi433: Style fix

Assorted styel fix across whole driver Found using checkpatch Derek Robson (3): staging: pi433: Style fix - align block comments staging: pi433: - style fix, space before tabs staging: pi433: - style fix, space at start of line drivers/staging/pi433/pi433_if.c | 50 +++---

[PATCH 0/3] Drivers: pi433: Style fix

Assorted styel fix across whole driver Found using checkpatch Derek Robson (3): staging: pi433: Style fix - align block comments staging: pi433: - style fix, space before tabs staging: pi433: - style fix, space at start of line drivers/staging/pi433/pi433_if.c | 50 +++---

Re: [PATCH v3 1/3] string.h: add memcpy_and_pad()

Hi Martin, [auto build test WARNING on linus/master] [also build test WARNING on v4.13-rc1 next-20170721] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Martin-Wilck/Improve-readbility-of-NVME

Re: [PATCH v3 1/3] string.h: add memcpy_and_pad()

Hi Martin, [auto build test WARNING on linus/master] [also build test WARNING on v4.13-rc1 next-20170721] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Martin-Wilck/Improve-readbility-of-NVME

Re: [PATCH] irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES

On 2017/7/21 19:20, Marc Zyngier wrote: > On 21/07/17 11:06, Hanjun Guo wrote: >> On 2017/7/21 17:51, Hanjun Guo wrote: >>> From: Hanjun Guo >>> >>> When running 4.13-rc1 on top of D05, I got the boot log: >>> >>> [0.00] SRAT: PXM 0 -> ITS 0 -> Node 0 >>> [

Re: [PATCH] irqchip/gic-v3-its: Allow GIC ITS number more than MAX_NUMNODES

On 2017/7/21 19:20, Marc Zyngier wrote: > On 21/07/17 11:06, Hanjun Guo wrote: >> On 2017/7/21 17:51, Hanjun Guo wrote: >>> From: Hanjun Guo >>> >>> When running 4.13-rc1 on top of D05, I got the boot log: >>> >>> [0.00] SRAT: PXM 0 -> ITS 0 -> Node 0 >>> [0.00] SRAT: PXM 0 -> ITS

[PATCH v7 05/12] clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808

From: Elaine Zhang The RK808 and RK805 PMICs are using a similar register map. We can reuse the clk driver for the RK805 PMIC. So let's add the RK805 in the Kconfig description. Signed-off-by: Elaine Zhang --- drivers/clk/Kconfig | 4 ++-- 1

[PATCH v7 05/12] clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808

From: Elaine Zhang The RK808 and RK805 PMICs are using a similar register map. We can reuse the clk driver for the RK805 PMIC. So let's add the RK805 in the Kconfig description. Signed-off-by: Elaine Zhang --- drivers/clk/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

Re: [PATCH v6 0/2] x86: Implement fast refcount overflow protection

On Fri, Jul 21, 2017 at 2:22 PM, Andrew Morton wrote: > On Thu, 20 Jul 2017 11:11:06 +0200 Ingo Molnar wrote: > >> >> * Kees Cook wrote: >> >> > This implements refcount_t overflow protection on x86 without a noticeable >> >

Re: [PATCH v6 0/2] x86: Implement fast refcount overflow protection

On Fri, Jul 21, 2017 at 2:22 PM, Andrew Morton wrote: > On Thu, 20 Jul 2017 11:11:06 +0200 Ingo Molnar wrote: > >> >> * Kees Cook wrote: >> >> > This implements refcount_t overflow protection on x86 without a noticeable >> > performance impact, though without the fuller checking of

Re: [PATCH v3 2/2] acpi/iort: numa: Add numa node mapping for smmuv3 devices

Hi Ganapat, On 2017/6/8 12:44, Ganapatrao Kulkarni wrote: > Add code to parse proximity domain in SMMUv3 IORT table to > set numa node mapping for smmuv3 devices. > > Signed-off-by: Ganapatrao Kulkarni > --- > drivers/acpi/arm64/iort.c | 28

Re: [PATCH v3 2/2] acpi/iort: numa: Add numa node mapping for smmuv3 devices

Hi Ganapat, On 2017/6/8 12:44, Ganapatrao Kulkarni wrote: > Add code to parse proximity domain in SMMUv3 IORT table to > set numa node mapping for smmuv3 devices. > > Signed-off-by: Ganapatrao Kulkarni > --- > drivers/acpi/arm64/iort.c | 28 ++-- > 1 file changed, 26

Re: [PATCH v3 08/10] clk: sunxi-ng: support R40 SoC

在 2017-05-29 15:34，Chen-Yu Tsai 写道： Hi, On Sat, May 27, 2017 at 06:23:06PM +0800, Icenowy Zheng wrote: Allwinner R40 SoC have a clock controller module in the style of the SoCs beyond sun6i, however, it's more rich and complex. Add support for it. Signed-off-by: Icenowy Zheng

Re: [PATCH v3 08/10] clk: sunxi-ng: support R40 SoC

在 2017-05-29 15:34，Chen-Yu Tsai 写道： Hi, On Sat, May 27, 2017 at 06:23:06PM +0800, Icenowy Zheng wrote: Allwinner R40 SoC have a clock controller module in the style of the SoCs beyond sun6i, however, it's more rich and complex. Add support for it. Signed-off-by: Icenowy Zheng --- Changes in

Re: Moving ndctl development into the kernel tree?

[ adding Chris ] On Fri, Jul 21, 2017 at 4:44 PM, Dan Williams wrote: > On Fri, Jul 21, 2017 at 3:58 PM, Ingo Molnar wrote: >> >> * Dan Williams wrote: >> >>> [...] >>> >>> * Like perf, ndctl borrows the sub-command

Re: Moving ndctl development into the kernel tree?

[ adding Chris ] On Fri, Jul 21, 2017 at 4:44 PM, Dan Williams wrote: > On Fri, Jul 21, 2017 at 3:58 PM, Ingo Molnar wrote: >> >> * Dan Williams wrote: >> >>> [...] >>> >>> * Like perf, ndctl borrows the sub-command architecture and option >>> parsing from git. So, this code could be

[PATCH v3 0/2] Last step to working Allwinner R40 pinctrl

This patchset contains only two patches. The first one is a minor fix for the A10 pinctrl driver, add a function of a pin, which used to be missing in A10/A20 pinctrl driver. Thanks for Chen-Yu for discovering it when reviewing my R40 pinctrl patchset. The second one is the real R40 pinctrl

[PATCH v3 0/2] Last step to working Allwinner R40 pinctrl

This patchset contains only two patches. The first one is a minor fix for the A10 pinctrl driver, add a function of a pin, which used to be missing in A10/A20 pinctrl driver. Thanks for Chen-Yu for discovering it when reviewing my R40 pinctrl patchset. The second one is the real R40 pinctrl

[PATCH v3 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- Changes in v3: - Fixed a missing comma in

[PATCH v3 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- Changes in v3: - Fixed a missing comma in v2. - Added Chen-Yu's review tag.

[PATCH v3 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

The PH16 pin has a function with mux id 0x5, which is the DET pin of the "sim" (smart card reader) IP block. This function is missing in old versions of A10/A20 SoCs' datasheets and user manuals, so it's also missing in the old drivers. The newest A10 Datasheet V1.70 and A20 Datasheet V1.41

[PATCH v3 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

The PH16 pin has a function with mux id 0x5, which is the DET pin of the "sim" (smart card reader) IP block. This function is missing in old versions of A10/A20 SoCs' datasheets and user manuals, so it's also missing in the old drivers. The newest A10 Datasheet V1.70 and A20 Datasheet V1.41

[PATCH 3/3] arm64: allwinner: a64: add ethernet0 alias for SoPine EMAC node

The SoPine official baseboard uses the A64 chip's EMAC to provide an Ethernet link. Add the ethernet0 alias in the device tree, in order to let U-Boot generate a MAC address from the chip's SID. Signed-off-by: Icenowy Zheng ---

[PATCH 3/3] arm64: allwinner: a64: add ethernet0 alias for SoPine EMAC node

The SoPine official baseboard uses the A64 chip's EMAC to provide an Ethernet link. Add the ethernet0 alias in the device tree, in order to let U-Boot generate a MAC address from the chip's SID. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1

[PATCH 0/3] Add ethernet0 alias for several A64 boards

Allwinner A64 SoC has an EMAC which is used to provide Ethernet function on several boards. The EMAC itself doesn't have a fixed MAC address, but the sunxi mainline U-Boot have the ability to generate one based on the eFUSE SID in the chip, and add the generated MAC address to the device tree

[PATCH 2/3] arm64: allwinner: a64: add ethernet0 alias for Pine64 EMAC node

The Pine64 (including the Plus models) board uses the A64 chip's EMAC to provide Ethernet link. Add the ethernet0 alias in the device tree, in order to let U-Boot generate a MAC address from the chip's SID. Signed-off-by: Icenowy Zheng ---

[PATCH 0/3] Add ethernet0 alias for several A64 boards

Allwinner A64 SoC has an EMAC which is used to provide Ethernet function on several boards. The EMAC itself doesn't have a fixed MAC address, but the sunxi mainline U-Boot have the ability to generate one based on the eFUSE SID in the chip, and add the generated MAC address to the device tree

[PATCH 2/3] arm64: allwinner: a64: add ethernet0 alias for Pine64 EMAC node

The Pine64 (including the Plus models) board uses the A64 chip's EMAC to provide Ethernet link. Add the ethernet0 alias in the device tree, in order to let U-Boot generate a MAC address from the chip's SID. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |

[PATCH 1/3] arm64: allwinner: a64: add ethernet0 alias for BPi M64 EMAC node

The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet link. Add the ethernet0 alias in the device tree, in order to let U-Boot generate a MAC address from the chip's SID. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts

[PATCH 1/3] arm64: allwinner: a64: add ethernet0 alias for BPi M64 EMAC node

The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet link. Add the ethernet0 alias in the device tree, in order to let U-Boot generate a MAC address from the chip's SID. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + 1 file

[PATCH v2 2/2] arm64: allwinner: a64: add AXP803 PMIC support to SoPine and the baseboard

The SoPine SoM has an AXP803 PMIC connected to the RSB bus of the A64 SoC, and the regulators of the PMIC are used both on the SoM itself and on the official baseboard Add related device tree parts to the SoPine SoM DTSI file and the baseboard DT. Signed-off-by: Icenowy Zheng

[PATCH v2 1/2] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Add support of AXP803 regulators in the Pine64 device tree. The phy-supply regulator is also set in EMAC device node, in order to prevent Ethernet regression by regulator get disabled by regulator framework. Signed-off-by: Icenowy Zheng --- Changes in v2: - Change the min

[PATCH v2 2/2] arm64: allwinner: a64: add AXP803 PMIC support to SoPine and the baseboard

The SoPine SoM has an AXP803 PMIC connected to the RSB bus of the A64 SoC, and the regulators of the PMIC are used both on the SoM itself and on the official baseboard Add related device tree parts to the SoPine SoM DTSI file and the baseboard DT. Signed-off-by: Icenowy Zheng --- Changes in v2:

[PATCH v2 1/2] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Add support of AXP803 regulators in the Pine64 device tree. The phy-supply regulator is also set in EMAC device node, in order to prevent Ethernet regression by regulator get disabled by regulator framework. Signed-off-by: Icenowy Zheng --- Changes in v2: - Change the min voltage of vdd-cpux to

[PATCH v2 0/2] AXP803 regulators support for Pine64 and SoPine

The Pine64 and SoPine w/ baseboard boards have an AXP803 PMIC, and the regulators of the PMIC are used. This patchset adds the regulators to the device tree of these two boards. The first patch is for Pine64 and the second if for SoPine w/ official baseboard. The patches that drop the dummy

[PATCH v2 0/2] AXP803 regulators support for Pine64 and SoPine

The Pine64 and SoPine w/ baseboard boards have an AXP803 PMIC, and the regulators of the PMIC are used. This patchset adds the regulators to the device tree of these two boards. The first patch is for Pine64 and the second if for SoPine w/ official baseboard. The patches that drop the dummy

Re: [PATCH Y.A. RESEND] MAINTAINERS: fix alpha. ordering

On Fri, Jul 21, 2017 at 1:32 PM, Randy Dunlap wrote: > > and send with correct file encoding! Congratulations, you were indeed successful in fixing whatever locale issue that was biting you. Linus

Re: [PATCH Y.A. RESEND] MAINTAINERS: fix alpha. ordering

On Fri, Jul 21, 2017 at 1:32 PM, Randy Dunlap wrote: > > and send with correct file encoding! Congratulations, you were indeed successful in fixing whatever locale issue that was biting you. Linus

[PATCH v2 0/2] x86/amd: Refactor and fixup family17h cpu_core_id

Changes from V1 (https://lkml.org/lkml/2017/7/20/180) * Refactor topology extension logic into __get_topoext() (per Boris) Suravee Suthikulpanit (2): x86/amd: Refactor topology extension related code x86/amd: Fixup cpu_core_id for family17h downcore configuration arch/x86/kernel/cpu/amd.c

[PATCH v2 2/2] x86/amd: Fixup cpu_core_id for family17h downcore configuration

For family17h, current cpu_core_id is directly taken from the value CPUID_Fn801E_EBX[7:0] (CoreId), which is the physical ID of the core within a die. However, on system with downcore configuration (where not all physical cores within a die are available), this could result in the case where

[PATCH v2 1/2] x86/amd: Refactor topology extension related code

Refactoring in preparation for subsequent changes. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- arch/x86/kernel/cpu/amd.c | 79 ++- 1 file changed, 44 insertions(+), 35 deletions(-) diff --git

[PATCH v2 0/2] x86/amd: Refactor and fixup family17h cpu_core_id

Changes from V1 (https://lkml.org/lkml/2017/7/20/180) * Refactor topology extension logic into __get_topoext() (per Boris) Suravee Suthikulpanit (2): x86/amd: Refactor topology extension related code x86/amd: Fixup cpu_core_id for family17h downcore configuration arch/x86/kernel/cpu/amd.c

[PATCH v2 2/2] x86/amd: Fixup cpu_core_id for family17h downcore configuration

For family17h, current cpu_core_id is directly taken from the value CPUID_Fn801E_EBX[7:0] (CoreId), which is the physical ID of the core within a die. However, on system with downcore configuration (where not all physical cores within a die are available), this could result in the case where

[PATCH v2 1/2] x86/amd: Refactor topology extension related code

Refactoring in preparation for subsequent changes. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- arch/x86/kernel/cpu/amd.c | 79 ++- 1 file changed, 44 insertions(+), 35 deletions(-) diff --git a/arch/x86/kernel/cpu/amd.c

Re: [PATCH v3 4/5] ACPI / boot: Not all platform require acpi_reduced_hw_init()

On Sat, Jul 22, 2017 at 1:25 AM, Rafael J. Wysocki wrote: > On Tuesday, July 18, 2017 06:04:19 PM Andy Shevchenko wrote: >> Some platform might take care of legacy devices on theirs own. >> Let's allow them to do that by exporting a weak function. >> >> Signed-off-by: Andy

Re: [PATCH v3 4/5] ACPI / boot: Not all platform require acpi_reduced_hw_init()

On Sat, Jul 22, 2017 at 1:25 AM, Rafael J. Wysocki wrote: > On Tuesday, July 18, 2017 06:04:19 PM Andy Shevchenko wrote: >> Some platform might take care of legacy devices on theirs own. >> Let's allow them to do that by exporting a weak function. >> >> Signed-off-by: Andy Shevchenko > > I'd

Re: [PATCH v3 5/5] ACPI / boot: Don't handle SCI on HW reduced platforms

On Sat, Jul 22, 2017 at 1:28 AM, Rafael J. Wysocki wrote: > On Tuesday, July 18, 2017 06:04:20 PM Andy Shevchenko wrote: >> As per note in 5.2.9 Fixed ACPI Description Table (FADT) chapter of ACPI >> specification OSPM will ignore fields related to the ACPI HW register >>

Re: [PATCH v3 5/5] ACPI / boot: Don't handle SCI on HW reduced platforms

On Sat, Jul 22, 2017 at 1:28 AM, Rafael J. Wysocki wrote: > On Tuesday, July 18, 2017 06:04:20 PM Andy Shevchenko wrote: >> As per note in 5.2.9 Fixed ACPI Description Table (FADT) chapter of ACPI >> specification OSPM will ignore fields related to the ACPI HW register >> interface, one of which

[PATCH] Bluetooth: Style fix - align block comments

Fixed alignment of all block comments. Found using checkpatch Signed-off-by: Derek Robson --- drivers/bluetooth/ath3k.c | 3 ++- drivers/bluetooth/bt3c_cs.c | 8 +--- drivers/bluetooth/btmrvl_sdio.c | 6 -- drivers/bluetooth/btsdio.c | 3 ++-

[PATCH] Bluetooth: Style fix - align block comments

Fixed alignment of all block comments. Found using checkpatch Signed-off-by: Derek Robson --- drivers/bluetooth/ath3k.c | 3 ++- drivers/bluetooth/bt3c_cs.c | 8 +--- drivers/bluetooth/btmrvl_sdio.c | 6 -- drivers/bluetooth/btsdio.c | 3 ++-

Re: [PATCH 0/3] Keystone defconfig updates

On 7/17/2017 9:45 PM, santosh.shilim...@oracle.com wrote: On 7/17/17 8:26 PM, Suman Anna wrote: Hi Santosh, The following patch series adds the necessary defconfig options to keystone_defconfig to enable the TI-SCI protocol and their respective genpd/clock/reset drivers. This is the first

Re: [PATCH 0/3] Keystone defconfig updates

On 7/17/2017 9:45 PM, santosh.shilim...@oracle.com wrote: On 7/17/17 8:26 PM, Suman Anna wrote: Hi Santosh, The following patch series adds the necessary defconfig options to keystone_defconfig to enable the TI-SCI protocol and their respective genpd/clock/reset drivers. This is the first

[PATCH v2] f2fs: make background threads of f2fs being aware of freezing

From: Chao Yu When ->freeze_fs is called from lvm for doing snapshot, it needs to make sure there will be no more changes in filesystem's data, however, previously, background threads like GC thread wasn't aware of freezing, so in environment with active background threads,

[PATCH v2] f2fs: make background threads of f2fs being aware of freezing

From: Chao Yu When ->freeze_fs is called from lvm for doing snapshot, it needs to make sure there will be no more changes in filesystem's data, however, previously, background threads like GC thread wasn't aware of freezing, so in environment with active background threads, data of snapshot

Re: 4.12.0: igb: transmit queue 7 timed out

(Cc netdev and Intel) On Tue, Jul 18, 2017 at 1:57 PM, Justin Piszcz wrote: > Hello, > > Kernel: 4.12.0 > Arch: x86_64 > > What causes this issue? It is likely a igb driver issue. > > [199141.434449] NETDEV WATCHDOG: eth1 (igb): transmit queue 7 timed out >

Re: 4.12.0: igb: transmit queue 7 timed out

(Cc netdev and Intel) On Tue, Jul 18, 2017 at 1:57 PM, Justin Piszcz wrote: > Hello, > > Kernel: 4.12.0 > Arch: x86_64 > > What causes this issue? It is likely a igb driver issue. > > [199141.434449] NETDEV WATCHDOG: eth1 (igb): transmit queue 7 timed out > [199141.434501] [ cut

Re: [PATCH] f2fs: let background GC being aware of freezing

Hi Jaegeuk, On 2017/7/22 4:54, Jaegeuk Kim wrote: > Hi Chao, > > On 07/21, Chao Yu wrote: >> When ->freeze_fs is called from lvm for doing snapshot, it needs to >> make sure there will be no more changes in filesystem's data, however, >> previously, background GC wasn't aware of freezing, so in

Re: [PATCH] f2fs: let background GC being aware of freezing

Hi Jaegeuk, On 2017/7/22 4:54, Jaegeuk Kim wrote: > Hi Chao, > > On 07/21, Chao Yu wrote: >> When ->freeze_fs is called from lvm for doing snapshot, it needs to >> make sure there will be no more changes in filesystem's data, however, >> previously, background GC wasn't aware of freezing, so in

Re: [PATCH v8 1/1] f2fs: dax: implement direct access

Hi Qiuyang, This fails xfstests/generic/413. Thanks, On 07/20, sunqiuyang wrote: > From: Qiuyang Sun > > This patch implements Direct Access (DAX) in F2FS, including: > - a mount option to choose whether to enable DAX or not > - read/write and mmap of regular files in

Re: [PATCH v8 1/1] f2fs: dax: implement direct access

Hi Qiuyang, This fails xfstests/generic/413. Thanks, On 07/20, sunqiuyang wrote: > From: Qiuyang Sun > > This patch implements Direct Access (DAX) in F2FS, including: > - a mount option to choose whether to enable DAX or not > - read/write and mmap of regular files in the DAX way > -

Re: [PATCH] perf, tools: Make build fail on JSON parse error

Andi Kleen [a...@firstfloor.org] wrote: > From: Andi Kleen > > Today, when a JSON file fails parsing the build continues, > but there are no json files built in, which is difficult to debug later. > Make the build stop on a parse error instead. I see the problem and we

Re: [PATCH] perf, tools: Make build fail on JSON parse error

Andi Kleen [a...@firstfloor.org] wrote: > From: Andi Kleen > > Today, when a JSON file fails parsing the build continues, > but there are no json files built in, which is difficult to debug later. > Make the build stop on a parse error instead. I see the problem and we were being defensive to

[PATCH v1 02/13] xen/pvcalls: connect to the backend

Implement the probe function for the pvcalls frontend. Read the supported versions, max-page-order and function-calls nodes from xenstore. Introduce a data structure named pvcalls_bedata. It contains pointers to the command ring, the event channel, a list of active sockets and a list of passive

[PATCH v1 02/13] xen/pvcalls: connect to the backend

Implement the probe function for the pvcalls frontend. Read the supported versions, max-page-order and function-calls nodes from xenstore. Introduce a data structure named pvcalls_bedata. It contains pointers to the command ring, the event channel, a list of active sockets and a list of passive

[PATCH v1 03/13] xen/pvcalls: implement socket command and handle events

Send a PVCALLS_SOCKET command to the backend, use the masked req_prod_pvt as req_id. This way, req_id is guaranteed to be between 0 and PVCALLS_NR_REQ_PER_RING. We already have a slot in the rsp array ready for the response, and there cannot be two outstanding responses with the same req_id. Wait

[PATCH v1 04/13] xen/pvcalls: implement connect command

Send PVCALLS_CONNECT to the backend. Allocate a new ring and evtchn for the active socket. Introduce a data structure to keep track of sockets. Introduce a waitqueue to allow the frontend to wait on data coming from the backend on the active socket (recvmsg command). Two mutexes (one of reads

[PATCH v1 04/13] xen/pvcalls: implement connect command

Send PVCALLS_CONNECT to the backend. Allocate a new ring and evtchn for the active socket. Introduce a data structure to keep track of sockets. Introduce a waitqueue to allow the frontend to wait on data coming from the backend on the active socket (recvmsg command). Two mutexes (one of reads

[PATCH v1 03/13] xen/pvcalls: implement socket command and handle events

Send a PVCALLS_SOCKET command to the backend, use the masked req_prod_pvt as req_id. This way, req_id is guaranteed to be between 0 and PVCALLS_NR_REQ_PER_RING. We already have a slot in the rsp array ready for the response, and there cannot be two outstanding responses with the same req_id. Wait

[PATCH v1 01/13] xen/pvcalls: introduce the pvcalls xenbus frontend

Introduce a xenbus frontend for the pvcalls protocol, as defined by https://xenbits.xen.org/docs/unstable/misc/pvcalls.html. This patch only adds the stubs, the code will be added by the following patches. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC:

[PATCH v1 07/13] xen/pvcalls: implement accept command

Send PVCALLS_ACCEPT to the backend. Allocate a new active socket. Make sure that only one accept command is executed at any given time by setting PVCALLS_FLAG_ACCEPT_INFLIGHT and waiting on the inflight_accept_req waitqueue. sock->sk->sk_send_head is not used for ip sockets: reuse the field to

[PATCH v1 01/13] xen/pvcalls: introduce the pvcalls xenbus frontend

Introduce a xenbus frontend for the pvcalls protocol, as defined by https://xenbits.xen.org/docs/unstable/misc/pvcalls.html. This patch only adds the stubs, the code will be added by the following patches. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com ---

[PATCH v1 07/13] xen/pvcalls: implement accept command

Send PVCALLS_ACCEPT to the backend. Allocate a new active socket. Make sure that only one accept command is executed at any given time by setting PVCALLS_FLAG_ACCEPT_INFLIGHT and waiting on the inflight_accept_req waitqueue. sock->sk->sk_send_head is not used for ip sockets: reuse the field to

[PATCH v1 09/13] xen/pvcalls: implement recvmsg

Implement recvmsg by copying data from the "in" ring. If not enough data is available and the recvmsg call is blocking, then wait on the inflight_conn_req waitqueue. Take the active socket in_mutex so that only one function can access the ring at any given time. If not enough data is available on

[PATCH v1 09/13] xen/pvcalls: implement recvmsg

Implement recvmsg by copying data from the "in" ring. If not enough data is available and the recvmsg call is blocking, then wait on the inflight_conn_req waitqueue. Take the active socket in_mutex so that only one function can access the ring at any given time. If not enough data is available on

[PATCH v1 13/13] xen: introduce a Kconfig option to enable the pvcalls frontend

Also add pvcalls-front to the Makefile. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com --- drivers/xen/Kconfig | 9 + drivers/xen/Makefile | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/xen/Kconfig

[PATCH v1 13/13] xen: introduce a Kconfig option to enable the pvcalls frontend

Also add pvcalls-front to the Makefile. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com --- drivers/xen/Kconfig | 9 + drivers/xen/Makefile | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig index

[PATCH v1 08/13] xen/pvcalls: implement sendmsg

Send data to an active socket by copying data to the "out" ring. Take the active socket out_mutex so that only one function can access the ring at any given time. If not enough room is available on the ring, rather than returning immediately or sleep-waiting, spin for up to 5000 cycles. This

[PATCH v1 08/13] xen/pvcalls: implement sendmsg

Send data to an active socket by copying data to the "out" ring. Take the active socket out_mutex so that only one function can access the ring at any given time. If not enough room is available on the ring, rather than returning immediately or sleep-waiting, spin for up to 5000 cycles. This

[PATCH v1 12/13] xen/pvcalls: implement frontend disconnect

Implement pvcalls frontend removal function. Go through the list of active and passive sockets and free them all, one at a time. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com --- drivers/xen/pvcalls-front.c | 28

[PATCH v1 12/13] xen/pvcalls: implement frontend disconnect

Implement pvcalls frontend removal function. Go through the list of active and passive sockets and free them all, one at a time. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com --- drivers/xen/pvcalls-front.c | 28 1 file

[PATCH v1 05/13] xen/pvcalls: implement bind command

Send PVCALLS_BIND to the backend. Introduce a new structure, part of struct sock_mapping, to store information specific to passive sockets. Introduce a status field to keep track of the status of the passive socket. Introduce a waitqueue for the "accept" command (see the accept command

[PATCH v1 06/13] xen/pvcalls: implement listen command

Send PVCALLS_LISTEN to the backend. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com --- drivers/xen/pvcalls-front.c | 49 + drivers/xen/pvcalls-front.h | 1 + 2 files changed, 50 insertions(+)

[PATCH v1 06/13] xen/pvcalls: implement listen command

Send PVCALLS_LISTEN to the backend. Signed-off-by: Stefano Stabellini CC: boris.ostrov...@oracle.com CC: jgr...@suse.com --- drivers/xen/pvcalls-front.c | 49 + drivers/xen/pvcalls-front.h | 1 + 2 files changed, 50 insertions(+) diff --git

[PATCH v1 05/13] xen/pvcalls: implement bind command

Send PVCALLS_BIND to the backend. Introduce a new structure, part of struct sock_mapping, to store information specific to passive sockets. Introduce a status field to keep track of the status of the passive socket. Introduce a waitqueue for the "accept" command (see the accept command

[PATCH v1 00/13] introduce the Xen PV Calls frontend

Hi all, this series introduces the frontend for the newly introduced PV Calls procotol. PV Calls is a paravirtualized protocol that allows the implementation of a set of POSIX functions in a different domain. The PV Calls frontend sends POSIX function calls to the backend, which implements them

[PATCH v1 00/13] introduce the Xen PV Calls frontend

Hi all, this series introduces the frontend for the newly introduced PV Calls procotol. PV Calls is a paravirtualized protocol that allows the implementation of a set of POSIX functions in a different domain. The PV Calls frontend sends POSIX function calls to the backend, which implements them

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