Hi Arwind,
These files were generated by a script maintained in this repository :
https://github.com/rib/gputop/blob/master/scripts/i915-perf-kernelgen.py
It would best to update this script first to make sure future platforms
get the fixes too.
Some changes have just been merged, deleted mos
On Tue, 18 Jul 2017 14:05:07 -0700
Eric Anholt wrote:
> The vc4 driver was unusual in that it was delaying the panel lookup
> until the attach step, while most DSI hosts will -EPROBE_DEFER until
> they get a panel.
>
> v2: Drop a debug message that slipped in.
>
> Signed-off-by: Eric Anholt
>
于 2017年8月4日 GMT+08:00 下午4:59:03, "Jernej Škrabec" 写到:
>Hi Chen-Yu,
>
>Dne petek, 04. avgust 2017 ob 06:29:50 CEST je Chen-Yu Tsai napisal(a):
>> On Fri, Aug 4, 2017 at 12:16 PM, Icenowy Zheng
>wrote:
>> > 于 2017年8月4日 GMT+08:00 下午12:15:27, Chen-Yu Tsai 写到:
>> >>Hi,
>> >>
>> >>On Tue, Aug 1, 201
On Fri, Aug 4, 2017 at 9:35 AM, Boris Brezillon
wrote:
> On Fri, 21 Jul 2017 22:26:25 +0200
> Arnd Bergmann wrote:
>> Note that MTD_XIP has been broken on ARM since around 2011 or 2012. I
>> have sent another patch[2] to fix compilation, which I plan to merge
>> through arm-soc unless there are
Hi Chen-Yu,
Dne petek, 04. avgust 2017 ob 06:29:50 CEST je Chen-Yu Tsai napisal(a):
> On Fri, Aug 4, 2017 at 12:16 PM, Icenowy Zheng wrote:
> > 于 2017年8月4日 GMT+08:00 下午12:15:27, Chen-Yu Tsai 写到:
> >>Hi,
> >>
> >>On Tue, Aug 1, 2017 at 9:13 PM, Icenowy Zheng wrote:
> >>> From: Jernej Skrabec
>
On Thu, Aug 03, 2017 at 11:19:09AM -0500, David Lechner wrote:
> The fbdev subsystem has a place for physical dimensions (width and height
> in mm) that is readable by userspace. Since DRM also knows these
> dimensions, pass this information to the fbdev device.
>
> This has to be done in drm_setu
Hi Michał,
> Thank you for providing us with further information.
Again, glad to help where I can.
>> Pressing the E button brings up some kind of Energy saving applet and
>> pressing the I button brings up an applet telling me about the hardware
>> in my laptop and its current state.
>
> These
This patch fixes the __udivdi3 undefined error reported by
test robot.
Fixes: b8c17f708831 ("net: hns: Add self-adaptive interrupt coalesce support in
hns driver")
Signed-off-by: Yunsheng Lin
---
drivers/net/ethernet/hisilicon/hns/hns_enet.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(
On Tue, 18 Jul 2017 14:05:05 -0700
Eric Anholt wrote:
> The incoming mode might have a missing vrefresh field if it came from
> drmModeSetCrtc(), which the kernel is supposed to calculate using
> drm_mode_vrefresh(). We could either use that or the adjusted_mode's
> original vrefresh value.
>
>
On 08/04/2017 04:24 PM, Michal Hocko wrote:
For our use case, the callback just puts the reported page
block to the ring, then returns. If the ring is full as the host
is busy, then I think it should skip this one, and just return.
Because:
A. This is an optimization feature, losing a coup
From: "leilei.lin"
A performance issue caused by less strickly check in task
sched when these tasks were once attached by per-task perf_event.
A task will alloc task->perf_event_ctxp[ctxn] when it was called
by perf_event_open, and task->perf_event_ctxp[ctxn] would not
ever be freed to NULL.
__
On Thu, Aug 3, 2017 at 9:09 PM, Julia Lawall wrote:
> tee_driver_ops structures are only stored in the ops field of tee_desc
> structures, which is const, and in turn tee_desc structures are only passed
> as the first argument of tee_device_alloc, and this argument is const as
> well. Thus the tw
On 2017-08-04 13:25, Boris Brezillon wrote:
On Fri, 4 Aug 2017 09:53:05 +0200
Boris Brezillon wrote:
Hi Abhishek,
On Wed, 19 Jul 2017 17:17:48 +0530
Abhishek Sahu wrote:
> v2:
>
> 1. Addressed the review comments given in v1
> 2. Removed the DMA coherent buffer for register read and used
>
On Thu, Aug 03, 2017 at 03:57:53PM -0600, Toshi Kani wrote:
> Change generic x86 edac drivers, which probe CPU type with
> x86_match_cpu(), to call edac_check_mc_owner() in their
> module init functions. This allows them to fail their init
> at the beginning when ghes_edac is enabled. Similar cha
Hi, Bjorn,
Thanks very much for your reviews.
The mis-spells will be fixed in next version.
On Thu, 2017-08-03 at 17:42 -0500, Bjorn Helgaas wrote:
..
> > +}
> > +
> > +static struct mtk_pcie_port *mtk_pcie_find_port(struct mtk_pcie *pcie,
> > +
Hi Linus,
The following changes since commit 520eccdfe187591a51ea9ab4c1a024ae4d0f68d9:
Linux 4.13-rc2 (2017-07-23 16:15:17 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v4.13-rc3
for you to fetch changes up to
From: Michal Hocko
Wenwei Tao has noticed that our current assumption that the oom victim
is dying and never doing any visible changes after it dies is not
entirely true. __task_will_free_mem consider a task dying when
SIGNAL_GROUP_EXIT is set but do_group_exit sends SIGKILL to all threads
_after
From: Michal Hocko
Tetsuo Handa has noticed that MMF_UNSTABLE SIGBUS path in
handle_mm_fault causes a lockdep splat
[ 58.539455] Out of memory: Kill process 1056 (a.out) score 603 or sacrifice
child
[ 58.543943] Killed process 1056 (a.out) total-vm:4268108kB,
anon-rss:2246048kB, file-rss:0k
On Fri 04-08-17 17:25:46, Tetsuo Handa wrote:
> Well, while lockdep warning is gone, this problem is remaining.
Ohh, I should have been more specific. Both patches have to be applied.
I have based this one first because it should go to stable. The later
one needs a trivial conflict resolution. I w
On Thu, Aug 03, 2017 at 03:57:51PM -0600, Toshi Kani wrote:
> The ghes_edac driver was introduced in 2013 [1], but it has not
> been enabled by any distro yet. This driver obtains error info
> from firmware interfaces, which are not properly implemented on
> many platforms, as the driver always em
On Thu, Aug 03, 2017 at 03:57:52PM -0600, Toshi Kani wrote:
> Only a single edac driver can be enabled for EDAC MC. When ghes_edac
> is enabled, a regular edac driver for the CPU type / platform still
> attempts to register itself and fails in edac_mc_add_mc().
>
> Add edac_check_mc_owner() so th
On Wed, 19 Jul 2017 17:40:06 +0200
Thomas Petazzoni wrote:
> Hello,
>
> On Wed, 19 Jul 2017 17:31:25 +0200, Gregory CLEMENT wrote:
>
> > config MTD_NAND_PXA3xx
> > tristate "NAND support on PXA3xx and Armada 370/XP"
> > - depends on PXA3xx || ARCH_MMP || PLAT_ORION
> > + depends on PXA
Hi Linus,
Here are a couple of mmc fixes intended for v4.13-rc4.
Details are as usual found in the signed tag. Please pull this in!
Kind regards
Ulf Hansson
The following changes since commit 16f73eb02d7e1765ccab3d2018e0bd98eb93d973:
Linux 4.13-rc3 (2017-07-30 12:40:36 -0700)
are available
On Fri 04-08-17 16:15:24, Wei Wang wrote:
> On 08/04/2017 03:53 PM, Michal Hocko wrote:
> >On Fri 04-08-17 00:02:01, Michael S. Tsirkin wrote:
> >>On Thu, Aug 03, 2017 at 03:20:09PM +, Wang, Wei W wrote:
> >>>On Thursday, August 3, 2017 9:51 PM, Michal Hocko:
> As I've said earlier. Start s
On Fri, Aug 04, 2017 at 12:54:41PM +0900, Minchan Kim wrote:
> On Thu, Aug 03, 2017 at 03:13:35PM -0600, Ross Zwisler wrote:
> > On Thu, Aug 03, 2017 at 09:13:15AM +0900, Minchan Kim wrote:
> > > Hi Ross,
> > >
> > > On Wed, Aug 02, 2017 at 04:13:59PM -0600, Ross Zwisler wrote:
> > > > On Fri, Jul
On Fri, 2017-08-04 at 03:30 +0530, Himanshu Jha wrote:
> This patch fixes 80 characters limit coding style issue.
>
> Signed-off-by: Himanshu Jha
> ---
> drivers/staging/wilc1000/linux_wlan.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/staging/wilc1000/lin
On Thu, 03 Aug 2017, Cihangir Akturk wrote:
> Indeed I used a simple shell script, which I included in the cover
> letter. But the cover letter doesn't seem to show up in the mailing
> list archives for some reason. I think I have done something wrong.
For intel-gfx it was in moderation, I let it
On Fri 04-08-17 11:02:46, Igor Stoppa wrote:
>
>
> On 03/08/17 18:15, Michal Hocko wrote:
>
> > I would check the one where we have mapping. It is rather unlikely
> > vmalloc users would touch this one.
>
> That was also the initial recommendation from Jerome Glisse, but it
> seemed unusable, b
On 08/04/2017 03:53 PM, Michal Hocko wrote:
On Fri 04-08-17 00:02:01, Michael S. Tsirkin wrote:
On Thu, Aug 03, 2017 at 03:20:09PM +, Wang, Wei W wrote:
On Thursday, August 3, 2017 9:51 PM, Michal Hocko:
As I've said earlier. Start simple optimize incrementally with some numbers to
justify
Correct compatibles description and explicate fallback compatible.
Guochun Mao (1):
dt-bindings: mtd: add new compatible strings and improve description
Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
--
1.9.1
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor"
for nor flash node's compatible strings.
Explicate the fallback compatible.
Signed-off-by: Guochun Mao
---
.../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/
Hi Vince,
Thanks for taking a look.
On 2017/08/03 01:57PM, Vince Weaver wrote:
> On Tue, 1 Aug 2017, Naveen N. Rao wrote:
>
> > Add a new option 'signal_on_wakeup' to request for a signal to be
> > delivered on ring buffer wakeup controlled through watermark and
> > {wakeup_events, wakeup_waterma
enable tsadc module on RK3328 eavluation board
Signed-off-by: Rocky Hao
---
Change in v2:
- remove gerrit Change-Id
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
b/arch/arm64/boot/dts/rockchip/rk3
On 03/08/17 18:15, Michal Hocko wrote:
> I would check the one where we have mapping. It is rather unlikely
> vmalloc users would touch this one.
That was also the initial recommendation from Jerome Glisse, but it
seemed unusable, because of the related comment.
I should have asked for clarifi
This series patches add the tsadc support in thermal driver and in devicetree
for rk3328.
Also add thermal control with Intelligent Power Allocation (IPA) policy by
default. Please
refer to https://developer.arm.com/open-source/intelligent-power-allocation for
more information
about IPA.
Rocky
attempt to new compatible for thermal founding on RK3328 SoC.
Signed-off-by: Rocky Hao
---
Change in v2:
- remove gerrit Change-Id
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/thermal/rockchi
add tsadc needed main information for rk3328 SoC.
5Hz is the max clock rate supported by tsadc module.
Signed-off-by: Rocky Hao
---
Change in v2:
- remove gerrit Change-Id
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch
add thermal zone and dynamic CPU power coefficients for rk3328
Signed-off-by: Rocky Hao
---
Change in v2:
- remove gerrit Change-Id
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 43
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.
David Miller writes:
> From: Mikael Pettersson
> Date: Thu, 3 Aug 2017 22:02:57 +0200
>
> > With that in place the kernel booted fine.
> > When I then ran the `poll' strace test binary, the OOPS was replaced by:
> >
> > [ 140.589913] _copy_from_user(fff000123c8dfa7c, (null), 24
RK3328 SOC has one Temperature Sensor for CPU.
Signed-off-by: Rocky Hao
---
Change in v2:
- remove gerrit Change-Id
drivers/thermal/rockchip_thermal.c | 65 ++
1 file changed, 65 insertions(+)
diff --git a/drivers/thermal/rockchip_thermal.c
b/drivers/therma
On Thu 03-08-17 14:17:26, Paul Moore wrote:
> On Thu, Aug 3, 2017 at 7:05 AM, Michal Hocko wrote:
> > On Thu 03-08-17 19:44:46, Tetsuo Handa wrote:
[...]
> >> When allocating thread is selected as an OOM victim, it gets TIF_MEMDIE.
> >> Since that function might be called from !in_interrupt() cont
On Fri, 4 Aug 2017 09:49:52 +0200
Boris Brezillon wrote:
> On Wed, 19 Jul 2017 17:17:59 +0530
> Abhishek Sahu wrote:
>
> > Currently driver data is being assigned directly with ECC modes.
> > Now, the plan is to add more NAND controller versions, so
> > reorganized the current driver data assig
On Fri, 4 Aug 2017 09:53:05 +0200
Boris Brezillon wrote:
> Hi Abhishek,
>
> On Wed, 19 Jul 2017 17:17:48 +0530
> Abhishek Sahu wrote:
>
> > v2:
> >
> > 1. Addressed the review comments given in v1
> > 2. Removed the DMA coherent buffer for register read and used
> >streaming DMA API’s
> >
On Fri 04-08-17 00:02:01, Michael S. Tsirkin wrote:
> On Thu, Aug 03, 2017 at 03:20:09PM +, Wang, Wei W wrote:
> > On Thursday, August 3, 2017 9:51 PM, Michal Hocko:
> > > As I've said earlier. Start simple optimize incrementally with some
> > > numbers to
> > > justify a more subtle code.
>
Hi Abhishek,
On Wed, 19 Jul 2017 17:17:48 +0530
Abhishek Sahu wrote:
> v2:
>
> 1. Addressed the review comments given in v1
> 2. Removed the DMA coherent buffer for register read and used
>streaming DMA API’s
> 3. Reorganized the NAND read and write functions
> 4. Separated patch for driver
Sorry, NACK this series, there's error to hang system. Before I just
halt system intentionally with error() to check the efi memmap printing,
didn't notice this. Checking the cause.
On 08/04/17 at 03:26pm, Baoquan He wrote:
> Patch 1/2 is newly added to add efi_memdesc_ptr helper to wrap the
> ope
On Wed, 19 Jul 2017 17:17:59 +0530
Abhishek Sahu wrote:
> Currently driver data is being assigned directly with ECC modes.
> Now, the plan is to add more NAND controller versions, so
> reorganized the current driver data assignment by creating NAND
> controller properties structure. This will co
On 4.8.2017 00:32, Rob Herring wrote:
> On Fri, Jul 28, 2017 at 03:17:26PM +0200, Michal Simek wrote:
>> From: Nava kishore Manne
>>
>> This patch fixes the below warning
>> --> Use #include instead of
>> --> Use #include instead of
>> --> please, no space before tabs
>
On Wed, 2 Aug 2017 13:51:45 +0530
Archit Taneja wrote:
> On 07/19/2017 05:17 PM, Abhishek Sahu wrote:
> > This is reorganization of exiting code and will not change any
> > functionality. The NAND controller supports multiple NAND device
> > with different page size. The subsequent patch allocate
On Wed, 19 Jul 2017 17:17:57 +0530
Abhishek Sahu wrote:
> The memset in clear_read_regs is overhead. All the register data
> will be filled by DMA during NAND operation so making these
> register variables zero is not required.
>
Applied.
Thanks,
Boris
> Signed-off-by: Abhishek Sahu
> ---
>
On Wed, 19 Jul 2017 17:17:56 +0530
Abhishek Sahu wrote:
> Each NAND page consist of multiple codewords. Following is
> sequence for NAND page write according to hardware guide.
>
> 1. Program Power-up configuration, page row, page column
>address and flash configuration registers.
> 2. Write
On Wed, 19 Jul 2017 17:17:55 +0530
Abhishek Sahu wrote:
> Each NAND page consist of multiple codewords. Following is
> sequence for NAND page read according to hardware guide.
>
> 1. Program Power-up configuration, page row, page column
> address and flash configuration registers.
> 2. Write NAN
On Wed, 19 Jul 2017 17:17:54 +0530
Abhishek Sahu wrote:
> Currently the compatible “qcom,nandcs” is being used for each
> connected NAND device to support for multiple NAND devices in the
> same bus. The same thing can be achieved by looking reg property
> for each sub nodes which contains the ch
Fixed 4 style issues in select.c reported by checkpatch.pl.
Signed-off-by: Ray Huang
---
fs/select.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/fs/select.c b/fs/select.c
index 9d5f15e..f7d97d7 100644
--- a/fs/select.c
+++ b/fs/select.c
On Wed, 19 Jul 2017 17:17:53 +0530
Abhishek Sahu wrote:
> Currently the compatible “qcom,nandcs” is being used for each
> connected NAND device to support for multiple NAND devices in the
> same bus. The same thing can be achieved by looking reg property
> for each sub nodes which contains the ch
On Wed, 19 Jul 2017 17:17:49 +0530
Abhishek Sahu wrote:
> The configuration for BCH is not correct in the current driver.
> The ECC_CFG_ECC_DISABLE bit defines whether to enable or disable the
> BCH ECC in which
>
> 0x1 : BCH_DISABLED
> 0x0 : BCH_ENABLED
>
> But currently host->bch_
On 31/07/17 18:26, Marc Zyngier wrote:
> When a vPE is not running, a VLPI being made pending results in a
> doorbell interrupt being delivered. Let's handle this interrupt
> and update the pending_last flag that indicates that VLPIs are
> pending. The corresponding vcpu is also kicked into action.
improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Johan-Hovold/dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe/20170804-014620
> config: microblaze-mmu_defconfig (attached as .config)
> compiler: microblaze-linux-gcc (GCC) 6.2.0
>
On Wed, 14 Jun 2017 23:15:40 +0200
Arnd Bergmann wrote:
> When CONFIG_KASAN is used, we consume a lot of extra stack space:
>
> drivers/mtd/chips/cfi_cmdset_0020.c: In function 'do_write_buffer':
> drivers/mtd/chips/cfi_cmdset_0020.c:603:1: error: the frame size of 2184
> bytes is larger than 1
On Fri 04-08-17 15:46:46, Tetsuo Handa wrote:
> Michal Hocko wrote:
> > So there is a race window when some threads
> > won't have fatal_signal_pending while the oom_reaper could start
> > unmapping the address space. generic_perform_write could then write
> > zero page to
Geachte heer mevrouw
Bent u op zoek naar een betaalbare lening om uw project te financieren, een
rekening te betalen, investeringen, een nieuwe auto of huis te verwerven, is
Marsh Finance Ltd de juiste plaats. Wij werken onder korte, duidelijke en
begrijpelijke voorwaarden. Wij bieden leninge
Give read access to module parameters to all and write access to root.
This change also improves driver error path testing.
Signed-off-by: Michal Simek
---
Please let me know what you think - I can use macros from stat.h if
required
---
drivers/watchdog/cadence_wdt.c | 4 ++--
1 file changed,
Showing message that driver is loaded is common across drivers.
This change also fixes checkpatch (--strict) warning
"Alignment should match open parenthesis".
Signed-off-by: Michal Simek
---
drivers/watchdog/cadence_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driv
[Please add all the irqchip maintainers when posting irqchip patches...]
On 03/08/17 04:38, Zhao Qiang wrote:
> QEIC was supported on PowerPC, and dependent on PPC,
> Now it is supported on other platforms, so remove PPCisms.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/platforms/83xx/km8
On Fri, 21 Jul 2017 22:26:25 +0200
Arnd Bergmann wrote:
> When XIP_KERNEL is enabled, some functions are defined in the .data
> ELF section because we require them to be in RAM whenever we communicate
> with the flash chip. However this causes problems when FTRACE is
> enabled and gcc emits calls
On Fri, 21 Jul 2017 22:38:06 +0200
Arnd Bergmann wrote:
> orion_nand_read_buf uses an inline assembly with the "ldrd"
> instruction, which is only available from ARMv5 upwards. This
> used to be fine, since all users have an ARMv5 or ARMv7 CPU,
> but now we can also build a multiplatform kernel w
On Tue, 1 Aug 2017 17:05:08 +0530
Arvind Yadav wrote:
> clk_prepare_enable() can fail here and we must check its return value.
> *_probe() can fail here and we must disable clock.
>
> Arvind Yadav (6):
> [PATCH 1/6] mtd: nand: denali: Handle return value of clk_prepare_enable.
> [PATCH 2/6]
The existing map iteration helper for_each_efi_memory_desc_in_map can
only be used after OS initializes EFI to fill data of struct efi_memory_map.
Before that we also need iterate map descriptors which are stored in several
intermediate structures, like struct efi_boot_memmap for arch independent
u
Den 04.08.2017 00.33, skrev David Lechner:
This adds parameters for vaddr and clip to tinydrm_xrgb_to_gray8() to
make it more generic.
dma_buf_{begin,end}_cpu_access() are moved out to the repaper driver.
Signed-off-by: David Lechner
---
drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c |
Currently KASLR will parse all e820 entries of RAM type and add all
candidate position into slots array. Then we will choose one slot
randomly as the new position which kernel will be decompressed into
and run at.
On system with EFI enabled, e820 memory regions are coming from EFI
memory regions b
Patch 1/2 is newly added to add efi_memdesc_ptr helper to wrap the
open code which gets the start of efi memmap descriptor and also
explain why it need be done like that, Ingo suggested it.
And also replace several places of the open code with efi_memdesc_ptr
helper.
And also use efi_memdesc_ptr
> Il giorno 03 ago 2017, alle ore 13:01, Mel Gorman
> ha scritto:
>
> On Thu, Aug 03, 2017 at 11:21:59AM +0200, Paolo Valente wrote:
>>> For Paulo, if you want to try preemptively dealing with regression reports
>>> before 4.13 releases then all the tests in question can be reproduced with
>>>
Assign the Axis kernel team as maintainer for crypto drivers under
drivers/crypto/axis.
Signed-off-by: Lars Persson
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d5b6c71e783e..72186cf9820d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1129,6
This series adds a driver for the crypto accelerator in the ARTPEC series of
SoCs from Axis Communications AB.
Changelog v3:
- The patch author added his Signed-off-by on patch 2.
Changelog v2:
- Use xts_check_key() for xts keys.
- Use CRYPTO_ALG_TYPE_SKCIPHER instead of CRYPTO_ALG_TYPE_ABLKCIPHE
From: Rabin Vincent
There are already helpers to (un)register multiple normal
and AEAD algos. Add one for ahashes too.
Signed-off-by: Lars Persson
Signed-off-by: Rabin Vincent
---
crypto/ahash.c | 29 +
include/crypto/internal/hash.h | 2 ++
2 fil
This is an asynchronous crypto API driver for the accelerator present
in the ARTPEC-6 and -7 SoCs from Axis Communications AB.
The driver supports AES in ECB/CTR/CBC/XTS/GCM modes and SHA1/2 hash
standards.
Signed-off-by: Lars Persson
---
drivers/crypto/Kconfig | 21 +
drivers/c
Document the device tree bindings for the ARTPEC crypto accelerator on
ARTPEC-6 and ARTPEC-7 SoCs.
Signed-off-by: Lars Persson
---
.../devicetree/bindings/crypto/artpec6-crypto.txt| 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/binding
From: Sean Wang
This updates dt-binding documentation for MediaTek MT7622 and
MT7623 SoC. For the both SoCs supported all rely on the fallback
binding of the case with "mediatek,mt6589-wdt".
Signed-off-by: Sean Wang
---
Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 2 ++
1 file chan
On Tue, 1 Aug 2017, Arvind Yadav wrote:
> pci_device_id are not supposed to change at runtime. All functions
> working with pci_device_id provided by work with
> const pci_device_id. So mark the non-const structs as const.
>
> Signed-off-by: Arvind Yadav
I've merged all the agp ones into drm-
On Fri, 4 Aug 2017 10:38:26 +0800
"David.Wu" wrote:
> Hi Boris，
>
> 在 2017/8/2 19:40, Boris Brezillon 写道:
> > Yep, just define 3 different pwm_ops (one for each IP), each of them
> > implementing ->apply() and ->get_state() and that's all.
> >
> > Something like:
> >
> > static const struct pw
Commit 0ee5941 : (x86/panic: replace smp_send_stop() with kdump friendly
version in panic path) introduced crash_smp_send_stop() which is a weak
function and can be overriden by architecture codes to fix the side effect
caused by commit f06e515 : (kernel/panic.c: add "crash_kexec_post_
notifiers"
From: "Gautham R. Shenoy"
Currently, we use the opal call opal_slw_set_reg() to inform the
Sleep-Winkle Engine (SLW) to restore the contents of some of the
Hypervisor state on wakeup from deep idle states that lose full
hypervisor context (characterized by the flag
OPAL_PM_LOSE_FULL_CONTEXT).
Ho
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