From: Haiyang Zhang
Update Documentation/networking/netvsc.txt for TCP hash level setting
and related info.
Signed-off-by: Haiyang Zhang
---
Documentation/networking/netvsc.txt | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/networking/netvsc.txt
b/Do
From: Haiyang Zhang
The patch supports the options to switch TCP hash level between
L3 and L4 by ethtool command. TCP over IPv4 and v6 can be set
differently. The default hash level is L4. We currently only
allow switching TX hash level from within the guests.
For example, for TCP over IPv4 on e
From: Haiyang Zhang
The patch set simplifies the existing hash level switching code for
UDP. It also adds the support for changing TCP hash level. So users
can switch between L3 an L4 hash levels for TCP and UDP.
Haiyang Zhang (3):
hv_netvsc: Change the hash level variable to bit flags
hv_ne
Hi Andre,
On 06/10/2017 16:37, Andre Przywara wrote:
> Hi,
>
> On 27/09/17 14:28, Eric Auger wrote:
>> From: wanghaibin
>>
>> This patch fix the migrate restore tables failure.
>>
>> The same scene, at the destination, the restore tables
>> interface traversal guest memory, and check the dte/ite
On Fri, Oct 6, 2017 at 8:21 AM, Paolo Abeni wrote:
> Hi,
>
> On Fri, 2017-10-06 at 07:37 -0700, Eric Dumazet wrote:
>> On Fri, 2017-10-06 at 14:57 +0200, Paolo Abeni wrote:
>> > Enabling CONFIG_RCU_NOREF_DEBUG gives the following splat when
>> > processing tcp packets:
>> >
>> >to-be-u
On 10/06/2017 10:32 AM, Josh Poimboeuf wrote:
> On Thu, Oct 05, 2017 at 04:35:03PM -0400, Boris Ostrovsky wrote:
>>> #ifdef CONFIG_PARAVIRT
>>> +/*
>>> + * Paravirt alternatives are applied much earlier than normal alternatives.
>>> + * They are only applied when running on a hypervisor. They rep
Hi,
Please pull these couple lkdtm changes for -next.
Thanks!
-Kees
The following changes since commit e19b205be43d11bff638cad4487008c48d21c103:
Linux 4.14-rc2 (2017-09-24 16:38:56 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git
I posted v4 patch https://patchwork.kernel.org/patch/9989667/ with parentheses
around a macro parameter.
-Original Message-
From: Timur Tabi [mailto:ti...@codeaurora.org]
Sent: Friday, October 6, 2017 9:26 AM
To: Shanker Donthineni
Cc: Marc Zyngier ; linux-kernel
; linux-arm-kernel
;
Hi Andre,
On 06/10/2017 16:38, Andre Przywara wrote:
> Hi,
>
> On 27/09/17 14:28, Eric Auger wrote:
>> In case the device table save fails, we currently do not
>> attempt to save the collection table. However it may
>> happen that the device table fails because the structures
>> in memory are inc
Hi,
On 06/10/2017 16:37, Andre Przywara wrote:
> Hi,
>
> On 27/09/17 14:28, Eric Auger wrote:
>> If the GITS_CBASER Size field is 0, which can correspond to a
>> reset value, the userspace fails to set the GITS_CREADR/CWRITER
>> offsets to 0. This failure is not justified.
>>
>> Let's allow this
Hi Andre,
On 06/10/2017 16:38, Andre Przywara wrote:
> Hi,
>
> On 27/09/17 14:28, Eric Auger wrote:
>> At the moment vgic_its_process_commands() does not
>> check the CBASER is valid before processing any command.
>> Let's fix that.
>
> Good catch, but actually it goes a bit further:
>
> "When
Hi Michal,
As I've said in other reply this should go in only if the scenario you
describe is real. I am somehow suspicious to be honest. I simply do not
see how those weird struct pages would be in a valid pfn range of any
zone.
There are examples of both when unavailable memory is not part
On Mon, Oct 02, 2017 at 11:12:20AM +0200, Jiri Slaby wrote:
>SYM_CODE_INNER_LABEL -- only for labels in the middle of code
>SYM_CODE_INNER_LABEL_NOALIGN -- only for labels in the middle of code
Why are the inner labels aligned by default? Seems like unaligned would
be the most common case
A new feature Range Selector (RS) has been added to GIC specification
in order to support more than 16 CPUs at affinity level 0. New fields
are introduced in SGI system registers (ICC_SGI0R_EL1, ICC_SGI1R_EL1
and ICC_ASGI1R_EL1) to relax an artificial limit of 16 at level 0.
- A new RSS field in I
Hi,
On Fri, 2017-10-06 at 07:37 -0700, Eric Dumazet wrote:
> On Fri, 2017-10-06 at 14:57 +0200, Paolo Abeni wrote:
> > Enabling CONFIG_RCU_NOREF_DEBUG gives the following splat when
> > processing tcp packets:
> >
> >to-be-untracked noref entity 942cb71ea300 not found in cache
> >
On Mon, Oct 02, 2017 at 11:56:48AM -0400, Joe Lawrence wrote:
> When an incoming module is considered for livepatching by
> klp_module_coming(), it iterates over multiple patches and multiple
> kernel objects in this order:
>
> list_for_each_entry(patch, &klp_patches, list) {
>
From: Markus Elfring
Date: Fri, 6 Oct 2017 16:27:26 +0200
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
kernel/module.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-
After disable periodic writeback by writing 0 to
dirty_writeback_centisecs, the handler wb_workfn() will not be
entered again until the dirty background limit reaches or
sync syscall is executed or no enough free memory available or
vmscan is triggered.
So the periodic writeback can't be enabled by
Hi,
On Fri, 2017-10-06 at 06:34 -0700, Paul E. McKenney wrote:
> On Fri, Oct 06, 2017 at 02:57:45PM +0200, Paolo Abeni wrote:
> > The networking subsystem is currently using some kind of long-lived
> > RCU-protected, references to avoid the overhead of full book-keeping.
> >
> > Such references -
Use put_unaligned_le32 rather than using byte ordering function and
memcpy which makes code clear.
Also, add the header file where it is declared.
Done using Coccinelle and semantic patch used is :
@ rule1 @
identifier tmp; expression ptr,x; type T;
@@
- tmp = cpu_to_le32(x);
<+... when != tm
Use put_unaligned_le32 rather than using byte ordering function and
memcpy which makes code clear.
Also, add the header file where it is declared.
Done using Coccinelle and semantic patch used is :
@ rule1 @
identifier tmp; expression ptr,x; type T;
@@
- tmp = cpu_to_le32(x);
<+... when != tm
2017-10-06 15:17+0200, Radim Krčmář:
> 2017-10-05 18:54-0700, Wanpeng Li:
> > From: Wanpeng Li
> >
> > If we take TSC-deadline mode timer out of the picture, the Intel SDM
> > does not say that the timer is disable when the timer mode is change,
> > either from one-shot to periodic or vice versa.
On Fri, 6 Oct 2017 11:10:38 +0200
Greg Kroah-Hartman wrote:
> Way back in 2008 we didn't have "robust" in-kernel documentation system,
> so the idea of putting something like the kernel driver statement in the
> kernel tree wasn't even imagined. But now that has changed, so add the
> old documen
2017-10-06 16:51+0200, Paolo Bonzini:
> On 06/10/2017 16:38, Wanpeng Li wrote:
> > + now = ktime_get();
> > + remaining = ktime_sub(apic->lapic_timer.target_expiration, now);
>
> Still need to compare against zero here. I guess Radim can do it.
I added the expression from v7 while applying,
On 10/06/2017 10:00 AM, Marek Vasut wrote:
On 10/06/2017 04:56 PM, Thor Thayer wrote:
gentle ping...
On 09/29/2017 11:07 AM, thor.tha...@linux.intel.com wrote:
From: Thor Thayer
Allow ARM64 support for the Cadence QSPI interface by
adding ARM64 as a dependency.
Signed-off-by: Thor Thayer
On 10/06/2017 04:56 PM, Thor Thayer wrote:
> gentle ping...
>
>
> On 09/29/2017 11:07 AM, thor.tha...@linux.intel.com wrote:
>> From: Thor Thayer
>>
>> Allow ARM64 support for the Cadence QSPI interface by
>> adding ARM64 as a dependency.
>>
>> Signed-off-by: Thor Thayer
Reviewed-by: Marek Vas
On 10/06/2017 04:49 AM, Michal Simek wrote:
> On 26.9.2017 20:15, Philip Balister wrote:
>> On 09/26/2017 02:06 PM, Michal Simek wrote:
>>> On 26.9.2017 19:58, Philip Balister wrote:
On 09/26/2017 01:50 PM, Moritz Fischer wrote:
> Michal,
>
> On Tue, Sep 26, 2017 at 02:54:48PM +020
On Fri, Oct 06, 2017 at 01:09:42PM +1100, Dave Chinner wrote:
> On Thu, Oct 05, 2017 at 12:16:19PM -0400, J. Bruce Fields wrote:
> > This kind of restriction sounds more like a permanent feature of the
> > filesystem--something you'd set at mkfs time.
> >
> > We already have filesystems with these
On Fri, 6 Oct 2017 13:50:44 +
"Stahl, Manuel" wrote:
> MSI(X) interrupts are not shared between devices. So when available
> those should be preferred over legacy interrupts.
>
> Signed-off-by: Manuel Stahl
> ---
> drivers/uio/uio_pci_dmem_genirq.c | 27 ---
> drive
On Thu, Oct 05, 2017 at 12:07:57PM +0200, Olivier Galibert wrote:
> On Tue, Oct 3, 2017 at 5:22 AM, Adam Borowski wrote:
> > Well, what about just \n then? Unlike all the others which are relatively
> > straightforward, \n requires -print0 which not all programs implement, and
> > way too many pe
gentle ping...
On 09/29/2017 11:07 AM, thor.tha...@linux.intel.com wrote:
From: Thor Thayer
Allow ARM64 support for the Cadence QSPI interface by
adding ARM64 as a dependency.
Signed-off-by: Thor Thayer
---
drivers/mtd/spi-nor/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On 06/10/2017 16:38, Wanpeng Li wrote:
> + now = ktime_get();
> + remaining = ktime_sub(apic->lapic_timer.target_expiration, now);
Still need to compare against zero here. I guess Radim can do it.
Paolo
> + ns_remaining_old = ktime_to_ns(remaining);
> + ns_remaining_new = mul_u6
On 10/04/2017 06:49 PM, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to passing in the timer pointer explicitly.
> Calculate the drive from the offset of the timer in the timer list.
Applied for 4.15.
--
Jens Axboe
On 10/04/2017 06:48 PM, Kees Cook wrote:
> This converts the amifloppy driver to pass the timer pointer to the
> callback instead of the drive number (and flags). It eliminates the
> decusagecounter flag, as it was unused, and drops the ininterrupt flag
> which appeared to be a needless optimizatio
On 06/10/2017 15:23, Daniel Vetter wrote:
On Fri, Oct 06, 2017 at 12:34:02PM +0100, Tvrtko Ursulin wrote:
On 06/10/2017 10:06, Daniel Vetter wrote:
4.14-rc1 gained the fancy new cross-release support in lockdep, which
seems to have uncovered a few more rules about what is allowed and
isn't.
Em Fri, 6 Oct 2017 11:10:38 +0200
Greg Kroah-Hartman escreveu:
> Way back in 2008 we didn't have "robust" in-kernel documentation system,
> so the idea of putting something like the kernel driver statement in the
> kernel tree wasn't even imagined. But now that has changed, so add the
> old docu
On 06/10/17 15:26, Julien Thierry wrote:
>
>
> On 06/10/17 15:00, Marc Zyngier wrote:
>> On 06/10/17 14:47, Alex Bennée wrote:
>>>
>>> Marc Zyngier writes:
>>>
On 06/10/17 13:37, Marc Zyngier wrote:
> On 06/10/17 12:39, Alex Bennée wrote:
>> The system state of KVM when using usersp
On Tue, Oct 03, 2017 at 07:05:17PM +0100, Robin Murphy wrote:
> Now, there are indeed plenty of drivers and subsystems which do work on
> lists of explicitly single pages - anything doing some variant of
> "addr = kmap_atomic(sg_page(sg)) + sg->offset;" is easy to spot - but I
> don't think DMA API
2017-10-06 22:21 GMT+08:00 Paolo Bonzini :
> On 06/10/2017 16:01, Wanpeng Li wrote:
>> + if (!apic->lapic_timer.period)
>> + return;
>> +
>> + now = ktime_get();
>> + remaining = ktime_sub(apic->lapic_timer.target_expiration, now);
>> + if (ktime_to_ns(remaining) < 0)
>>
Hi,
On 27/09/17 14:28, Eric Auger wrote:
> At the moment vgic_its_process_commands() does not
> check the CBASER is valid before processing any command.
> Let's fix that.
Good catch, but actually it goes a bit further:
"When GITS_CTLR.Enabled is written from 0 to 1 behavior is UNPREDICTABLE
if a
Hi,
On 27/09/17 14:28, Eric Auger wrote:
> In case the device table save fails, we currently do not
> attempt to save the collection table. However it may
> happen that the device table fails because the structures
> in memory are inconsistent with device GITS_BASER however
> this does not mean co
From: Wanpeng Li
The description in the Intel SDM of how the divide configuration
register is used: "The APIC timer frequency will be the processor's bus
clock or core crystal clock frequency divided by the value specified in
the divide configuration register."
Observation of baremetal shown tha
On Fri, Oct 06, 2017 at 01:09:42PM +1100, Dave Chinner wrote:
> On Thu, Oct 05, 2017 at 12:16:19PM -0400, J. Bruce Fields wrote:
> > This kind of restriction sounds more like a permanent feature of the
> > filesystem--something you'd set at mkfs time.
> >
> > We already have filesystems with these
Hi,
On 27/09/17 14:28, Eric Auger wrote:
> If the GITS_CBASER Size field is 0, which can correspond to a
> reset value, the userspace fails to set the GITS_CREADR/CWRITER
> offsets to 0. This failure is not justified.
>
> Let's allow this setting which can also correspond to a reset value.
But t
Hi,
On 27/09/17 14:28, Eric Auger wrote:
> At the moment the device table save() returns -EINVAL if
> vgic_its_check_id() fails to return the gpa of the entry
> associated to the device/collection id. Let vgic_its_check_id()
> return an int instead of a bool and return a more precised
> error valu
Hi,
On 27/09/17 14:28, Eric Auger wrote:
> At the moment we don't properly check the GITS_BASER.Valid
> bit before saving the collection and device tables.
>
> On Collection table save() we use the gpa field whereas the Valid bit
> should be used. On device table save() there is no check. This ca
On Fri, 2017-10-06 at 14:57 +0200, Paolo Abeni wrote:
> Enabling CONFIG_RCU_NOREF_DEBUG gives the following splat when
> processing tcp packets:
>
>to-be-untracked noref entity 942cb71ea300 not found in cache
>[ cut here ]
>WARNING: C
Hi,
On 27/09/17 14:28, Eric Auger wrote:
> From: wanghaibin
>
> This patch fix the migrate restore tables failure.
>
> The same scene, at the destination, the restore tables
> interface traversal guest memory, and check the dte/ite
> is valid or not. If all dtes/ites are invalid, we will do
>
On Fri, Oct 06, 2017 at 09:35:16AM +0200, Vitaly Kuznetsov wrote:
> Josh Poimboeuf writes:
>
> > - For the most common runtime cases (everything except Xen and vSMP),
> > vmlinux disassembly now matches what the actual runtime code looks
> > like. This improves debuggability and kernel devel
On Fri, Oct 6, 2017 at 5:07 PM, Bjorn Helgaas wrote:
> On Thu, Aug 31, 2017 at 10:20:29AM +0530, Oza Pawandeep wrote:
>> This patch implements PCI hotplug support for iproc family chipsets.
>>
>> iproc based SOC (e.g. Stingray) does not have hotplug controller
>> integrated.
>> Hence, standard PCI
On Thu, Oct 05, 2017 at 04:35:03PM -0400, Boris Ostrovsky wrote:
>
> > #ifdef CONFIG_PARAVIRT
> > +/*
> > + * Paravirt alternatives are applied much earlier than normal alternatives.
> > + * They are only applied when running on a hypervisor. They replace some
> > + * native instructions with ca
Hi Linus,
The following changes since commit 9e66317d3c92ddaab330c125dfe9d06eee268aff:
Linux 4.14-rc3 (2017-10-01 14:54:54 -0700)
are available in the git repository at:
https://github.com/ceph/ceph-client.git tags/ceph-for-4.14-rc4
for you to fetch changes up to 38f340ccdf9ed5f1350505b46c
>> +
>> + heap_type = ion_info->heap_type;
>> + heap_size = ion_info->heap_size;
>> + flag_type = ion_info->flag_type;
>> + alloc_data.len = heap_size;
>> + alloc_data.heap_id_mask = heap_type;
>
> The heap type and heap ID are not the same thing. You need
> to determine the hea
On 10/06/2017 02:20 AM, Christoph Hellwig wrote:
>> -static void blk_rq_timed_out_timer(unsigned long data)
>> +static void blk_rq_timed_out_timer(struct timer_list *t)
>> {
>> -struct request_queue *q = (struct request_queue *)data;
>> +struct request_queue *q = from_timer(q, t, timeout);
On 06/10/17 14:45, Alex Bennée wrote:
Julien Thierry writes:
On 06/10/17 12:39, Alex Bennée wrote:
The system state of KVM when using userspace emulation is not complete
until we return into KVM_RUN. To handle mmio related updates we wait
until they have been committed and then schedule ou
On Thu, Oct 5, 2017 at 2:38 AM, Leon Romanovsky wrote:
> On Wed, Oct 04, 2017 at 05:51:54PM -0700, Kees Cook wrote:
>> In preparation for unconditionally passing the struct timer_list pointer to
>> all timer callbacks, switch to using the new timer_setup() and from_timer()
>> to pass the timer poi
On Thu, Oct 5, 2017 at 6:59 PM, Shanker Donthineni
wrote:
> +#define MPIDR_TO_SGI_CLUSTER_ID(mpidr) (mpidr & ~0xFUL)
This should be "((mpidr) & 0xFUL)", just to be safe.
On 06/10/17 15:00, Marc Zyngier wrote:
On 06/10/17 14:47, Alex Bennée wrote:
Marc Zyngier writes:
On 06/10/17 13:37, Marc Zyngier wrote:
On 06/10/17 12:39, Alex Bennée wrote:
The system state of KVM when using userspace emulation is not complete
until we return into KVM_RUN. To handle mm
On Fri, Oct 06, 2017 at 12:34:02PM +0100, Tvrtko Ursulin wrote:
>
> On 06/10/2017 10:06, Daniel Vetter wrote:
> > 4.14-rc1 gained the fancy new cross-release support in lockdep, which
> > seems to have uncovered a few more rules about what is allowed and
> > isn't.
> >
> > This one here seems to
On 06/10/2017 16:01, Wanpeng Li wrote:
> + if (!apic->lapic_timer.period)
> + return;
> +
> + now = ktime_get();
> + remaining = ktime_sub(apic->lapic_timer.target_expiration, now);
> + if (ktime_to_ns(remaining) < 0)
> + remaining = 0;
> + delta = mod_64
On Fri, Oct 06, 2017 at 12:03:49PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2017-10-06 10:06:37)
> > stop_machine is not really a locking primitive we should use, except
> > when the hw folks tell us the hw is broken and that's the only way to
> > work around it.
> >
> > This patch trie
2017-10-06 22:03+0800, Wanpeng Li:
> 2017-10-06 21:03 GMT+08:00 Radim Krčmář :
> > 2017-10-06 07:14+0800, Wanpeng Li:
> >> 2017-10-06 2:14 GMT+08:00 Radim Krčmář :
> >> > 2017-10-05 07:35-0700, Wanpeng Li:
> >> >> From: Wanpeng Li
> >> >> + remaining =
> >> >> ktime_sub(apic->lapic_ti
On 10/05/2017 05:13 PM, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
Applied to for-4.15/timer
--
Jens Axboe
On Fri, Oct 06, 2017 at 11:20:11AM +0200, Greg Kroah-Hartman wrote:
>On Fri, Oct 06, 2017 at 02:09:14AM -0700, Joe Perches wrote:
>> On Fri, 2017-10-06 at 10:53 +0200, Greg Kroah-Hartman wrote:
>> > 4.4-stable review patch. If anyone has any objections, please let me know.
>>
>> I hope this patch
On 10/06/2017 07:49 AM, Rakesh Pandit wrote:
> Hi Jens,
>
> On Tue, Oct 03, 2017 at 09:16:21AM -0600, Jens Axboe wrote:
>> This tunable has been obsolete since 2.6.32, and writes to the
>> file have been failing and complaining in dmesg since then:
>>
>> nr_pdflush_threads exported in /proc is sch
2017-10-06 21:59+0800, Wanpeng Li:
> 2017-10-06 21:14 GMT+08:00 Radim Krčmář :
> > 2017-10-05 18:54-0700, Wanpeng Li:
> >> From: Wanpeng Li
> >>
> >> The description in the Intel SDM of how the divide configuration
> >> register is used: "The APIC timer frequency will be the processor's bus
> >> c
On Fri, 6 Oct 2017 14:57:46 +0200
Paolo Abeni wrote:
> We currently lack a debugging infrastructure to ensure that
> long-lived noref dst are properly handled - namely dropped
> or converted to a refcounted version before escaping the current
> RCU section.
>
> This changeset implements such in
On Fri, Oct 06, 2017 at 12:12:41PM +0200, Thomas Gleixner wrote:
> On Fri, 6 Oct 2017, Chris Wilson wrote:
> > Quoting Daniel Vetter (2017-10-06 10:06:37)
> > > stop_machine is not really a locking primitive we should use, except
> > > when the hw folks tell us the hw is broken and that's the only
On 10/05/2017 02:48 AM, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Intel SCU Linux support
> Cc: Artur Paszkiewicz
> C
On 10/06/2017 01:50 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.9.54 release.
There are 104 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be m
On 10/06/2017 01:52 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.4.91 release.
There are 50 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be ma
2017-10-06 21:03 GMT+08:00 Radim Krčmář :
> 2017-10-06 07:14+0800, Wanpeng Li:
>> 2017-10-06 2:14 GMT+08:00 Radim Krčmář :
>> > 2017-10-05 07:35-0700, Wanpeng Li:
>> >> From: Wanpeng Li
>> >> + remaining = ktime_sub(apic->lapic_timer.target_expiration,
>> >> now);
>> >> +
On 10/06/2017 02:24 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 3.18.74 release.
There are 35 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be m
On Fri, Oct 06, 2017 at 02:38:21PM +0300, Konstantin Khlebnikov wrote:
> Kmemleak considers any pointers as task stacks as references.
^^
on
> This patch clears newly allocated and reused vmap stacks.
>
> Signed-off-by: Konstanti
From: Wanpeng Li
The description in the Intel SDM of how the divide configuration
register is used: "The APIC timer frequency will be the processor's bus
clock or core crystal clock frequency divided by the value specified in
the divide configuration register."
Observation of baremetal shown tha
On 6 October 2017 at 13:53, Jiri Slaby wrote:
> Hi,
>
> On 10/04/2017, 09:33 AM, Ard Biesheuvel wrote:
>> On 4 October 2017 at 08:22, Jiri Slaby wrote:
>>> On 10/02/2017, 02:48 PM, Ard Biesheuvel wrote:
On 2 October 2017 at 10:12, Jiri Slaby wrote:
> There is a couple of assembly functi
On 06/10/17 14:47, Alex Bennée wrote:
>
> Marc Zyngier writes:
>
>> On 06/10/17 13:37, Marc Zyngier wrote:
>>> On 06/10/17 12:39, Alex Bennée wrote:
The system state of KVM when using userspace emulation is not complete
until we return into KVM_RUN. To handle mmio related updates we wa
2017-10-06 21:14 GMT+08:00 Radim Krčmář :
> 2017-10-05 18:54-0700, Wanpeng Li:
>> From: Wanpeng Li
>>
>> The description in the Intel SDM of how the divide configuration
>> register is used: "The APIC timer frequency will be the processor's bus
>> clock or core crystal clock frequency divided by t
Hi Anshuman,
Thank you very much for looking at this. My reply below::
On 10/06/2017 02:48 AM, Anshuman Khandual wrote:
On 10/04/2017 08:59 PM, Pavel Tatashin wrote:
This patch fixes another existing issue on systems that have holes in
zones i.e CONFIG_HOLES_IN_ZONE is defined.
In for_each_me
On Thu, Oct 5, 2017 at 8:44 PM, Rob Herring wrote:
> On kernels with a minimal config and a RAM target in the 100s of KB, DT
> is quite a hog of runtime memory usage. How much is dependent on how many
> nodes and properties in the DT which have a corresponding struct device_node
> and struct prope
On Fri, Oct 06, 2017 at 02:39:25PM +0300, Konstantin Khlebnikov wrote:
> Kmemleak could be tweaked in runtime by writing commands into debugfs file.
> Root anyway can use it, but without write-bit this interface isn't obvious.
>
> Signed-off-by: Konstantin Khlebnikov
> ---
> mm/kmemleak.c |2
On Tue, Oct 3, 2017 at 12:39 PM, Pantelis Antoniou
wrote:
> Hi Rob,
>
> On Tue, 2017-10-03 at 12:13 -0500, Rob Herring wrote:
>> On Tue, Oct 3, 2017 at 9:13 AM, Pantelis Antoniou
>> wrote:
>> > Hi Rob,
>> >
>> > On Tue, 2017-10-03 at 08:18 -0500, Rob Herring wrote:
>> >> On Mon, Oct 2, 2017 at 2:
On 06/10/17 14:47, Jassi Brar wrote:
> On Fri, Oct 6, 2017 at 7:02 PM, Sudeep Holla wrote:
>>
>>
>> On 06/10/17 12:26, Jassi Brar wrote:
>>> On Wed, Oct 4, 2017 at 5:06 PM, Arnd Bergmann wrote:
On Thu, Sep 28, 2017 at 3:11 PM, Sudeep Holla wrote:
> This patch adds ARM MHU specific mai
MSI(X) interrupts are not shared between devices. So when available
those should be preferred over legacy interrupts.
Signed-off-by: Manuel Stahl
---
drivers/uio/uio_pci_dmem_genirq.c | 27 ---
drivers/uio/uio_pci_generic.c | 24 ++--
2 files chang
Hi Jens,
On Tue, Oct 03, 2017 at 09:16:21AM -0600, Jens Axboe wrote:
> This tunable has been obsolete since 2.6.32, and writes to the
> file have been failing and complaining in dmesg since then:
>
> nr_pdflush_threads exported in /proc is scheduled for removal
>
> That was 8 years ago. Remove t
Marc Zyngier writes:
> On 06/10/17 13:37, Marc Zyngier wrote:
>> On 06/10/17 12:39, Alex Bennée wrote:
>>> The system state of KVM when using userspace emulation is not complete
>>> until we return into KVM_RUN. To handle mmio related updates we wait
>>> until they have been committed and then s
On Fri, Oct 6, 2017 at 7:02 PM, Sudeep Holla wrote:
>
>
> On 06/10/17 12:26, Jassi Brar wrote:
>> On Wed, Oct 4, 2017 at 5:06 PM, Arnd Bergmann wrote:
>>> On Thu, Sep 28, 2017 at 3:11 PM, Sudeep Holla wrote:
This patch adds ARM MHU specific mailbox interface for SCMI.
Cc: Arnd Ber
On Fri, Oct 06, 2017 at 01:33:32PM +, Stahl, Manuel wrote:
>
> Signed-off-by: Manuel Stahl
> ---
> drivers/uio/uio_pci_dmem_genirq.c | 27 ---
> drivers/uio/uio_pci_generic.c | 24 ++--
> 2 files changed, 38 insertions(+), 13 deletions(-)
I ca
Julien Thierry writes:
> On 06/10/17 12:39, Alex Bennée wrote:
>> The system state of KVM when using userspace emulation is not complete
>> until we return into KVM_RUN. To handle mmio related updates we wait
>> until they have been committed and then schedule our KVM_EXIT_DEBUG.
>>
>> I've intr
On 06/10/17 14:34, Jassi Brar wrote:
> On Fri, Oct 6, 2017 at 6:57 PM, Sudeep Holla wrote:
>>
>>
>> On 06/10/17 12:34, Jassi Brar wrote:
>>> On Wed, Oct 4, 2017 at 5:02 PM, Sudeep Holla wrote:
>>>
Also, I have added shim only for specific controllers that need them.
E.g. ARM MHU as Ja
On Fri, 6 Oct 2017 00:28:21 -0700
Joel Fernandes wrote:
> Oh ok. So I traced this down to the original patch that added
> time_hardirqs_off to lockdep. I *think* it was added just to keep the
> irqsoff tracer working while lockdep is enabled, so that both lockdep
> and the tracer would work at
On Fri, Oct 06, 2017 at 02:57:45PM +0200, Paolo Abeni wrote:
> The networking subsystem is currently using some kind of long-lived
> RCU-protected, references to avoid the overhead of full book-keeping.
>
> Such references - skb_dst() noref - are stored inside the skbs and can be
> moved across re
Now that the qrwlock can make use of WFE, remove our homebrew rwlock
code in favour of the generic queued implementation.
Signed-off-by: Will Deacon
---
arch/arm64/Kconfig | 17
arch/arm64/include/asm/Kbuild | 1 +
arch/arm64/include/asm/spinlock.h |
The qrwlock slowpaths involve spinning when either a prospective reader
is waiting for a concurrent writer to drain, or a prospective writer is
waiting for concurrent readers to drain. In both of these situations,
atomic_cond_read_acquire can be used to avoid busy-waiting and make use
of any backof
smp_cond_load_acquire provides a way to spin on a variable with acquire
semantics until some conditional expression involing the variable is
satisfied. Architectures such as arm64 can potentially enter a low-power
state, waking up only when the value of the variable changes, which
reduces the syste
There's no good reason to keep the internal structure of struct qrwlock
hidden from qrwlock.h, particularly as it's actually needed for unlock
and ends up being abstracted independently behind the __qrwlock_write_byte
function.
Stop pretending we can hide this stuff, and move the __qrwlock definit
Hi all,
This is version two of the patches I posted yesterday:
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-October/534666.html
I'd normally leave it longer before posting again, but Peter had a good
suggestion to rework the layout of the lock word, so I wanted to post a
version
When a prospective writer takes the qrwlock locking slowpath due to the
lock being held, it attempts to cmpxchg the wmode field from 0 to
_QW_WAITING so that concurrent lockers also take the slowpath and queue
on the spinlock accordingly, allowing the lockers to drain.
Unfortunately, this isn't fa
On Fri, Oct 6, 2017 at 6:57 PM, Sudeep Holla wrote:
>
>
> On 06/10/17 12:34, Jassi Brar wrote:
>> On Wed, Oct 4, 2017 at 5:02 PM, Sudeep Holla wrote:
>>
>>> Also, I have added shim only for specific controllers that need them.
>>> E.g. ARM MHU as Jassi disagreed to add doorbell mechanism to that.
On Fri, 2017-10-06 at 12:28 +0200, Sebastian Andrzej Siewior wrote:
> On 2017-10-06 04:20:31 [+0200], Mike Galbraith wrote:
> > On Thu, 2017-10-05 at 17:54 +0200, Sebastian Andrzej Siewior wrote:
> > > On 2017-10-04 18:07:59 [+0200], Mike Galbraith wrote:
> > > > Seems combo-patch induced some ltp
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