Re: [PATCH 3/3] trace: print address if symbol not found

Hi Tobin, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.15-rc4 next-20171219] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits

Re: [PATCH 3/3] trace: print address if symbol not found

Hi Tobin, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.15-rc4 next-20171219] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits

Re: [PATCH 1/2] staging: lustre: use strim instead of cfs_trimwhite.

On Dec 18, 2017, at 16:01, NeilBrown wrote: > > Linux lib provides identical functionality to cfs_trimwhite, > so discard that code and use the standard. > > Signed-off-by: NeilBrown Reviewed-by: Andreas Dilger > --- >

Re: [PATCH 1/2] staging: lustre: use strim instead of cfs_trimwhite.

On Dec 18, 2017, at 16:01, NeilBrown wrote: > > Linux lib provides identical functionality to cfs_trimwhite, > so discard that code and use the standard. > > Signed-off-by: NeilBrown Reviewed-by: Andreas Dilger > --- > .../lustre/include/linux/libcfs/libcfs_string.h|1 - >

Re: [PATCH 2/2] staging: lustre: disable preempt while sampling processor id.

On Dec 18, 2017, at 16:01, NeilBrown wrote: > > Calling smp_processor_id() without disabling preemption > triggers a warning (if CONFIG_DEBUG_PREEMPT). > I think the result of cfs_cpt_current() is only used as a hint for > load balancing, rather than as a precise and stable

Re: [PATCH 2/2] staging: lustre: disable preempt while sampling processor id.

On Dec 18, 2017, at 16:01, NeilBrown wrote: > > Calling smp_processor_id() without disabling preemption > triggers a warning (if CONFIG_DEBUG_PREEMPT). > I think the result of cfs_cpt_current() is only used as a hint for > load balancing, rather than as a precise and stable indicator of > the

Re: [PATCH linux-next] mqueue: fix IPC namespace use-after-free

Al Viro writes: > On Tue, Dec 19, 2017 at 03:49:24PM -0600, Eric W. Biederman wrote: >> > what would you be delaying? kmem_cache_alloc() for struct mount and >> > assignments >> > to its fields? That's noise; if anything, I would expect the main cost >> > with >> > a

Re: [PATCH linux-next] mqueue: fix IPC namespace use-after-free

Al Viro writes: > On Tue, Dec 19, 2017 at 03:49:24PM -0600, Eric W. Biederman wrote: >> > what would you be delaying? kmem_cache_alloc() for struct mount and >> > assignments >> > to its fields? That's noise; if anything, I would expect the main cost >> > with >> > a plenty of containers to

[PATCH v6 01/18] PCI: dwc: Use the DMA-API to get the MSI address

Use the DMA-API to get the MSI address. This address will be written to our PCI config space and to the register which determines which AXI address the DWC IP will spoof for incoming MSI irqs. Since it is a PCIe endpoint device, rather than the CPU, that is supposed to write to the MSI address,

[PATCH v6 01/18] PCI: dwc: Use the DMA-API to get the MSI address

Use the DMA-API to get the MSI address. This address will be written to our PCI config space and to the register which determines which AXI address the DWC IP will spoof for incoming MSI irqs. Since it is a PCIe endpoint device, rather than the CPU, that is supposed to write to the MSI address,

[PATCH v6 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support

This is a series that adds: - PCI endpoint mode support in the ARTPEC-6 driver. - ARTPEC-7 SoC support in the ARTPEC-6 driver (the SoCs are very similar). - Small fixes for MSI in designware-ep and designware-host, needed to get endpoint mode support working for ARTPEC-6. - Cleanups in

[PATCH v6 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support

This is a series that adds: - PCI endpoint mode support in the ARTPEC-6 driver. - ARTPEC-7 SoC support in the ARTPEC-6 driver (the SoCs are very similar). - Small fixes for MSI in designware-ep and designware-host, needed to get endpoint mode support working for ARTPEC-6. - Cleanups in

[PATCH v6 04/18] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init

Certain SoCs need to map the MSI address in raise_irq. To map an address, you first need to call pci_epc_mem_alloc_addr(), however, pci_epc_mem_alloc_addr() calls ioremap() (which can sleep). Since raise_irq is only called from atomic context, we can't call pci_epc_mem_alloc_addr() from

[PATCH v6 04/18] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init

Certain SoCs need to map the MSI address in raise_irq. To map an address, you first need to call pci_epc_mem_alloc_addr(), however, pci_epc_mem_alloc_addr() calls ioremap() (which can sleep). Since raise_irq is only called from atomic context, we can't call pci_epc_mem_alloc_addr() from

[PATCH v6 05/18] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar()

Remove the static keyword from dw_pcie_ep_reset_bar() so that pci-dra7xx.c does not need its own copy of dw_pcie_ep_reset_bar(). Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pci-dra7xx.c | 9 -

Re: [PATCH v4 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding

On Tue, Dec 19, 2017 at 07:15:43PM +0800, Kaihua Zhong wrote: > From: Leo Yan > > Introduce a binding for the Hi3660 mailbox controller, the mailbox is > used within application processor (AP), communication processor (CP), > HIFI and MCU, etc. > > Signed-off-by: Leo Yan

[PATCH v6 05/18] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar()

Remove the static keyword from dw_pcie_ep_reset_bar() so that pci-dra7xx.c does not need its own copy of dw_pcie_ep_reset_bar(). Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pci-dra7xx.c | 9 - drivers/pci/dwc/pcie-designware-ep.c | 2 +-

Re: [PATCH v4 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding

On Tue, Dec 19, 2017 at 07:15:43PM +0800, Kaihua Zhong wrote: > From: Leo Yan > > Introduce a binding for the Hi3660 mailbox controller, the mailbox is > used within application processor (AP), communication processor (CP), > HIFI and MCU, etc. > > Signed-off-by: Leo Yan > --- >

[PATCH v6 06/18] PCI: designware-ep: Add generic function for raising MSI irq

Add a generic function for raising MSI irqs that can be used by all DWC based controllers. Note that certain controllers, like DRA7xx, have a special convenience register for raising MSI irqs that doesn't require you to explicitly map the MSI address. Therefore, it is likely that certain drivers

[PATCH v6 06/18] PCI: designware-ep: Add generic function for raising MSI irq

Add a generic function for raising MSI irqs that can be used by all DWC based controllers. Note that certain controllers, like DRA7xx, have a special convenience register for raising MSI irqs that doesn't require you to explicitly map the MSI address. Therefore, it is likely that certain drivers

Re: [PATCH v6 00/11] Intel SGX Driver

On Tue, 2017-12-12 at 15:07 +0100, Pavel Machek wrote: > On Sat 2017-11-25 21:29:17, Jarkko Sakkinen wrote: > > Intel(R) SGX is a set of CPU instructions that can be used by applications > > to > > set aside private regions of code and data. The code outside the enclave is > > disallowed to

Re: [PATCH v6 00/11] Intel SGX Driver

On Tue, 2017-12-12 at 15:07 +0100, Pavel Machek wrote: > On Sat 2017-11-25 21:29:17, Jarkko Sakkinen wrote: > > Intel(R) SGX is a set of CPU instructions that can be used by applications > > to > > set aside private regions of code and data. The code outside the enclave is > > disallowed to

[PATCH v6 10/18] PCI: dwc: artpec6: Remove unused defines

Commit b015b37e6693 ("PCI: artpec6: Stop enabling writes to DBI read-only registers") removed the only write using these defines, but it did not remove the defines. Remove the defines since they are now unused. Signed-off-by: Niklas Cassel ---

[PATCH v6 10/18] PCI: dwc: artpec6: Remove unused defines

Commit b015b37e6693 ("PCI: artpec6: Stop enabling writes to DBI read-only registers") removed the only write using these defines, but it did not remove the defines. Remove the defines since they are now unused. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 3 --- 1 file

Re: [RFC PATCH 01/60] hyper_dmabuf: initial working version of hyper_dmabuf drv

I forgot to include this brief information about this patch series. This patch series contains the implementation of a new device driver, hyper_dmabuf, which provides a method for DMA-BUF sharing across different OSes running on the same virtual OS platform powered by a hypervisor. Detailed

[PATCH v6 09/18] PCI: dwc: dra7xx: Help compiler to remove unused code

The dra7xx driver supports both host and ep mode. When enabling support for only one of the modes, help the compiler to remove code for the mode that we have not enabled in the driver. By adding if (!IS_ENABLED(CONFIG_PCI_DRA7XX_HOST)) return -ENODEV; anything after that statement will get

Re: [RFC PATCH 01/60] hyper_dmabuf: initial working version of hyper_dmabuf drv

I forgot to include this brief information about this patch series. This patch series contains the implementation of a new device driver, hyper_dmabuf, which provides a method for DMA-BUF sharing across different OSes running on the same virtual OS platform powered by a hypervisor. Detailed

[PATCH v6 09/18] PCI: dwc: dra7xx: Help compiler to remove unused code

The dra7xx driver supports both host and ep mode. When enabling support for only one of the modes, help the compiler to remove code for the mode that we have not enabled in the driver. By adding if (!IS_ENABLED(CONFIG_PCI_DRA7XX_HOST)) return -ENODEV; anything after that statement will get

[PATCH v6 12/18] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions

Split artpec6_pcie_establish_link() into smaller functions to better match other drivers such as dra7xx and imx6. This is also done to prepare for endpoint mode support. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 55

[PATCH v6 12/18] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions

Split artpec6_pcie_establish_link() into smaller functions to better match other drivers such as dra7xx and imx6. This is also done to prepare for endpoint mode support. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 55 ++ 1 file

[PATCH v6 17/18] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC

Add support for the ARTPEC-7 SoC in the artpec6 driver. The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar. Unfortunately, some fields in the PCIECFG and PCIESTAT register have changed. Signed-off-by: Niklas Cassel Acked-by: Rob Herring ---

[PATCH v6 17/18] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC

Add support for the ARTPEC-7 SoC in the artpec6 driver. The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar. Unfortunately, some fields in the PCIECFG and PCIESTAT register have changed. Signed-off-by: Niklas Cassel Acked-by: Rob Herring ---

[PATCH v6 16/18] PCI: dwc: artpec6: Deassert the core before waiting for PHY

Waiting for the PHY while the core was held in reset worked for artpec6, but for artpec7, in order to read the required registers, the core has to be out of reset. Refactor the code so we always wait for the PHY after the core has been deasserted, since this works for both artpec6 and artpec7.

[PATCH v6 16/18] PCI: dwc: artpec6: Deassert the core before waiting for PHY

Waiting for the PHY while the core was held in reset worked for artpec6, but for artpec7, in order to read the required registers, the core has to be out of reset. Refactor the code so we always wait for the PHY after the core has been deasserted, since this works for both artpec6 and artpec7.

[PATCH v6 11/18] PCI: dwc: artpec6: Use BIT and GENMASK macros

Use BIT and GENMASK macros to improve readability. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/pci/dwc/pcie-artpec6.c

[PATCH v6 15/18] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument

The current cpu addr fixup mask for ARTPEC-6, GENMASK(27, 0), is wrong. The correct cpu addr fixup mask for ARTPEC-6 is GENMASK(28, 0). However, having a hardcoded cpu addr fixup mask in each driver is arguably wrong. A device tree property called something like "cpu-addr-fixup-mask" would have

[PATCH v6 11/18] PCI: dwc: artpec6: Use BIT and GENMASK macros

Use BIT and GENMASK macros to improve readability. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/pci/dwc/pcie-artpec6.c b/drivers/pci/dwc/pcie-artpec6.c index

[PATCH v6 15/18] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument

The current cpu addr fixup mask for ARTPEC-6, GENMASK(27, 0), is wrong. The correct cpu addr fixup mask for ARTPEC-6 is GENMASK(28, 0). However, having a hardcoded cpu addr fixup mask in each driver is arguably wrong. A device tree property called something like "cpu-addr-fixup-mask" would have

[PATCH v6 13/18] bindings: PCI: artpec: Add support for endpoint mode

The PCIe controller integrated in ARTPEC-6 SoCs is capable of operating in endpoint mode. Add endpoint mode support to the artpec6 driver. Signed-off-by: Niklas Cassel Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt

[PATCH v6 14/18] PCI: dwc: artpec6: Add support for endpoint mode

The PCIe controller integrated in ARTPEC-6 SoCs is capable of operating in endpoint mode. Add endpoint mode support to the artpec6 driver. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/Kconfig| 23 +-- drivers/pci/dwc/pcie-artpec6.c | 152

[PATCH v6 18/18] PCI: dwc: artpec6: Add support for the ARTPEC-7 SoC

Add support for the ARTPEC-7 SoC in the artpec6 driver. The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar. Unfortunately, some fields in the PCIECFG and PCIESTAT register have changed. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 187

[PATCH v6 13/18] bindings: PCI: artpec: Add support for endpoint mode

The PCIe controller integrated in ARTPEC-6 SoCs is capable of operating in endpoint mode. Add endpoint mode support to the artpec6 driver. Signed-off-by: Niklas Cassel Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt | 3 ++- 1 file changed, 2

[PATCH v6 14/18] PCI: dwc: artpec6: Add support for endpoint mode

The PCIe controller integrated in ARTPEC-6 SoCs is capable of operating in endpoint mode. Add endpoint mode support to the artpec6 driver. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/Kconfig| 23 +-- drivers/pci/dwc/pcie-artpec6.c | 152

[PATCH v6 18/18] PCI: dwc: artpec6: Add support for the ARTPEC-7 SoC

Add support for the ARTPEC-7 SoC in the artpec6 driver. The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar. Unfortunately, some fields in the PCIECFG and PCIESTAT register have changed. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-artpec6.c | 187

[PATCH v6 07/18] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode

Refactor the Kconfig and Makefile handling for host/ep mode, since the previous handling was a bit unorthodox and would have been a bit bloated once more DWC based controllers added support for ep mode. Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I

[PATCH v6 07/18] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode

Refactor the Kconfig and Makefile handling for host/ep mode, since the previous handling was a bit unorthodox and would have been a bit bloated once more DWC based controllers added support for ep mode. Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I --- drivers/pci/dwc/Kconfig

[PATCH v6 08/18] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe

Assign pp->ops in *_add_pcie_port() to match how it is done in other drivers like exynos, imx7, keystone, armada8k, artpec6, designware-plat, hisi, kirin and spear13xx. This is probably a remainder since when dev and ops were assigned as members to pp. Since we now assign them as members to

[PATCH v6 08/18] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe

Assign pp->ops in *_add_pcie_port() to match how it is done in other drivers like exynos, imx7, keystone, armada8k, artpec6, designware-plat, hisi, kirin and spear13xx. This is probably a remainder since when dev and ops were assigned as members to pp. Since we now assign them as members to

[PATCH v6 03/18] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable

Certain registers that pcie-designware-ep tries to write to are read-only registers. However, these registers can become read/write if we first enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after writing these registers. Signed-off-by: Niklas Cassel

[PATCH v6 03/18] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable

Certain registers that pcie-designware-ep tries to write to are read-only registers. However, these registers can become read/write if we first enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after writing these registers. Signed-off-by: Niklas Cassel ---

[PATCH v6 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits

Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control register, thus overwriting the PCI_MSI_FLAGS_64BIT bit. By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI on systems where the RC has set a 64 bit MSI address. Fix dw_pcie_ep_set_msi() so that it only sets MMC bits.

[PATCH v6 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits

Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control register, thus overwriting the PCI_MSI_FLAGS_64BIT bit. By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI on systems where the RC has set a 64 bit MSI address. Fix dw_pcie_ep_set_msi() so that it only sets MMC bits.

Re: [PATCH v2 8/9] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller

On Mon, Dec 18, 2017 at 07:16:08PM +0100, Cyrille Pitchen wrote: > This patch documents the DT bindings for the Cadence PCIe controller > when configured in endpoint mode. > > Signed-off-by: Cyrille Pitchen > --- >

Re: [PATCH v2 8/9] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller

On Mon, Dec 18, 2017 at 07:16:08PM +0100, Cyrille Pitchen wrote: > This patch documents the DT bindings for the Cadence PCIe controller > when configured in endpoint mode. > > Signed-off-by: Cyrille Pitchen > --- > .../devicetree/bindings/pci/cdns,cdns-pcie-ep.txt | 23 >

Re: [PATCH v2 5/9] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe host controller

On Mon, Dec 18, 2017 at 07:16:05PM +0100, Cyrille Pitchen wrote: > From: Scott Telford > > This patch adds documentation for the DT bindings of the Cadence PCIe > controller when configured in host (Root Complex) mode. > > Signed-off-by: Scott Telford

Re: [PATCH v2 5/9] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe host controller

On Mon, Dec 18, 2017 at 07:16:05PM +0100, Cyrille Pitchen wrote: > From: Scott Telford > > This patch adds documentation for the DT bindings of the Cadence PCIe > controller when configured in host (Root Complex) mode. > > Signed-off-by: Scott Telford > Signed-off-by: Cyrille Pitchen > --- >

Re: [PATCH] kfree_rcu() should use the new kfree_bulk() interface for freeing rcu structures

On 12/19/2017 02:12 PM, Matthew Wilcox wrote: On Tue, Dec 19, 2017 at 09:41:58PM +0100, Jesper Dangaard Brouer wrote: If I had to implement this: I would choose to do the optimization in __rcu_process_callbacks() create small on-call-stack ptr-array for kfree_bulk(). I would only optimize

Re: [PATCH] kfree_rcu() should use the new kfree_bulk() interface for freeing rcu structures

On 12/19/2017 02:12 PM, Matthew Wilcox wrote: On Tue, Dec 19, 2017 at 09:41:58PM +0100, Jesper Dangaard Brouer wrote: If I had to implement this: I would choose to do the optimization in __rcu_process_callbacks() create small on-call-stack ptr-array for kfree_bulk(). I would only optimize

Re: [PATCH 2/4] perf/x86/intel: fix event update for auto-reload

On 12/19/2017 5:07 PM, Peter Zijlstra wrote: On Tue, Dec 19, 2017 at 03:08:58PM -0500, Liang, Kan wrote: This all looks very wrong... In auto reload we should never call intel_pmu_save_and_restore() in the first place I think. Things like x86_perf_event_update() and

Re: [PATCH 2/4] perf/x86/intel: fix event update for auto-reload

On 12/19/2017 5:07 PM, Peter Zijlstra wrote: On Tue, Dec 19, 2017 at 03:08:58PM -0500, Liang, Kan wrote: This all looks very wrong... In auto reload we should never call intel_pmu_save_and_restore() in the first place I think. Things like x86_perf_event_update() and

RE: [intel-sgx-kernel-dev] [PATCH v5 06/11] intel_sgx: driver for Intel Software Guard Extensions

On Tuesday, December 19, 2017 Jarkko Sakkinen wrote: > On Tue, 2017-12-19 at 18:52 +, Christopherson, Sean J wrote: > > > We can cache tokens in future in the kernel space, can't we? > > > > Yes, but why? Deferring to userspace is less complex and likely > > more performant. > > That's

RE: [intel-sgx-kernel-dev] [PATCH v5 06/11] intel_sgx: driver for Intel Software Guard Extensions

On Tuesday, December 19, 2017 Jarkko Sakkinen wrote: > On Tue, 2017-12-19 at 18:52 +, Christopherson, Sean J wrote: > > > We can cache tokens in future in the kernel space, can't we? > > > > Yes, but why? Deferring to userspace is less complex and likely > > more performant. > > That's

Re: BUG: bad usercopy in memdup_user

On Tue, Dec 19, 2017 at 1:48 PM, Al Viro wrote: > On Tue, Dec 19, 2017 at 01:36:46PM -0800, Linus Torvalds wrote: > >> I suspect that an "offset and size within the kernel object" value >> might make sense. But what does the _pointer_ tell you? > > Well, for example

Re: BUG: bad usercopy in memdup_user

On Tue, Dec 19, 2017 at 1:48 PM, Al Viro wrote: > On Tue, Dec 19, 2017 at 01:36:46PM -0800, Linus Torvalds wrote: > >> I suspect that an "offset and size within the kernel object" value >> might make sense. But what does the _pointer_ tell you? > > Well, for example seeing a 0xfff4

Re: thinkpad x60: sound problems in 4.15-rc1 was Re: thinkpad x60: sound problems in 4.14.0-next-20171114

Hi! > > > > > > > > > > Reappeared, 4.15-rc1. > > > > > > > > > > > > > > > > > > > > [ 40.473822] PM: suspend exit > > > > > > > > > > [ 40.526027] sdhci-pci :15:00.2: Will use DMA mode > > > > > > > > > > even though > > > > > > > > > > HW doesn't fully claim to support it. > > > > >

Re: thinkpad x60: sound problems in 4.15-rc1 was Re: thinkpad x60: sound problems in 4.14.0-next-20171114

Hi! > > > > > > > > > > Reappeared, 4.15-rc1. > > > > > > > > > > > > > > > > > > > > [ 40.473822] PM: suspend exit > > > > > > > > > > [ 40.526027] sdhci-pci :15:00.2: Will use DMA mode > > > > > > > > > > even though > > > > > > > > > > HW doesn't fully claim to support it. > > > > >

Re: [PATCH 1/3] dt-bindings: chosen: Add clocksource and clockevent selection

On Fri, Dec 15, 2017 at 7:57 PM, Grygorii Strashko wrote: > > > On 12/13/2017 12:53 PM, Alexandre Belloni wrote: >> The clocksource and clockevent timer are probed early in the boot process. >> At that time it is difficult for linux to know whether a particular timer >>

Re: [PATCH 1/3] dt-bindings: chosen: Add clocksource and clockevent selection

On Fri, Dec 15, 2017 at 7:57 PM, Grygorii Strashko wrote: > > > On 12/13/2017 12:53 PM, Alexandre Belloni wrote: >> The clocksource and clockevent timer are probed early in the boot process. >> At that time it is difficult for linux to know whether a particular timer >> can be used as the

Re: [PATCH 3/3] trace: print address if symbol not found

Hi Tobin, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.15-rc4 next-20171219] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits

Re: [PATCH 3/3] trace: print address if symbol not found

Hi Tobin, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.15-rc4 next-20171219] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits

Re: [net-next: PATCH 0/8] Armada 7k/8k PP2 ACPI support

Hi Andrew, 2017-12-19 21:46 GMT+01:00 Andrew Lunn : >> Of course! v2 will not have such problem, I've been waiting however >> for the feedback about the ACPI representation. Anyway, I'm strongly >> leaning towards using _ADR/_CID objects in PHY's nodes for ACPI, so >> maybe I'll

Re: [net-next: PATCH 0/8] Armada 7k/8k PP2 ACPI support

Hi Andrew, 2017-12-19 21:46 GMT+01:00 Andrew Lunn : >> Of course! v2 will not have such problem, I've been waiting however >> for the feedback about the ACPI representation. Anyway, I'm strongly >> leaning towards using _ADR/_CID objects in PHY's nodes for ACPI, so >> maybe I'll just issue the v2

Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework

On 12/19/2017 07:47 AM, Sekhar Nori wrote: Hi David, On Saturday 09 December 2017 07:45 AM, David Lechner wrote: This converts the clocks in mach-davinci to the common clock framework. Most of the patch just involves renaming struct clk to struct davinci_clk. There is also a struct clk_hw

Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework

On 12/19/2017 07:47 AM, Sekhar Nori wrote: Hi David, On Saturday 09 December 2017 07:45 AM, David Lechner wrote: This converts the clocks in mach-davinci to the common clock framework. Most of the patch just involves renaming struct clk to struct davinci_clk. There is also a struct clk_hw

Re: [PATCH 4.13 03/28] Bluetooth: btusb: fix QCA Rome suspend/resume

Hi Kai, On Tue, Dec 19, 2017 at 12:28:17PM +0800, Kai Heng Feng wrote: > > On 19 Dec 2017, at 2:13 AM, Brian Norris wrote: > > On Mon, Dec 18, 2017 at 12:43:48PM +0100, Greg Kroah-Hartman wrote: > >> On Fri, Dec 15, 2017 at 07:05:39PM -0800, Matthias Kaehlcke wrote: >

Re: [PATCH] bpf: fix BPF_KPROBE_OVERRIDE dependencies

On Tue, Dec 19, 2017 at 11:12:04AM +0100, Arnd Bergmann wrote: > CONFIG_BPF_KPROBE_OVERRIDE causes a link failure when CONFIG_KPROBE_EVENTS > is disabled: > > kernel/trace/bpf_trace.o: In function `bpf_override_return': > (.text+0x172): undefined reference to `bpf_kprobe_override' > > This adds

Re: [intel-sgx-kernel-dev] [PATCH v5 06/11] intel_sgx: driver for Intel Software Guard Extensions

On Tue, 2017-12-19 at 18:52 +, Christopherson, Sean J wrote: > > We can cache tokens in future in the kernel space, can't we? > > Yes, but why? Deferring to userspace is less complex and likely > more performant. That's quite strong argument especially if you are making that for systems

Re: [PATCH 4.13 03/28] Bluetooth: btusb: fix QCA Rome suspend/resume

Hi Kai, On Tue, Dec 19, 2017 at 12:28:17PM +0800, Kai Heng Feng wrote: > > On 19 Dec 2017, at 2:13 AM, Brian Norris wrote: > > On Mon, Dec 18, 2017 at 12:43:48PM +0100, Greg Kroah-Hartman wrote: > >> On Fri, Dec 15, 2017 at 07:05:39PM -0800, Matthias Kaehlcke wrote: > >>> We identified the above

Re: [PATCH] bpf: fix BPF_KPROBE_OVERRIDE dependencies

On Tue, Dec 19, 2017 at 11:12:04AM +0100, Arnd Bergmann wrote: > CONFIG_BPF_KPROBE_OVERRIDE causes a link failure when CONFIG_KPROBE_EVENTS > is disabled: > > kernel/trace/bpf_trace.o: In function `bpf_override_return': > (.text+0x172): undefined reference to `bpf_kprobe_override' > > This adds

Re: [intel-sgx-kernel-dev] [PATCH v5 06/11] intel_sgx: driver for Intel Software Guard Extensions

On Tue, 2017-12-19 at 18:52 +, Christopherson, Sean J wrote: > > We can cache tokens in future in the kernel space, can't we? > > Yes, but why? Deferring to userspace is less complex and likely > more performant. That's quite strong argument especially if you are making that for systems

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Congratulation Again

This is the second time i am sending you this mail. I, Friedrich Mayrhofer Donate $ 1,000,000.00 to You, Email Me personally for more details. Regards. Friedrich Mayrhofer

Re: [PATCH v5 1/2] dt-bindings: misc: Add DT bindings to xlnx_vcu driver

On Sun, Dec 17, 2017 at 10:15:31PM -0800, Dhaval Shah wrote: > Add Device Tree binding document for logicoreIP. This logicoreIP > provides the isolation between the processing system and > programmable logic. Also provides the clock related information. > > Signed-off-by: Dhaval Shah

Re: [PATCH v5 1/2] dt-bindings: misc: Add DT bindings to xlnx_vcu driver

On Sun, Dec 17, 2017 at 10:15:31PM -0800, Dhaval Shah wrote: > Add Device Tree binding document for logicoreIP. This logicoreIP > provides the isolation between the processing system and > programmable logic. Also provides the clock related information. > > Signed-off-by: Dhaval Shah > --- >

Re: [PATCH] lib: add module unload support to sort tests

On 12/19/17 14:51, Andrew Morton wrote: > On Tue, 19 Dec 2017 23:10:00 +0530 Pravin Shedge > wrote: > >>> >>> If so, why do you think we shiould alter lib/test_sort.c to behave in >>> this atypical fashion? >> >> If test case is going affects only at boot time or

Re: [PATCH] lib: add module unload support to sort tests

On 12/19/17 14:51, Andrew Morton wrote: > On Tue, 19 Dec 2017 23:10:00 +0530 Pravin Shedge > wrote: > >>> >>> If so, why do you think we shiould alter lib/test_sort.c to behave in >>> this atypical fashion? >> >> If test case is going affects only at boot time or at module load >> time, it's

Re: thinkpad x60: sound problems in 4.15-rc1 was Re: thinkpad x60: sound problems in 4.14.0-next-20171114

On Mon, Dec 18, 2017 at 08:54:15PM -0800, vcap...@pengaru.com wrote: > On Mon, Dec 18, 2017 at 06:06:58PM -0800, vcap...@pengaru.com wrote: > > On Thu, Dec 14, 2017 at 10:57:30AM +0100, Pavel Machek wrote: > > > On Tue 2017-11-28 08:00:20, Takashi Iwai wrote: > > > > On Mon, 27 Nov 2017 19:44:12

Re: thinkpad x60: sound problems in 4.15-rc1 was Re: thinkpad x60: sound problems in 4.14.0-next-20171114

On Mon, Dec 18, 2017 at 08:54:15PM -0800, vcap...@pengaru.com wrote: > On Mon, Dec 18, 2017 at 06:06:58PM -0800, vcap...@pengaru.com wrote: > > On Thu, Dec 14, 2017 at 10:57:30AM +0100, Pavel Machek wrote: > > > On Tue 2017-11-28 08:00:20, Takashi Iwai wrote: > > > > On Mon, 27 Nov 2017 19:44:12

Re: [PATCH v1] scripts/decodecode: Make it take multiline Code line

On Tue, 19 Dec 2017 17:05:19 +0200 Andy Shevchenko wrote: > > That's rather hard to understand. An example would help? > > When you have a file out of oops the Code line looks like > > Code: hh hh ... ... hh\n > > When copy'n'paste from, for example,

Re: [PATCH v1] scripts/decodecode: Make it take multiline Code line

On Tue, 19 Dec 2017 17:05:19 +0200 Andy Shevchenko wrote: > > That's rather hard to understand. An example would help? > > When you have a file out of oops the Code line looks like > > Code: hh hh ... ... hh\n > > When copy'n'paste from, for example, email where sender or some middle > MTA

Re: [f2fs-dev] [PATCH v2] f2fs: add an ioctl to disable GC for specific file

On 12/18, Chao Yu wrote: > On 2017/12/15 3:50, Jaegeuk Kim wrote: > > On 12/12, Chao Yu wrote: > >> Hi Jaegeuk, > >> > >> On 2017/12/9 3:37, Jaegeuk Kim wrote: > >>> Change log from v1: > >>> - fix bug in error handling of ioctl > >>> > >>> >From b905e03d8aad7d25ecaf9bde05411a68d3d2460e Mon Sep

Re: [f2fs-dev] [PATCH v2] f2fs: add an ioctl to disable GC for specific file

On 12/18, Chao Yu wrote: > On 2017/12/15 3:50, Jaegeuk Kim wrote: > > On 12/12, Chao Yu wrote: > >> Hi Jaegeuk, > >> > >> On 2017/12/9 3:37, Jaegeuk Kim wrote: > >>> Change log from v1: > >>> - fix bug in error handling of ioctl > >>> > >>> >From b905e03d8aad7d25ecaf9bde05411a68d3d2460e Mon Sep

Re: [PATCH] lib: add module unload support to sort tests

On Tue, 19 Dec 2017 23:10:00 +0530 Pravin Shedge wrote: > > > > If so, why do you think we shiould alter lib/test_sort.c to behave in > > this atypical fashion? > > If test case is going affects only at boot time or at module load > time, it's smart decision to

Re: [PATCH] lib: add module unload support to sort tests

On Tue, 19 Dec 2017 23:10:00 +0530 Pravin Shedge wrote: > > > > If so, why do you think we shiould alter lib/test_sort.c to behave in > > this atypical fashion? > > If test case is going affects only at boot time or at module load > time, it's smart decision to unload module > automatically on

Re: [PATCH 2/2 v2] scsi: ufs: use sysfs entry for health info

>From 3368207da5988b8fed4e41e6c0f49a60ac014222 Mon Sep 17 00:00:00 2001 From: Jaegeuk Kim Date: Tue, 26 Sep 2017 20:53:48 -0700 Subject: [PATCH 2/2] scsi: ufs: introduce sysfs entries exposing UFS health info This patch adds a new sysfs group, namely health, via:

Re: [PATCH 2/2 v2] scsi: ufs: use sysfs entry for health info

>From 3368207da5988b8fed4e41e6c0f49a60ac014222 Mon Sep 17 00:00:00 2001 From: Jaegeuk Kim Date: Tue, 26 Sep 2017 20:53:48 -0700 Subject: [PATCH 2/2] scsi: ufs: introduce sysfs entries exposing UFS health info This patch adds a new sysfs group, namely health, via:

Re: [PATCH 2/2 v2] scsi: ufs: use sysfs entry for health info

On 12/19, Bart Van Assche wrote: > On Tue, 2017-12-19 at 12:02 -0800, Jaegeuk Kim wrote: > > This patch introduces sysfs entries to show the information. > > What information does "the information" refer to? > > Regarding the patch title: I think this patch introduces new sysfs attributes >

Re: [PATCH 2/2 v2] scsi: ufs: use sysfs entry for health info

On 12/19, Bart Van Assche wrote: > On Tue, 2017-12-19 at 12:02 -0800, Jaegeuk Kim wrote: > > This patch introduces sysfs entries to show the information. > > What information does "the information" refer to? > > Regarding the patch title: I think this patch introduces new sysfs attributes >

Re: [PATCH linux-next] mqueue: fix IPC namespace use-after-free

On Tue, Dec 19, 2017 at 03:49:24PM -0600, Eric W. Biederman wrote: > > what would you be delaying? kmem_cache_alloc() for struct mount and > > assignments > > to its fields? That's noise; if anything, I would expect the main cost with > > a plenty of containers to be in sget() scanning the list

Re: [PATCH linux-next] mqueue: fix IPC namespace use-after-free

On Tue, Dec 19, 2017 at 03:49:24PM -0600, Eric W. Biederman wrote: > > what would you be delaying? kmem_cache_alloc() for struct mount and > > assignments > > to its fields? That's noise; if anything, I would expect the main cost with > > a plenty of containers to be in sget() scanning the list

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